| /kernel/linux/linux-6.6/drivers/pinctrl/mediatek/ |
| D | pinctrl-mt8127.c | 19 /* 0E4E8SR 4/8/12/16 */ 21 /* 0E2E4SR 2/4/6/8 */ 24 MTK_DRV_GRP(2, 16, 0, 2, 2) 28 MTK_PIN_DRV_GRP(0, 0xb00, 0, 1), 29 MTK_PIN_DRV_GRP(1, 0xb00, 0, 1), 30 MTK_PIN_DRV_GRP(2, 0xb00, 0, 1), 31 MTK_PIN_DRV_GRP(3, 0xb00, 0, 1), 32 MTK_PIN_DRV_GRP(4, 0xb00, 0, 1), 33 MTK_PIN_DRV_GRP(5, 0xb00, 0, 1), 34 MTK_PIN_DRV_GRP(6, 0xb00, 0, 1), [all …]
|
| D | pinctrl-mt8173.c | 18 #define DRV_BASE 0xb00 21 MTK_PIN_PUPD_SPEC_SR(119, 0xe00, 2, 1, 0), /* KROW0 */ 22 MTK_PIN_PUPD_SPEC_SR(120, 0xe00, 6, 5, 4), /* KROW1 */ 23 MTK_PIN_PUPD_SPEC_SR(121, 0xe00, 10, 9, 8), /* KROW2 */ 24 MTK_PIN_PUPD_SPEC_SR(122, 0xe10, 2, 1, 0), /* KCOL0 */ 25 MTK_PIN_PUPD_SPEC_SR(123, 0xe10, 6, 5, 4), /* KCOL1 */ 26 MTK_PIN_PUPD_SPEC_SR(124, 0xe10, 10, 9, 8), /* KCOL2 */ 28 MTK_PIN_PUPD_SPEC_SR(67, 0xd10, 2, 1, 0), /* ms0 DS */ 29 MTK_PIN_PUPD_SPEC_SR(68, 0xd00, 2, 1, 0), /* ms0 RST */ 30 MTK_PIN_PUPD_SPEC_SR(66, 0xc10, 2, 1, 0), /* ms0 cmd */ [all …]
|
| D | pinctrl-mt2712.c | 20 MTK_PIN_PUPD_SPEC_SR(18, 0xe50, 2, 1, 0), 21 MTK_PIN_PUPD_SPEC_SR(19, 0xe60, 12, 11, 10), 22 MTK_PIN_PUPD_SPEC_SR(20, 0xe50, 5, 4, 3), 23 MTK_PIN_PUPD_SPEC_SR(21, 0xe60, 15, 14, 13), 24 MTK_PIN_PUPD_SPEC_SR(22, 0xe50, 8, 7, 6), 25 MTK_PIN_PUPD_SPEC_SR(23, 0xe70, 2, 1, 0), 27 MTK_PIN_PUPD_SPEC_SR(30, 0xf30, 2, 1, 0), 28 MTK_PIN_PUPD_SPEC_SR(31, 0xf30, 6, 5, 4), 29 MTK_PIN_PUPD_SPEC_SR(32, 0xf30, 10, 9, 8), 30 MTK_PIN_PUPD_SPEC_SR(33, 0xf30, 14, 13, 12), [all …]
|
| D | pinctrl-mt6795.c | 11 PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit, \ 12 _x_bits, 15, 0) 15 PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit, \ 16 _x_bits, 16, 0) 19 PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit, \ 23 PIN_FIELD16(0, 196, 0x0, 0x10, 0, 1), 27 PIN_FIELD16(0, 196, 0x100, 0x10, 0, 1), 31 PIN_FIELD16(0, 196, 0x200, 0x10, 0, 1), 35 PIN_FIELD16(0, 196, 0x400, 0x10, 0, 1), 39 PIN_FIELD16(0, 196, 0x500, 0x10, 0, 1), [all …]
|
| /kernel/linux/linux-5.10/drivers/pinctrl/mediatek/ |
| D | pinctrl-mt8127.c | 20 /* 0E4E8SR 4/8/12/16 */ 22 /* 0E2E4SR 2/4/6/8 */ 25 MTK_DRV_GRP(2, 16, 0, 2, 2) 29 MTK_PIN_DRV_GRP(0, 0xb00, 0, 1), 30 MTK_PIN_DRV_GRP(1, 0xb00, 0, 1), 31 MTK_PIN_DRV_GRP(2, 0xb00, 0, 1), 32 MTK_PIN_DRV_GRP(3, 0xb00, 0, 1), 33 MTK_PIN_DRV_GRP(4, 0xb00, 0, 1), 34 MTK_PIN_DRV_GRP(5, 0xb00, 0, 1), 35 MTK_PIN_DRV_GRP(6, 0xb00, 0, 1), [all …]
|
| D | pinctrl-mt8173.c | 19 #define DRV_BASE 0xb00 22 MTK_PIN_PUPD_SPEC_SR(119, 0xe00, 2, 1, 0), /* KROW0 */ 23 MTK_PIN_PUPD_SPEC_SR(120, 0xe00, 6, 5, 4), /* KROW1 */ 24 MTK_PIN_PUPD_SPEC_SR(121, 0xe00, 10, 9, 8), /* KROW2 */ 25 MTK_PIN_PUPD_SPEC_SR(122, 0xe10, 2, 1, 0), /* KCOL0 */ 26 MTK_PIN_PUPD_SPEC_SR(123, 0xe10, 6, 5, 4), /* KCOL1 */ 27 MTK_PIN_PUPD_SPEC_SR(124, 0xe10, 10, 9, 8), /* KCOL2 */ 29 MTK_PIN_PUPD_SPEC_SR(67, 0xd10, 2, 1, 0), /* ms0 DS */ 30 MTK_PIN_PUPD_SPEC_SR(68, 0xd00, 2, 1, 0), /* ms0 RST */ 31 MTK_PIN_PUPD_SPEC_SR(66, 0xc10, 2, 1, 0), /* ms0 cmd */ [all …]
|
| D | pinctrl-mt2712.c | 21 MTK_PIN_PUPD_SPEC_SR(18, 0xe50, 2, 1, 0), 22 MTK_PIN_PUPD_SPEC_SR(19, 0xe60, 12, 11, 10), 23 MTK_PIN_PUPD_SPEC_SR(20, 0xe50, 5, 4, 3), 24 MTK_PIN_PUPD_SPEC_SR(21, 0xe60, 15, 14, 13), 25 MTK_PIN_PUPD_SPEC_SR(22, 0xe50, 8, 7, 6), 26 MTK_PIN_PUPD_SPEC_SR(23, 0xe70, 2, 1, 0), 28 MTK_PIN_PUPD_SPEC_SR(30, 0xf30, 2, 1, 0), 29 MTK_PIN_PUPD_SPEC_SR(31, 0xf30, 6, 5, 4), 30 MTK_PIN_PUPD_SPEC_SR(32, 0xf30, 10, 9, 8), 31 MTK_PIN_PUPD_SPEC_SR(33, 0xf30, 14, 13, 12), [all …]
|
| /kernel/linux/linux-5.10/drivers/pinctrl/samsung/ |
| D | pinctrl-exynos-arm.c | 27 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, }, 32 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, }, 36 #define S5P_OTHERS 0xE000 73 clk_base = of_iomap(np, 0); in s5pv210_retention_init() 93 EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00), 94 EXYNOS_PIN_BANK_EINTG(4, 0x020, "gpa1", 0x04), 95 EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpb", 0x08), 96 EXYNOS_PIN_BANK_EINTG(5, 0x060, "gpc0", 0x0c), 97 EXYNOS_PIN_BANK_EINTG(5, 0x080, "gpc1", 0x10), 98 EXYNOS_PIN_BANK_EINTG(4, 0x0a0, "gpd0", 0x14), [all …]
|
| /kernel/linux/linux-6.6/drivers/pinctrl/samsung/ |
| D | pinctrl-exynos-arm.c | 27 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, }, 32 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, }, 36 #define S5P_OTHERS 0xE000 73 clk_base = of_iomap(np, 0); in s5pv210_retention_init() 93 EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00), 94 EXYNOS_PIN_BANK_EINTG(4, 0x020, "gpa1", 0x04), 95 EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpb", 0x08), 96 EXYNOS_PIN_BANK_EINTG(5, 0x060, "gpc0", 0x0c), 97 EXYNOS_PIN_BANK_EINTG(5, 0x080, "gpc1", 0x10), 98 EXYNOS_PIN_BANK_EINTG(4, 0x0a0, "gpd0", 0x14), [all …]
|
| /kernel/linux/linux-6.6/sound/soc/sof/amd/ |
| D | acp-dsp-offset.h | 15 #define ACP_DMA_CNTL_0 0x00 16 #define ACP_DMA_DSCR_STRT_IDX_0 0x20 17 #define ACP_DMA_DSCR_CNT_0 0x40 18 #define ACP_DMA_PRIO_0 0x60 19 #define ACP_DMA_CUR_DSCR_0 0x80 20 #define ACP_DMA_ERR_STS_0 0xC0 21 #define ACP_DMA_DESC_BASE_ADDR 0xE0 22 #define ACP_DMA_DESC_MAX_NUM_DSCR 0xE4 23 #define ACP_DMA_CH_STS 0xE8 24 #define ACP_DMA_CH_GROUP 0xEC [all …]
|
| /kernel/linux/linux-6.6/arch/sh/kernel/cpu/sh4/ |
| D | setup-sh7760.c | 17 UNUSED = 0, 44 INTC_VECT(HUDI, 0x600), INTC_VECT(GPIOI, 0x620), 45 INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660), 46 INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0), 47 INTC_VECT(DMAC, 0x780), INTC_VECT(DMAC, 0x7a0), 48 INTC_VECT(DMAC, 0x7c0), INTC_VECT(DMAC, 0x7e0), 49 INTC_VECT(DMAC, 0x6c0), 50 INTC_VECT(IRQ4, 0x800), INTC_VECT(IRQ5, 0x820), 51 INTC_VECT(IRQ6, 0x840), INTC_VECT(IRQ6, 0x860), 52 INTC_VECT(HCAN20, 0x900), INTC_VECT(HCAN21, 0x920), [all …]
|
| /kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh4/ |
| D | setup-sh7760.c | 17 UNUSED = 0, 44 INTC_VECT(HUDI, 0x600), INTC_VECT(GPIOI, 0x620), 45 INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660), 46 INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0), 47 INTC_VECT(DMAC, 0x780), INTC_VECT(DMAC, 0x7a0), 48 INTC_VECT(DMAC, 0x7c0), INTC_VECT(DMAC, 0x7e0), 49 INTC_VECT(DMAC, 0x6c0), 50 INTC_VECT(IRQ4, 0x800), INTC_VECT(IRQ5, 0x820), 51 INTC_VECT(IRQ6, 0x840), INTC_VECT(IRQ6, 0x860), 52 INTC_VECT(HCAN20, 0x900), INTC_VECT(HCAN21, 0x920), [all …]
|
| /kernel/linux/linux-6.6/sound/soc/amd/acp/ |
| D | chip_offset_byte.h | 14 #define ACPAXI2AXI_ATU_CTRL 0xC40 15 #define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_5 0xC20 16 #define ACPAXI2AXI_ATU_BASE_ADDR_GRP_5 0xC24 18 #define ACP_PGFSM_CONTROL 0x141C 19 #define ACP_PGFSM_STATUS 0x1420 20 #define ACP_SOFT_RESET 0x1000 21 #define ACP_CONTROL 0x1004 24 (adata->acp_base + adata->rsrc->irq_reg_offset + offset + (ctrl * 0x04)) 26 #define ACP_EXTERNAL_INTR_ENB(adata) ACP_EXTERNAL_INTR_REG_ADDR(adata, 0x0, 0x0) 27 #define ACP_EXTERNAL_INTR_CNTL(adata, ctrl) ACP_EXTERNAL_INTR_REG_ADDR(adata, 0x4, ctrl) [all …]
|
| /kernel/linux/linux-5.10/arch/sh/include/mach-se/mach/ |
| D | se.h | 16 #define PA_ROM 0x00000000 /* EPROM */ 17 #define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ 18 #define PA_FROM 0x01000000 /* EPROM */ 19 #define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ 20 #define PA_EXT1 0x04000000 21 #define PA_EXT1_SIZE 0x04000000 22 #define PA_EXT2 0x08000000 23 #define PA_EXT2_SIZE 0x04000000 24 #define PA_SDRAM 0x0c000000 25 #define PA_SDRAM_SIZE 0x04000000 [all …]
|
| /kernel/linux/linux-6.6/arch/sh/include/mach-se/mach/ |
| D | se.h | 16 #define PA_ROM 0x00000000 /* EPROM */ 17 #define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ 18 #define PA_FROM 0x01000000 /* EPROM */ 19 #define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ 20 #define PA_EXT1 0x04000000 21 #define PA_EXT1_SIZE 0x04000000 22 #define PA_EXT2 0x08000000 23 #define PA_EXT2_SIZE 0x04000000 24 #define PA_SDRAM 0x0c000000 25 #define PA_SDRAM_SIZE 0x04000000 [all …]
|
| /kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh4a/ |
| D | setup-sh7343.c | 24 DEFINE_RES_MEM(0xffe00000, 0x100), 25 DEFINE_RES_IRQ(evt2irq(0xc00)), 30 .id = 0, 44 DEFINE_RES_MEM(0xffe10000, 0x100), 45 DEFINE_RES_IRQ(evt2irq(0xc20)), 64 DEFINE_RES_MEM(0xffe20000, 0x100), 65 DEFINE_RES_IRQ(evt2irq(0xc40)), 84 DEFINE_RES_MEM(0xffe30000, 0x100), 85 DEFINE_RES_IRQ(evt2irq(0xc60)), 99 [0] = { [all …]
|
| D | setup-sh7723.c | 30 DEFINE_RES_MEM(0xffe00000, 0x100), 31 DEFINE_RES_IRQ(evt2irq(0xc00)), 36 .id = 0, 51 DEFINE_RES_MEM(0xffe10000, 0x100), 52 DEFINE_RES_IRQ(evt2irq(0xc20)), 72 DEFINE_RES_MEM(0xffe20000, 0x100), 73 DEFINE_RES_IRQ(evt2irq(0xc40)), 92 DEFINE_RES_MEM(0xa4e30000, 0x100), 93 DEFINE_RES_IRQ(evt2irq(0x900)), 112 DEFINE_RES_MEM(0xa4e40000, 0x100), [all …]
|
| /kernel/linux/linux-6.6/arch/sh/kernel/cpu/sh4a/ |
| D | setup-sh7343.c | 24 DEFINE_RES_MEM(0xffe00000, 0x100), 25 DEFINE_RES_IRQ(evt2irq(0xc00)), 30 .id = 0, 44 DEFINE_RES_MEM(0xffe10000, 0x100), 45 DEFINE_RES_IRQ(evt2irq(0xc20)), 64 DEFINE_RES_MEM(0xffe20000, 0x100), 65 DEFINE_RES_IRQ(evt2irq(0xc40)), 84 DEFINE_RES_MEM(0xffe30000, 0x100), 85 DEFINE_RES_IRQ(evt2irq(0xc60)), 99 [0] = { [all …]
|
| D | setup-sh7723.c | 30 DEFINE_RES_MEM(0xffe00000, 0x100), 31 DEFINE_RES_IRQ(evt2irq(0xc00)), 36 .id = 0, 51 DEFINE_RES_MEM(0xffe10000, 0x100), 52 DEFINE_RES_IRQ(evt2irq(0xc20)), 72 DEFINE_RES_MEM(0xffe20000, 0x100), 73 DEFINE_RES_IRQ(evt2irq(0xc40)), 92 DEFINE_RES_MEM(0xa4e30000, 0x100), 93 DEFINE_RES_IRQ(evt2irq(0x900)), 112 DEFINE_RES_MEM(0xa4e40000, 0x100), [all …]
|
| /kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh3/ |
| D | setup-sh7710.c | 19 UNUSED = 0, 33 INTC_VECT(DMAC1, 0x800), INTC_VECT(DMAC1, 0x820), 34 INTC_VECT(DMAC1, 0x840), INTC_VECT(DMAC1, 0x860), 35 INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0), 36 INTC_VECT(SCIF0, 0x8c0), INTC_VECT(SCIF0, 0x8e0), 37 INTC_VECT(SCIF1, 0x900), INTC_VECT(SCIF1, 0x920), 38 INTC_VECT(SCIF1, 0x940), INTC_VECT(SCIF1, 0x960), 39 INTC_VECT(DMAC2, 0xb80), INTC_VECT(DMAC2, 0xba0), 41 INTC_VECT(IPSEC, 0xbe0), 43 INTC_VECT(EDMAC0, 0xc00), INTC_VECT(EDMAC1, 0xc20), [all …]
|
| /kernel/linux/linux-6.6/arch/sh/kernel/cpu/sh3/ |
| D | setup-sh7710.c | 19 UNUSED = 0, 33 INTC_VECT(DMAC1, 0x800), INTC_VECT(DMAC1, 0x820), 34 INTC_VECT(DMAC1, 0x840), INTC_VECT(DMAC1, 0x860), 35 INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0), 36 INTC_VECT(SCIF0, 0x8c0), INTC_VECT(SCIF0, 0x8e0), 37 INTC_VECT(SCIF1, 0x900), INTC_VECT(SCIF1, 0x920), 38 INTC_VECT(SCIF1, 0x940), INTC_VECT(SCIF1, 0x960), 39 INTC_VECT(DMAC2, 0xb80), INTC_VECT(DMAC2, 0xba0), 41 INTC_VECT(IPSEC, 0xbe0), 43 INTC_VECT(EDMAC0, 0xc00), INTC_VECT(EDMAC1, 0xc20), [all …]
|
| /kernel/linux/linux-5.10/drivers/staging/rtl8188eu/include/ |
| D | hal8188e_phy_reg.h | 11 /* BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF */ 13 /* 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 */ 14 /* 3. RF register 0x00-2E */ 19 /* 3. Page8(0x800) */ 20 #define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC RF BW Setting */ 21 #define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ 23 #define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ 24 #define rFPGA0_XA_HSSIParameter2 0x824 25 #define rFPGA0_XB_HSSIParameter1 0x828 26 #define rFPGA0_XB_HSSIParameter2 0x82c [all …]
|
| /kernel/linux/linux-6.6/drivers/net/wireless/marvell/mwifiex/ |
| D | pcie.h | 27 #define PCIE_VENDOR_ID_MARVELL (0x11ab) 28 #define PCIE_VENDOR_ID_V2_MARVELL (0x1b4b) 29 #define PCIE_DEVICE_ID_MARVELL_88W8766P (0x2b30) 30 #define PCIE_DEVICE_ID_MARVELL_88W8897 (0x2b38) 31 #define PCIE_DEVICE_ID_MARVELL_88W8997 (0x2b42) 33 #define PCIE8897_A0 0x1100 34 #define PCIE8897_B0 0x1200 35 #define PCIE8997_A0 0x10 36 #define PCIE8997_A1 0x11 37 #define CHIP_VER_PCIEUART 0x3 [all …]
|
| /kernel/linux/linux-5.10/drivers/net/wireless/marvell/mwifiex/ |
| D | pcie.h | 39 #define PCIE_VENDOR_ID_MARVELL (0x11ab) 40 #define PCIE_VENDOR_ID_V2_MARVELL (0x1b4b) 41 #define PCIE_DEVICE_ID_MARVELL_88W8766P (0x2b30) 42 #define PCIE_DEVICE_ID_MARVELL_88W8897 (0x2b38) 43 #define PCIE_DEVICE_ID_MARVELL_88W8997 (0x2b42) 45 #define PCIE8897_A0 0x1100 46 #define PCIE8897_B0 0x1200 47 #define PCIE8997_A0 0x10 48 #define PCIE8997_A1 0x11 49 #define CHIP_VER_PCIEUART 0x3 [all …]
|
| /kernel/linux/linux-5.10/arch/m68k/include/asm/ |
| D | mac_psc.h | 37 #define PSC_BASE (0x50F31000) 44 * To access a particular set of registers, add 0xn0 to the base 48 #define pIFRbase 0x100 49 #define pIERbase 0x104 55 #define PSC_MYSTERY 0x804 57 #define PSC_CTL_BASE 0xC00 59 #define PSC_SCSI_CTL 0xC00 60 #define PSC_ENETRD_CTL 0xC10 61 #define PSC_ENETWR_CTL 0xC20 62 #define PSC_FDC_CTL 0xC30 [all …]
|