Searched +full:0 +full:xa000 (Results 1 – 25 of 462) sorted by relevance
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| /kernel/linux/linux-5.10/arch/powerpc/boot/dts/ |
| D | mvme5100.dts | 26 #size-cells = <0>; 30 reg = <0x0>; 44 reg = <0x0 0x20000000>; 51 ranges = <0x0 0xfef80000 0x10000>; 52 reg = <0xfef80000 0x10000>; 57 reg = <0x8000 0x80>; 68 reg = <0x8200 0x80>; 78 #address-cells = <0>; 82 reg = <0xf3f80000 0x40000>; 92 reg = <0xfec00000 0x400000>; [all …]
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| D | stxssa8555.dts | 28 #size-cells = <0>; 30 PowerPC,8555@0 { 32 reg = <0x0>; 35 d-cache-size = <0x8000>; // L1, 32K 36 i-cache-size = <0x8000>; // L1, 32K 37 timebase-frequency = <0>; // 33 MHz, from uboot 38 bus-frequency = <0>; // 166 MHz 39 clock-frequency = <0>; // 825 MHz, from uboot 46 reg = <0x00000000 0x10000000>; 54 ranges = <0x0 0xe0000000 0x100000>; [all …]
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| /kernel/linux/linux-6.6/arch/powerpc/boot/dts/ |
| D | mvme5100.dts | 26 #size-cells = <0>; 30 reg = <0x0>; 44 reg = <0x0 0x20000000>; 51 ranges = <0x0 0xfef80000 0x10000>; 52 reg = <0xfef80000 0x10000>; 57 reg = <0x8000 0x80>; 68 reg = <0x8200 0x80>; 78 #address-cells = <0>; 82 reg = <0xf3f80000 0x40000>; 92 reg = <0xfec00000 0x400000>; [all …]
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| D | stxssa8555.dts | 30 #size-cells = <0>; 32 PowerPC,8555@0 { 34 reg = <0x0>; 37 d-cache-size = <0x8000>; // L1, 32K 38 i-cache-size = <0x8000>; // L1, 32K 39 timebase-frequency = <0>; // 33 MHz, from uboot 40 bus-frequency = <0>; // 166 MHz 41 clock-frequency = <0>; // 825 MHz, from uboot 48 reg = <0x00000000 0x10000000>; 56 ranges = <0x0 0xe0000000 0x100000>; [all …]
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| /kernel/linux/linux-6.6/sound/soc/codecs/ |
| D | rt274.h | 14 #define RT274_AUDIO_FUNCTION_GROUP 0x01 15 #define RT274_DAC_OUT0 0x02 16 #define RT274_DAC_OUT1 0x03 17 #define RT274_ADC_IN2 0x08 18 #define RT274_ADC_IN1 0x09 19 #define RT274_DIG_CVT 0x0a 20 #define RT274_DMIC1 0x12 21 #define RT274_DMIC2 0x13 22 #define RT274_MIC 0x19 23 #define RT274_LINE1 0x1a [all …]
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| D | rt286.h | 14 #define RT286_AUDIO_FUNCTION_GROUP 0x01 15 #define RT286_DAC_OUT1 0x02 16 #define RT286_DAC_OUT2 0x03 17 #define RT286_ADC_IN1 0x09 18 #define RT286_ADC_IN2 0x08 19 #define RT286_MIXER_IN 0x0b 20 #define RT286_MIXER_OUT1 0x0c 21 #define RT286_MIXER_OUT2 0x0d 22 #define RT286_DMIC1 0x12 23 #define RT286_DMIC2 0x13 [all …]
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| D | rt298.h | 14 #define RT298_AUDIO_FUNCTION_GROUP 0x01 15 #define RT298_DAC_OUT1 0x02 16 #define RT298_DAC_OUT2 0x03 17 #define RT298_DIG_CVT 0x06 18 #define RT298_ADC_IN1 0x09 19 #define RT298_ADC_IN2 0x08 20 #define RT298_MIXER_IN 0x0b 21 #define RT298_MIXER_OUT1 0x0c 22 #define RT298_MIXER_OUT2 0x0d 23 #define RT298_DMIC1 0x12 [all …]
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| /kernel/linux/linux-5.10/sound/soc/codecs/ |
| D | rt274.h | 14 #define RT274_AUDIO_FUNCTION_GROUP 0x01 15 #define RT274_DAC_OUT0 0x02 16 #define RT274_DAC_OUT1 0x03 17 #define RT274_ADC_IN2 0x08 18 #define RT274_ADC_IN1 0x09 19 #define RT274_DIG_CVT 0x0a 20 #define RT274_DMIC1 0x12 21 #define RT274_DMIC2 0x13 22 #define RT274_MIC 0x19 23 #define RT274_LINE1 0x1a [all …]
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| D | rt286.h | 14 #define RT286_AUDIO_FUNCTION_GROUP 0x01 15 #define RT286_DAC_OUT1 0x02 16 #define RT286_DAC_OUT2 0x03 17 #define RT286_ADC_IN1 0x09 18 #define RT286_ADC_IN2 0x08 19 #define RT286_MIXER_IN 0x0b 20 #define RT286_MIXER_OUT1 0x0c 21 #define RT286_MIXER_OUT2 0x0d 22 #define RT286_DMIC1 0x12 23 #define RT286_DMIC2 0x13 [all …]
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| D | rt298.h | 14 #define RT298_AUDIO_FUNCTION_GROUP 0x01 15 #define RT298_DAC_OUT1 0x02 16 #define RT298_DAC_OUT2 0x03 17 #define RT298_DIG_CVT 0x06 18 #define RT298_ADC_IN1 0x09 19 #define RT298_ADC_IN2 0x08 20 #define RT298_MIXER_IN 0x0b 21 #define RT298_MIXER_OUT1 0x0c 22 #define RT298_MIXER_OUT2 0x0d 23 #define RT298_DMIC1 0x12 [all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-ux500/ |
| D | db8500-regs.h | 10 #define U8500_ESRAM_BASE 0x40000000 11 #define U8500_ESRAM_BANK_SIZE 0x00020000 21 #define U8500_ESRAM_DMA_LCPA_OFFSET 0x10000 28 #define U8500_PER3_BASE 0x80000000 29 #define U8500_STM_BASE 0x80100000 30 #define U8500_STM_REG_BASE (U8500_STM_BASE + 0xF000) 31 #define U8500_PER2_BASE 0x80110000 32 #define U8500_PER1_BASE 0x80120000 33 #define U8500_B2R2_BASE 0x80130000 34 #define U8500_HSEM_BASE 0x80140000 [all …]
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| /kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/ |
| D | mpc8548cds.dtsi | 36 nor@0,0 { 40 reg = <0x0 0x0 0x01000000>; 44 partition@0 { 45 reg = <0x0 0x0b00000>; 50 reg = <0x0b00000 0x0400000>; 55 reg = <0x0f00000 0x060000>; 60 reg = <0x0f60000 0x020000>; 66 reg = <0x0f80000 0x080000>; 72 board-control@1,0 { 74 reg = <0x1 0x0 0x1000>; [all …]
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| D | mpc8540ads.dts | 29 #size-cells = <0>; 31 PowerPC,8540@0 { 33 reg = <0x0>; 36 d-cache-size = <0x8000>; // L1, 32K 37 i-cache-size = <0x8000>; // L1, 32K 38 timebase-frequency = <0>; // 33 MHz, from uboot 39 bus-frequency = <0>; // 166 MHz 40 clock-frequency = <0>; // 825 MHz, from uboot 47 reg = <0x0 0x8000000>; // 128M at 0x0 55 ranges = <0x0 0xe0000000 0x100000>; [all …]
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| D | mpc8555cds.dts | 29 #size-cells = <0>; 31 PowerPC,8555@0 { 33 reg = <0x0>; 36 d-cache-size = <0x8000>; // L1, 32K 37 i-cache-size = <0x8000>; // L1, 32K 38 timebase-frequency = <0>; // 33 MHz, from uboot 39 bus-frequency = <0>; // 166 MHz 40 clock-frequency = <0>; // 825 MHz, from uboot 47 reg = <0x0 0x8000000>; // 128M at 0x0 55 ranges = <0x0 0xe0000000 0x100000>; [all …]
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| D | mpc8541cds.dts | 29 #size-cells = <0>; 31 PowerPC,8541@0 { 33 reg = <0x0>; 36 d-cache-size = <0x8000>; // L1, 32K 37 i-cache-size = <0x8000>; // L1, 32K 38 timebase-frequency = <0>; // 33 MHz, from uboot 39 bus-frequency = <0>; // 166 MHz 40 clock-frequency = <0>; // 825 MHz, from uboot 47 reg = <0x0 0x8000000>; // 128M at 0x0 55 ranges = <0x0 0xe0000000 0x100000>; [all …]
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| D | mpc8560ads.dts | 30 #size-cells = <0>; 32 PowerPC,8560@0 { 34 reg = <0x0>; 37 d-cache-size = <0x8000>; // L1, 32K 38 i-cache-size = <0x8000>; // L1, 32K 47 reg = <0x0 0x10000000>; 55 ranges = <0x0 0xe0000000 0x100000>; 58 ecm-law@0 { 60 reg = <0x0 0x1000>; 66 reg = <0x1000 0x1000>; [all …]
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| /kernel/linux/linux-6.6/drivers/crypto/aspeed/ |
| D | aspeed-hace.h | 19 #define ASPEED_HACE_SRC 0x00 /* Crypto Data Source Base Address Register */ 20 #define ASPEED_HACE_DEST 0x04 /* Crypto Data Destination Base Address Register */ 21 #define ASPEED_HACE_CONTEXT 0x08 /* Crypto Context Buffer Base Address Register */ 22 #define ASPEED_HACE_DATA_LEN 0x0C /* Crypto Data Length Register */ 23 #define ASPEED_HACE_CMD 0x10 /* Crypto Engine Command Register */ 26 #define ASPEED_HACE_TAG 0x18 /* HACE Tag Register */ 28 #define ASPEED_HACE_GCM_ADD_LEN 0x14 /* Crypto AES-GCM Additional Data Length Register */ 29 #define ASPEED_HACE_GCM_TAG_BASE_ADDR 0x18 /* Crypto AES-GCM Tag Write Buff Base Address Reg */ 31 #define ASPEED_HACE_STS 0x1C /* HACE Status Register */ 33 #define ASPEED_HACE_HASH_SRC 0x20 /* Hash Data Source Base Address Register */ [all …]
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| /kernel/linux/linux-6.6/drivers/net/usb/ |
| D | r8153_ecm.c | 10 #define OCP_BASE 0xe86c 26 if (ret < 0) in pla_read_word() 31 ret &= 0xffff; in pla_read_word() 39 u32 mask = 0xffff; in pla_write_word() 58 if (ret < 0) in pla_write_word() 76 ret = pla_write_word(dev, OCP_BASE, 0xa000); in r8153_ecm_mdio_read() 77 if (ret < 0) in r8153_ecm_mdio_read() 80 ret = pla_read_word(dev, 0xb400 + reg * 2); in r8153_ecm_mdio_read() 91 ret = pla_write_word(dev, OCP_BASE, 0xa000); in r8153_ecm_mdio_write() 92 if (ret < 0) in r8153_ecm_mdio_write() [all …]
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| /kernel/linux/linux-6.6/arch/mips/sgi-ip22/ |
| D | ip22-nvram.c | 13 #define EEPROM_READ 0xc000 /* serial memory read */ 14 #define EEPROM_WEN 0x9800 /* write enable before prog modes */ 15 #define EEPROM_WRITE 0xa000 /* serial memory write */ 16 #define EEPROM_WRALL 0x8800 /* write all registers */ 17 #define EEPROM_WDS 0x8000 /* disable all programming */ 18 #define EEPROM_PRREAD 0xc000 /* read protect register */ 19 #define EEPROM_PREN 0x9800 /* enable protect register mode */ 20 #define EEPROM_PRCLEAR 0xffff /* clear protect register */ 21 #define EEPROM_PRWRITE 0xa000 /* write protect register */ 22 #define EEPROM_PRDS 0x8000 /* disable protect register, forever */ [all …]
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| /kernel/linux/linux-5.10/arch/mips/sgi-ip22/ |
| D | ip22-nvram.c | 13 #define EEPROM_READ 0xc000 /* serial memory read */ 14 #define EEPROM_WEN 0x9800 /* write enable before prog modes */ 15 #define EEPROM_WRITE 0xa000 /* serial memory write */ 16 #define EEPROM_WRALL 0x8800 /* write all registers */ 17 #define EEPROM_WDS 0x8000 /* disable all programming */ 18 #define EEPROM_PRREAD 0xc000 /* read protect register */ 19 #define EEPROM_PREN 0x9800 /* enable protect register mode */ 20 #define EEPROM_PRCLEAR 0xffff /* clear protect register */ 21 #define EEPROM_PRWRITE 0xa000 /* write protect register */ 22 #define EEPROM_PRDS 0x8000 /* disable protect register, forever */ [all …]
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| /kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/ |
| D | if_defs.h | 19 #define HIVE_IF_FRAME_REQUEST 0xA000 20 #define HIVE_IF_LINES_REQUEST 0xB000 21 #define HIVE_IF_VECTORS_REQUEST 0xC000
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| /kernel/linux/linux-6.6/drivers/staging/media/atomisp/pci/ |
| D | if_defs.h | 19 #define HIVE_IF_FRAME_REQUEST 0xA000 20 #define HIVE_IF_LINES_REQUEST 0xB000 21 #define HIVE_IF_VECTORS_REQUEST 0xC000
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/lpc/ |
| D | lpc4357.dtsi | 18 cpu@0 { 26 reg = <0x10000000 0x8000>; /* 32 KiB local SRAM */ 31 reg = <0x10080000 0xa000>; /* 32 + 8 KiB local SRAM */ 36 reg = <0x20000000 0x10000>; /* 4 x 16 KiB AHB SRAM */
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | lpc4357.dtsi | 18 cpu@0 { 26 reg = <0x10000000 0x8000>; /* 32 KiB local SRAM */ 31 reg = <0x10080000 0xa000>; /* 32 + 8 KiB local SRAM */ 36 reg = <0x20000000 0x10000>; /* 4 x 16 KiB AHB SRAM */
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| D | qcom-pm8841.dtsi | 9 reg = <0x4 SPMI_USID>; 11 #size-cells = <0>; 15 reg = <0xa000>; 18 interrupts = <4 0xa0 0 IRQ_TYPE_NONE>, 19 <4 0xa1 0 IRQ_TYPE_NONE>, 20 <4 0xa2 0 IRQ_TYPE_NONE>, 21 <4 0xa3 0 IRQ_TYPE_NONE>; 26 reg = <0x2400>; 27 interrupts = <4 0x24 0 IRQ_TYPE_EDGE_RISING>; 28 #thermal-sensor-cells = <0>; [all …]
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