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/kernel/linux/linux-6.6/sound/soc/qcom/
Dlpass-ipq806x.c95 return 0; in ipq806x_lpass_exit()
108 return 0; in ipq806x_lpass_free_dma_channel()
112 .i2sctrl_reg_base = 0x0010,
113 .i2sctrl_reg_stride = 0x04,
115 .irq_reg_base = 0x3000,
116 .irq_reg_stride = 0x1000,
118 .rdma_reg_base = 0x6000,
119 .rdma_reg_stride = 0x1000,
121 .wrdma_reg_base = 0xB000,
122 .wrdma_reg_stride = 0x1000,
[all …]
Dlpass-apq8016.c127 int chan = 0; in apq8016_lpass_alloc_dma_channel()
154 return 0; in apq8016_lpass_free_dma_channel()
171 for (i = 0; i < drvdata->num_clks; i++) in apq8016_lpass_init()
208 return 0; in apq8016_lpass_init()
222 return 0; in apq8016_lpass_exit()
227 .i2sctrl_reg_base = 0x1000,
228 .i2sctrl_reg_stride = 0x1000,
230 .irq_reg_base = 0x6000,
231 .irq_reg_stride = 0x1000,
233 .rdma_reg_base = 0x8400,
[all …]
/kernel/linux/linux-5.10/sound/soc/qcom/
Dlpass-ipq806x.c96 return 0; in ipq806x_lpass_exit()
109 return 0; in ipq806x_lpass_free_dma_channel()
113 .i2sctrl_reg_base = 0x0010,
114 .i2sctrl_reg_stride = 0x04,
116 .irq_reg_base = 0x3000,
117 .irq_reg_stride = 0x1000,
119 .rdma_reg_base = 0x6000,
120 .rdma_reg_stride = 0x1000,
122 .wrdma_reg_base = 0xB000,
123 .wrdma_reg_stride = 0x1000,
[all …]
Dlpass-apq8016.c131 int chan = 0; in apq8016_lpass_alloc_dma_channel()
158 return 0; in apq8016_lpass_free_dma_channel()
175 for (i = 0; i < drvdata->num_clks; i++) in apq8016_lpass_init()
212 return 0; in apq8016_lpass_init()
226 return 0; in apq8016_lpass_exit()
231 .i2sctrl_reg_base = 0x1000,
232 .i2sctrl_reg_stride = 0x1000,
234 .irq_reg_base = 0x6000,
235 .irq_reg_stride = 0x1000,
237 .rdma_reg_base = 0x8400,
[all …]
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/
Dmpc834x_mds.dts27 #size-cells = <0>;
29 PowerPC,8349@0 {
31 reg = <0x0>;
36 timebase-frequency = <0>; // from bootloader
37 bus-frequency = <0>; // from bootloader
38 clock-frequency = <0>; // from bootloader
44 reg = <0x00000000 0x10000000>; // 256MB at 0
49 reg = <0xe2400000 0x8000>;
57 ranges = <0x0 0xe0000000 0x00100000>;
58 reg = <0xe0000000 0x00000200>;
[all …]
Dpq2fads.dts26 #size-cells = <0>;
28 cpu@0 {
30 reg = <0x0>;
35 timebase-frequency = <0>;
36 clock-frequency = <0>;
42 reg = <0x0 0x0>;
50 reg = <0xf0010100 0x60>;
52 ranges = <0x0 0x0 0xff800000 0x800000
53 0x1 0x0 0xf4500000 0x8000
54 0x8 0x0 0xf8200000 0x8000>;
[all …]
Dmpc8272ads.dts25 #size-cells = <0>;
27 PowerPC,8272@0 {
29 reg = <0x0>;
34 timebase-frequency = <0>;
35 bus-frequency = <0>;
36 clock-frequency = <0>;
42 reg = <0x0 0x0>;
50 reg = <0xf0010100 0x40>;
52 ranges = <0x0 0x0 0xff800000 0x00800000
53 0x1 0x0 0xf4500000 0x8000
[all …]
Dmpc5121ads.dts21 nand@0 {
23 reg = <0x00000000 0x40000000>; /* 512MB + 512MB */
28 ranges = <0x0 0x0 0xfc000000 0x04000000
29 0x2 0x0 0x82000000 0x00008000>;
31 flash@0,0 {
33 reg = <0 0x0 0x4000000>;
39 protected@0 {
41 reg = <0x00000000 0x00040000>; // first sector is protected
46 reg = <0x00040000 0x03c00000>; // 60M for filesystem
50 reg = <0x03c40000 0x00280000>; // 2.5M for kernel
[all …]
Dmpc8379_mds.dts26 #size-cells = <0>;
28 PowerPC,8379@0 {
30 reg = <0x0>;
35 timebase-frequency = <0>;
36 bus-frequency = <0>;
37 clock-frequency = <0>;
43 reg = <0x00000000 0x20000000>; // 512MB at 0
50 reg = <0xe0005000 0x1000>;
51 interrupts = <77 0x8>;
55 ranges = <0 0x0 0xfe000000 0x02000000
[all …]
Dmpc8378_mds.dts28 #size-cells = <0>;
30 PowerPC,8378@0 {
32 reg = <0x0>;
37 timebase-frequency = <0>;
38 bus-frequency = <0>;
39 clock-frequency = <0>;
45 reg = <0x00000000 0x20000000>; // 512MB at 0
52 reg = <0xe0005000 0x1000>;
53 interrupts = <77 0x8>;
57 ranges = <0 0x0 0xfe000000 0x02000000
[all …]
Dmpc832x_mds.dts39 #size-cells = <0>;
41 PowerPC,8323@0 {
43 reg = <0x0>;
48 timebase-frequency = <0>;
49 bus-frequency = <0>;
50 clock-frequency = <0>;
56 reg = <0x00000000 0x08000000>;
61 reg = <0xf8000000 0x8000>;
69 ranges = <0x0 0xe0000000 0x00100000>;
70 reg = <0xe0000000 0x00000200>;
[all …]
Dmpc8377_mds.dts28 #size-cells = <0>;
30 PowerPC,8377@0 {
32 reg = <0x0>;
37 timebase-frequency = <0>;
38 bus-frequency = <0>;
39 clock-frequency = <0>;
45 reg = <0x00000000 0x20000000>; // 512MB at 0
52 reg = <0xe0005000 0x1000>;
53 interrupts = <77 0x8>;
57 ranges = <0 0x0 0xfe000000 0x02000000
[all …]
Dmpc836x_mds.dts31 #size-cells = <0>;
33 PowerPC,8360@0 {
35 reg = <0x0>;
48 reg = <0x00000000 0x10000000>;
56 reg = <0xe0005000 0xd8>;
57 ranges = <0 0 0xfe000000 0x02000000
58 1 0 0xf8000000 0x00008000>;
60 flash@0,0 {
62 reg = <0 0 0x2000000>;
67 bcsr@1,0 {
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/nvmem/
Dqcom,spmi-sdam.yaml41 #size-cells = <0>;
45 reg = <0xb000>;
48 ranges = <0 0xb000 0x100>;
52 reg = <0x50 0x1>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/nvmem/
Dqcom,spmi-sdam.yaml42 "^.*@[0-9a-f]+$":
56 - minimum: 0
77 reg = <0xb000 0x100>;
78 ranges = <0 0xb000 0x100>;
82 reg = <0x50 0x1>;
/kernel/linux/linux-5.10/arch/arm/mach-ux500/
Ddb8500-regs.h10 #define U8500_ESRAM_BASE 0x40000000
11 #define U8500_ESRAM_BANK_SIZE 0x00020000
21 #define U8500_ESRAM_DMA_LCPA_OFFSET 0x10000
28 #define U8500_PER3_BASE 0x80000000
29 #define U8500_STM_BASE 0x80100000
30 #define U8500_STM_REG_BASE (U8500_STM_BASE + 0xF000)
31 #define U8500_PER2_BASE 0x80110000
32 #define U8500_PER1_BASE 0x80120000
33 #define U8500_B2R2_BASE 0x80130000
34 #define U8500_HSEM_BASE 0x80140000
[all …]
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/
Dmpc8548cds.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x01000000>;
44 partition@0 {
45 reg = <0x0 0x0b00000>;
50 reg = <0x0b00000 0x0400000>;
55 reg = <0x0f00000 0x060000>;
60 reg = <0x0f60000 0x020000>;
66 reg = <0x0f80000 0x080000>;
72 board-control@1,0 {
74 reg = <0x1 0x0 0x1000>;
[all …]
/kernel/linux/linux-5.10/drivers/clk/qcom/
Dturingcc-qcs404.c23 .halt_reg = 0x5098,
26 .enable_reg = 0x5098,
27 .enable_mask = BIT(0),
36 .halt_reg = 0x9000,
39 .enable_reg = 0x9000,
40 .enable_mask = BIT(0),
49 .halt_reg = 0xb000,
52 .enable_reg = 0xb000,
53 .enable_mask = BIT(0),
62 .halt_reg = 0x10000,
[all …]
/kernel/linux/linux-6.6/drivers/clk/qcom/
Dturingcc-qcs404.c24 .halt_reg = 0x5098,
27 .enable_reg = 0x5098,
28 .enable_mask = BIT(0),
37 .halt_reg = 0x9000,
40 .enable_reg = 0x9000,
41 .enable_mask = BIT(0),
50 .halt_reg = 0xb000,
53 .enable_reg = 0xb000,
54 .enable_mask = BIT(0),
63 .halt_reg = 0x10000,
[all …]
/kernel/linux/linux-6.6/arch/powerpc/boot/dts/
Dmpc5121ads.dts21 nand@0 {
23 reg = <0x00000000 0x40000000>; /* 512MB + 512MB */
28 ranges = <0x0 0x0 0xfc000000 0x04000000
29 0x2 0x0 0x82000000 0x00008000>;
31 flash@0,0 {
33 reg = <0 0x0 0x4000000>;
39 protected@0 {
41 reg = <0x00000000 0x00040000>; // first sector is protected
46 reg = <0x00040000 0x03c00000>; // 60M for filesystem
50 reg = <0x03c40000 0x00280000>; // 2.5M for kernel
[all …]
/kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/
Dif_defs.h19 #define HIVE_IF_FRAME_REQUEST 0xA000
20 #define HIVE_IF_LINES_REQUEST 0xB000
21 #define HIVE_IF_VECTORS_REQUEST 0xC000
/kernel/linux/linux-6.6/drivers/staging/media/atomisp/pci/
Dif_defs.h19 #define HIVE_IF_FRAME_REQUEST 0xA000
20 #define HIVE_IF_LINES_REQUEST 0xB000
21 #define HIVE_IF_VECTORS_REQUEST 0xC000
/kernel/linux/linux-5.10/drivers/media/platform/mtk-vcodec/
Dvdec_ipi_msg.h16 AP_IPIMSG_DEC_INIT = 0xA000,
17 AP_IPIMSG_DEC_START = 0xA001,
18 AP_IPIMSG_DEC_END = 0xA002,
19 AP_IPIMSG_DEC_DEINIT = 0xA003,
20 AP_IPIMSG_DEC_RESET = 0xA004,
22 VPU_IPIMSG_DEC_INIT_ACK = 0xB000,
23 VPU_IPIMSG_DEC_START_ACK = 0xB001,
24 VPU_IPIMSG_DEC_END_ACK = 0xB002,
25 VPU_IPIMSG_DEC_DEINIT_ACK = 0xB003,
26 VPU_IPIMSG_DEC_RESET_ACK = 0xB004,
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-ixp4xx/include/mach/
Dixp4xx-regs.h23 * 0x00000000 0x10000000(max) PAGE_OFFSET System RAM
25 * 0x48000000 0x04000000 ioremap'd PCI Memory Space
27 * 0x50000000 0x10000000 ioremap'd EXP BUS
29 * 0xC8000000 0x00013000 0xFEF00000 On-Chip Peripherals
31 * 0xC0000000 0x00001000 0xFEF13000 PCI CFG
33 * 0xC4000000 0x00001000 0xFEF14000 EXP CFG
35 * 0x60000000 0x00004000 0xFEF15000 QMgr
41 #define IXP4XX_QMGR_BASE_PHYS 0x60000000
47 #define IXP4XX_PERIPHERAL_BASE_PHYS 0xC8000000
48 #define IXP4XX_PERIPHERAL_BASE_VIRT IOMEM(0xFEF00000)
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dpmk8350.dtsi13 #define PMK8350_SID 0
21 mode-recovery = <0x01>;
22 mode-bootloader = <0x02>;
31 #size-cells = <0>;
35 reg = <0x1300>, <0x800>;
40 interrupts = <PMK8350_SID 0x13 0x7 IRQ_TYPE_EDGE_BOTH>;
47 interrupts = <PMK8350_SID 0x13 0x6 IRQ_TYPE_EDGE_BOTH>;
54 reg = <0x3100>;
56 #size-cells = <0>;
57 interrupts = <PMK8350_SID 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
[all …]

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