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Searched +full:0 +full:xc400 (Results 1 – 25 of 84) sorted by relevance

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/kernel/linux/linux-5.10/drivers/dma/ti/
Dk3-psil-priv.h25 * 0x4400 and 0xc400) only the src configuration can be present. If no dst
26 * configuration found the code will look for (dst_thread_id & ~0x8000) to find
/kernel/linux/linux-6.6/drivers/dma/ti/
Dk3-psil-priv.h25 * 0x4400 and 0xc400) only the src configuration can be present. If no dst
26 * configuration found the code will look for (dst_thread_id & ~0x8000) to find
Dk3-psil-am62a.c83 PSIL_SAUL(0x7504, 20, 35, 8, 35, 0),
84 PSIL_SAUL(0x7505, 21, 35, 8, 36, 0),
85 PSIL_SAUL(0x7506, 22, 43, 8, 43, 0),
86 PSIL_SAUL(0x7507, 23, 43, 8, 44, 0),
88 PSIL_PDMA_XY_PKT(0x4300),
89 PSIL_PDMA_XY_PKT(0x4301),
90 PSIL_PDMA_XY_PKT(0x4302),
91 PSIL_PDMA_XY_PKT(0x4303),
92 PSIL_PDMA_XY_PKT(0x4304),
93 PSIL_PDMA_XY_PKT(0x4305),
[all …]
Dk3-psil-am62.c73 PSIL_SAUL(0x7504, 20, 35, 8, 35, 0),
74 PSIL_SAUL(0x7505, 21, 35, 8, 36, 0),
75 PSIL_SAUL(0x7506, 22, 43, 8, 43, 0),
76 PSIL_SAUL(0x7507, 23, 43, 8, 44, 0),
78 PSIL_PDMA_XY_PKT(0x4300),
79 PSIL_PDMA_XY_PKT(0x4301),
80 PSIL_PDMA_XY_PKT(0x4302),
81 PSIL_PDMA_XY_PKT(0x4303),
82 PSIL_PDMA_XY_PKT(0x4304),
83 PSIL_PDMA_XY_PKT(0x4305),
[all …]
Dk3-psil-j7200.c64 PSIL_PDMA_MCASP(0x4400),
65 PSIL_PDMA_MCASP(0x4401),
66 PSIL_PDMA_MCASP(0x4402),
68 PSIL_PDMA_XY_PKT(0x4600),
69 PSIL_PDMA_XY_PKT(0x4601),
70 PSIL_PDMA_XY_PKT(0x4602),
71 PSIL_PDMA_XY_PKT(0x4603),
72 PSIL_PDMA_XY_PKT(0x4604),
73 PSIL_PDMA_XY_PKT(0x4605),
74 PSIL_PDMA_XY_PKT(0x4606),
[all …]
Dk3-psil-j721e.c72 PSIL_SA2UL(0x4000, 0),
73 PSIL_SA2UL(0x4001, 0),
74 PSIL_SA2UL(0x4002, 0),
75 PSIL_SA2UL(0x4003, 0),
77 PSIL_ETHERNET(0x4100),
78 PSIL_ETHERNET(0x4101),
79 PSIL_ETHERNET(0x4102),
80 PSIL_ETHERNET(0x4103),
82 PSIL_ETHERNET(0x4200),
83 PSIL_ETHERNET(0x4201),
[all …]
/kernel/linux/linux-6.6/arch/csky/kernel/
Djump_label.c10 #define NOP32_HI 0xc400
11 #define NOP32_LO 0x4820
12 #define BSR_LINK 0xe000
19 int ret = 0; in arch_jump_label_transform()
29 insn[0] = BSR_LINK | in arch_jump_label_transform()
30 ((uint16_t)((unsigned long) offset >> 16) & 0x3ff); in arch_jump_label_transform()
31 insn[1] = (uint16_t)((unsigned long) offset & 0xffff); in arch_jump_label_transform()
33 insn[0] = NOP32_HI; in arch_jump_label_transform()
Dftrace.c11 #define NOP 0x4000
12 #define NOP32_HI 0xc400
13 #define NOP32_LO 0x4820
14 #define PUSH_LR 0x14d0
15 #define MOVIH_LINK 0xea3a
16 #define ORI_LINK 0xef5a
17 #define JSR_LINK 0xe8fa
18 #define BSR_LINK 0xe000
46 call[0] = nolr ? NOP : PUSH_LR; in make_jbsr()
54 call[4] = callee & 0xffff; in make_jbsr()
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/chelsio/cxgb3/
Daq100x.c38 AQ_LINK_STAT = 0xe800,
39 AQ_IMASK_PMA = 0xf000,
42 AQ_XAUI_RX_CFG = 0xc400,
43 AQ_XAUI_TX_CFG = 0xe400,
46 AQ_1G_CTRL = 0xc400,
47 AQ_ANEG_STAT = 0xc800,
50 AQ_FW_VERSION = 0x0020,
51 AQ_IFLAG_GLOBAL = 0xfc00,
52 AQ_IMASK_GLOBAL = 0xff00,
74 CH_WARN(phy->adapter, "PHY%d: reset failed (0x%x).\n", in aq100x_reset()
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/chelsio/cxgb3/
Daq100x.c38 AQ_LINK_STAT = 0xe800,
39 AQ_IMASK_PMA = 0xf000,
42 AQ_XAUI_RX_CFG = 0xc400,
43 AQ_XAUI_TX_CFG = 0xe400,
46 AQ_1G_CTRL = 0xc400,
47 AQ_ANEG_STAT = 0xc800,
50 AQ_FW_VERSION = 0x0020,
51 AQ_IFLAG_GLOBAL = 0xfc00,
52 AQ_IMASK_GLOBAL = 0xff00,
74 CH_WARN(phy->adapter, "PHY%d: reset failed (0x%x).\n", in aq100x_reset()
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/
Ddavinci-mcasp-audio.yaml35 description: 0 - I2S or 1 - DIT operation mode
37 - 0
52 0 - Inactive, 1 - TX, 2 - RX
58 minimum: 0
83 0 disables the FIFO use
90 0 disables the FIFO use
97 0 - 3-state, 2 - logic low, 3 - logic high
99 - 0
154 const: 0
175 - 0
[all …]
/kernel/linux/linux-6.6/drivers/staging/media/meson/vdec/
Dhevc_regs.h9 #define HEVC_ASSIST_MMU_MAP_ADDR 0xc024
11 #define HEVC_ASSIST_MBOX1_CLR_REG 0xc1d4
12 #define HEVC_ASSIST_MBOX1_MASK 0xc1d8
14 #define HEVC_ASSIST_SCRATCH_0 0xc300
15 #define HEVC_ASSIST_SCRATCH_1 0xc304
16 #define HEVC_ASSIST_SCRATCH_2 0xc308
17 #define HEVC_ASSIST_SCRATCH_3 0xc30c
18 #define HEVC_ASSIST_SCRATCH_4 0xc310
19 #define HEVC_ASSIST_SCRATCH_5 0xc314
20 #define HEVC_ASSIST_SCRATCH_6 0xc318
[all …]
/kernel/linux/linux-5.10/drivers/staging/media/meson/vdec/
Dhevc_regs.h9 #define HEVC_ASSIST_MMU_MAP_ADDR 0xc024
11 #define HEVC_ASSIST_MBOX1_CLR_REG 0xc1d4
12 #define HEVC_ASSIST_MBOX1_MASK 0xc1d8
14 #define HEVC_ASSIST_SCRATCH_0 0xc300
15 #define HEVC_ASSIST_SCRATCH_1 0xc304
16 #define HEVC_ASSIST_SCRATCH_2 0xc308
17 #define HEVC_ASSIST_SCRATCH_3 0xc30c
18 #define HEVC_ASSIST_SCRATCH_4 0xc310
19 #define HEVC_ASSIST_SCRATCH_5 0xc314
20 #define HEVC_ASSIST_SCRATCH_6 0xc318
[all …]
/kernel/linux/linux-5.10/arch/csky/kernel/
Dftrace.c11 #define NOP 0x4000
12 #define NOP32_HI 0xc400
13 #define NOP32_LO 0x4820
14 #define PUSH_LR 0x14d0
15 #define MOVIH_LINK 0xea3a
16 #define ORI_LINK 0xef5a
17 #define JSR_LINK 0xe8fa
18 #define BSR_LINK 0xe000
46 call[0] = nolr ? NOP : PUSH_LR; in make_jbsr()
54 call[4] = callee & 0xffff; in make_jbsr()
[all …]
/kernel/linux/linux-5.10/drivers/ide/
Dit821x.c19 * o Rev 0x10 also requires master/slave hold the same DMA timings and
76 timing10:1; /* Rev 0x10 */
77 u8 clock_mode; /* 0, ATA_50 or ATA_66 */
87 #define ATA_66 0
91 #define UDMA_OFF 0
92 #define MWDMA_OFF 0
124 conf = timing & 0xFF; in it821x_program()
126 pci_write_config_byte(dev, 0x54 + 4 * channel, conf); in it821x_program()
150 conf = timing & 0xFF; in it821x_program_udma()
152 if (itdev->timing10 == 0) in it821x_program_udma()
[all …]
/kernel/linux/linux-5.10/drivers/net/dsa/
Dbcm_sf2_regs.h13 REG_SWITCH_CNTRL = 0,
30 #define MDIO_MASTER_SEL (1 << 0)
33 #define SF2_REV_MASK 0xffff
35 #define SWITCH_TOP_REV_MASK 0xffff
38 #define PHY_REVISION_MASK 0xffff
41 #define IDDQ_BIAS (1 << 0)
48 #define PHY_PHYAD_MASK 0x1F
53 #define RGMII_MODE_EN (1 << 0)
56 #define INT_EPHY (0 << PORT_MODE_SHIFT)
61 #define PORT_MODE_MASK 0x7
[all …]
/kernel/linux/linux-6.6/drivers/net/dsa/
Dbcm_sf2_regs.h13 REG_SWITCH_CNTRL = 0,
36 #define MDIO_MASTER_SEL (1 << 0)
39 #define SF2_REV_MASK 0xffff
41 #define SWITCH_TOP_REV_MASK 0xffff
44 #define PHY_REVISION_MASK 0xffff
47 #define IDDQ_BIAS (1 << 0)
54 #define PHY_PHYAD_MASK 0x1F
57 #define CROSSBAR_BCM4908_INT_P7 0
59 #define CROSSBAR_BCM4908_EXT_SERDES 0
64 #define LED_CNTRL_NO_LINK_ENCODE_SHIFT 0
[all …]
/kernel/linux/linux-5.10/drivers/ptp/
Didt8a340_reg.h8 * Based on 4.8.0, SCSR rev C commit a03c7ae5
13 #define PAGE_ADDR_BASE 0x0000
14 #define PAGE_ADDR 0x00fc
16 #define HW_REVISION 0x8180
17 #define REV_ID 0x007a
19 #define HW_DPLL_0 (0x8a00)
20 #define HW_DPLL_1 (0x8b00)
21 #define HW_DPLL_2 (0x8c00)
22 #define HW_DPLL_3 (0x8d00)
23 #define HW_DPLL_4 (0x8e00)
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/broadcom/bcmbca/
Dbcm4908.dtsi26 #size-cells = <0>;
28 cpu0: cpu@0 {
31 reg = <0x0>;
33 cpu-release-addr = <0x0 0xfff8>;
40 reg = <0x1>;
42 cpu-release-addr = <0x0 0xfff8>;
49 reg = <0x2>;
51 cpu-release-addr = <0x0 0xfff8>;
58 reg = <0x3>;
60 cpu-release-addr = <0x0 0xfff8>;
[all …]
/kernel/linux/linux-6.6/drivers/net/wireless/mediatek/mt7601u/
Dinit.c94 mt7601u_wr(dev, MT_USB_DMA_CFG, 0); in mt7601u_reset_csr_bbp()
96 mt7601u_wr(dev, MT_MAC_SYS_CTRL, 0); in mt7601u_reset_csr_bbp()
142 for (i = 0; i < 16; i++) { in mt76_init_beacon_offsets()
148 for (i = 0; i < 4; i++) in mt76_init_beacon_offsets()
167 mt7601u_wr(dev, MT_AUX_CLK_CFG, 0); in mt7601u_write_mac_initvals()
169 return 0; in mt7601u_write_mac_initvals()
181 for (i = 0; i < N_WCIDS; i++) { in mt7601u_init_wcid_mem()
182 vals[i * 2] = 0xffffffff; in mt7601u_init_wcid_mem()
183 vals[i * 2 + 1] = 0x00ffffff; in mt7601u_init_wcid_mem()
210 for (i = 0; i < N_WCIDS * 2; i++) in mt7601u_init_wcid_attr_mem()
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/mediatek/mt7601u/
Dinit.c94 mt7601u_wr(dev, MT_USB_DMA_CFG, 0); in mt7601u_reset_csr_bbp()
96 mt7601u_wr(dev, MT_MAC_SYS_CTRL, 0); in mt7601u_reset_csr_bbp()
142 for (i = 0; i < 16; i++) { in mt76_init_beacon_offsets()
148 for (i = 0; i < 4; i++) in mt76_init_beacon_offsets()
167 mt7601u_wr(dev, MT_AUX_CLK_CFG, 0); in mt7601u_write_mac_initvals()
169 return 0; in mt7601u_write_mac_initvals()
181 for (i = 0; i < N_WCIDS; i++) { in mt7601u_init_wcid_mem()
182 vals[i * 2] = 0xffffffff; in mt7601u_init_wcid_mem()
183 vals[i * 2 + 1] = 0x00ffffff; in mt7601u_init_wcid_mem()
210 for (i = 0; i < N_WCIDS * 2; i++) in mt7601u_init_wcid_attr_mem()
[all …]
/kernel/linux/linux-5.10/drivers/net/phy/
Daquantia_main.c18 #define PHY_ID_AQ1202 0x03a1b445
19 #define PHY_ID_AQ2104 0x03a1b460
20 #define PHY_ID_AQR105 0x03a1b4a2
21 #define PHY_ID_AQR106 0x03a1b4d0
22 #define PHY_ID_AQR107 0x03a1b4e0
23 #define PHY_ID_AQCS109 0x03a1b5c2
24 #define PHY_ID_AQR405 0x03a1b4b0
26 #define MDIO_PHYXS_VEND_IF_STATUS 0xe812
28 #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_KR 0
34 #define MDIO_AN_VEND_PROV 0xc400
[all …]
/kernel/linux/linux-6.6/include/linux/mfd/
Didt8a340_reg.h3 * Based on 5.2.0, Family Programming Guide (Sept 30, 2020)
10 #define PAGE_ADDR_BASE 0x0000
11 #define PAGE_ADDR 0x00fc
13 #define HW_REVISION 0x8180
14 #define REV_ID 0x007a
16 #define HW_DPLL_0 (0x8a00)
17 #define HW_DPLL_1 (0x8b00)
18 #define HW_DPLL_2 (0x8c00)
19 #define HW_DPLL_3 (0x8d00)
20 #define HW_DPLL_4 (0x8e00)
[all …]
/kernel/linux/linux-6.6/drivers/net/phy/
Daquantia_main.c18 #define PHY_ID_AQ1202 0x03a1b445
19 #define PHY_ID_AQ2104 0x03a1b460
20 #define PHY_ID_AQR105 0x03a1b4a2
21 #define PHY_ID_AQR106 0x03a1b4d0
22 #define PHY_ID_AQR107 0x03a1b4e0
23 #define PHY_ID_AQCS109 0x03a1b5c2
24 #define PHY_ID_AQR405 0x03a1b4b0
25 #define PHY_ID_AQR112 0x03a1b662
26 #define PHY_ID_AQR412 0x03a1b712
27 #define PHY_ID_AQR113C 0x31c31c12
[all …]
/kernel/linux/linux-6.6/sound/soc/codecs/
Drt1318-sdw.c24 { 0xc001, 0x43 },
25 { 0xc003, 0xa2 },
26 { 0xc004, 0x44 },
27 { 0xc005, 0x44 },
28 { 0xc006, 0x33 },
29 { 0xc007, 0x64 },
30 { 0xc320, 0x20 },
31 { 0xf203, 0x18 },
32 { 0xf211, 0x00 },
33 { 0xf212, 0x26 },
[all …]

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