| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/ |
| D | mmp-dma.txt | 28 * For example, pxa688 icu register 0x128, bit 0~15 is PDMA channel irq, 33 reg = <0xd4000000 0x10000>; 34 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>; 46 reg = <0xd4000000 0x10000>; 69 reg = <0xd42a0800 0x100>; 77 reg = <0xd42a0800 0x100>;
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/dma/ |
| D | mmp-dma.txt | 30 * For example, pxa688 icu register 0x128, bit 0~15 is PDMA channel irq, 35 reg = <0xd4000000 0x10000>; 36 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>; 48 reg = <0xd4000000 0x10000>; 71 reg = <0xd42a0800 0x100>; 79 reg = <0xd42a0800 0x100>;
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/ |
| D | intel-gw-pcie.yaml | 96 reg = <0xd0e00000 0x1000>, 97 <0xd2000000 0x800000>, 98 <0xd0a41000 0x1000>; 100 linux,pci-domain = <0>; 102 bus-range = <0x00 0x08>; 104 interrupt-map-mask = <0 0 0 0x7>; 105 interrupt-map = <0 0 0 1 &ioapic1 27 1>, 106 <0 0 0 2 &ioapic1 28 1>, 107 <0 0 0 3 &ioapic1 29 1>, 108 <0 0 0 4 &ioapic1 30 1>; [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/ |
| D | intel-gw-pcie.yaml | 122 reg = <0xd0e00000 0x1000>, 123 <0xd2000000 0x800000>, 124 <0xd0a41000 0x1000>; 126 linux,pci-domain = <0>; 128 bus-range = <0x00 0x08>; 130 interrupt-map-mask = <0 0 0 0x7>; 131 interrupt-map = <0 0 0 1 &ioapic1 27 1>, 132 <0 0 0 2 &ioapic1 28 1>, 133 <0 0 0 3 &ioapic1 29 1>, 134 <0 0 0 4 &ioapic1 30 1>; [all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-mmp/ |
| D | addr-map.h | 15 #define APB_PHYS_BASE 0xd4000000 16 #define APB_VIRT_BASE IOMEM(0xfe000000) 17 #define APB_PHYS_SIZE 0x00200000 19 #define AXI_PHYS_BASE 0xd4200000 20 #define AXI_VIRT_BASE IOMEM(0xfe200000) 21 #define AXI_PHYS_SIZE 0x00200000 23 #define PGU_PHYS_BASE 0xe0000000 24 #define PGU_VIRT_BASE IOMEM(0xfe400000) 25 #define PGU_PHYS_SIZE 0x00100000 27 /* Static Memory Controller - Chip Select 0 and 1 */ [all …]
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| /kernel/linux/linux-6.6/arch/arm/mach-mmp/ |
| D | addr-map.h | 15 #define APB_PHYS_BASE 0xd4000000 16 #define APB_VIRT_BASE IOMEM(0xfe000000) 17 #define APB_PHYS_SIZE 0x00200000 19 #define AXI_PHYS_BASE 0xd4200000 20 #define AXI_VIRT_BASE IOMEM(0xfe200000) 21 #define AXI_PHYS_SIZE 0x00200000 23 #define PGU_PHYS_BASE 0xe0000000 24 #define PGU_VIRT_BASE IOMEM(0xfe400000) 25 #define PGU_PHYS_SIZE 0x00100000 27 /* Static Memory Controller - Chip Select 0 and 1 */ [all …]
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| /kernel/linux/linux-6.6/arch/riscv/boot/dts/microchip/ |
| D | mpfs-sev-kit.dts | 42 reg = <0x0 0x80000000 0x0 0x2000000>; 47 reg = <0x0 0xc4000000 0x0 0x4000000>; 52 reg = <0x0 0xd4000000 0x0 0x4000000>; 58 reg = <0x10 0x0 0x0 0x76000000>;
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | pxa168.dtsi | 32 reg = <0xd4200000 0x00200000>; 39 reg = <0xd4282000 0x1000>; 49 reg = <0xd4000000 0x00200000>; 54 reg = <0xd4014000 0x100>; 60 reg = <0xd4017000 0x1000>; 70 reg = <0xd4018000 0x1000>; 80 reg = <0xd4026000 0x1000>; 92 reg = <0xd4019000 0x1000>; 104 reg = <0xd4019000 0x4>; 108 reg = <0xd4019004 0x4>; [all …]
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| D | pxa910.dtsi | 30 marvell,tauros2-cache-features = <0x3>; 37 reg = <0xd4200000 0x00200000>; 44 reg = <0xd4282000 0x1000>; 54 reg = <0xd4000000 0x00200000>; 59 reg = <0xd4014000 0x100>; 65 reg = <0xd4016000 0x100>; 72 reg = <0xd4017000 0x1000>; 82 reg = <0xd4018000 0x1000>; 92 reg = <0xd4036000 0x1000>; 104 reg = <0xd4019000 0x1000>; [all …]
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| D | mmp2.dtsi | 32 marvell,tauros2-cache-features = <0x3>; 39 reg = <0xd4200000 0x00200000>; 44 reg = <0xd420d000 0x4000>; 57 reg = <0xd4282000 0x1000>; 66 reg = <0x150 0x4>, <0x168 0x4>; 76 reg = <0x154 0x4>, <0x16c 0x4>; 87 reg = <0x180 0x4>, <0x17c 0x4>; 97 reg = <0x158 0x4>, <0x170 0x4>; 107 reg = <0x15c 0x4>, <0x174 0x4>; 117 reg = <0x160 0x4>, <0x178 0x4>; [all …]
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| D | stm32mp157c-odyssey-som.dtsi | 22 reg = <0xc0000000 0x20000000>; 32 reg = <0x10000000 0x40000>; 38 reg = <0x10040000 0x1000>; 44 reg = <0x10041000 0x1000>; 50 reg = <0x10042000 0x4000>; 56 reg = <0x30000000 0x40000>; 62 reg = <0x38000000 0x10000>; 67 reg = <0xd4000000 0x4000000>; 90 pinctrl-0 = <&i2c2_pins_a>; 100 reg = <0x33>; [all …]
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| D | imx27.dtsi | 47 reg = <0x10040000 0x1000>; 53 #clock-cells = <0>; 59 #size-cells = <0>; 62 cpu: cpu@0 { 64 reg = <0>; 88 reg = <0x10000000 0x20000>; 93 reg = <0x10001000 0x1000>; 104 reg = <0x10002000 0x1000>; 111 reg = <0x10003000 0x1000>; 120 reg = <0x10004000 0x1000>; [all …]
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| D | stm32mp15xx-dkx.dtsi | 13 reg = <0xc0000000 0x20000000>; 23 reg = <0x10000000 0x40000>; 29 reg = <0x10040000 0x1000>; 35 reg = <0x10041000 0x1000>; 41 reg = <0x10042000 0x4000>; 47 reg = <0x30000000 0x40000>; 53 reg = <0x38000000 0x10000>; 58 reg = <0xd4000000 0x4000000>; 95 pinctrl-0 = <&adc12_ain_pins_a>, <&adc12_usb_cc_pins_a>; 100 adc1: adc@0 { [all …]
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| D | mmp3.dtsi | 16 #size-cells = <0>; 19 cpu@0 { 23 reg = <0>; 45 reg = <0xd4200000 0x00200000>; 52 reg = <0xd4282000 0x1000>, 53 <0xd4284000 0x100>; 62 reg = <0x150 0x4>, <0x168 0x4>; 72 reg = <0x154 0x4>, <0x16c 0x4>; 82 reg = <0x1bc 0x4>, <0x1a4 0x4>; 92 reg = <0x1c0 0x4>, <0x1a8 0x4>; [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/marvell/ |
| D | pxa910.dtsi | 30 marvell,tauros2-cache-features = <0x3>; 37 reg = <0xd4200000 0x00200000>; 44 reg = <0xd4282000 0x1000>; 54 reg = <0xd4000000 0x00200000>; 59 reg = <0xd4014000 0x100>; 65 reg = <0xd4016000 0x100>; 72 reg = <0xd4017000 0x1000>; 82 reg = <0xd4018000 0x1000>; 92 reg = <0xd4036000 0x1000>; 104 reg = <0xd4019000 0x1000>; [all …]
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| D | pxa168.dtsi | 32 reg = <0xd4200000 0x00200000>; 39 reg = <0xd4282000 0x1000>; 49 reg = <0xd4000000 0x00200000>; 54 reg = <0xd4014000 0x100>; 62 reg = <0xd4017000 0x1000>; 72 reg = <0xd4018000 0x1000>; 82 reg = <0xd4026000 0x1000>; 94 reg = <0xd4019000 0x1000>; 106 reg = <0xd4019000 0x4>; 110 reg = <0xd4019004 0x4>; [all …]
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| D | mmp2.dtsi | 33 marvell,tauros2-cache-features = <0x3>; 40 reg = <0xd4200000 0x00200000>; 45 reg = <0xd420d000 0x4000>; 58 reg = <0xd4282000 0x1000>; 67 reg = <0x150 0x4>, <0x168 0x4>; 77 reg = <0x154 0x4>, <0x16c 0x4>; 88 reg = <0x180 0x4>, <0x17c 0x4>; 98 reg = <0x158 0x4>, <0x170 0x4>; 108 reg = <0x15c 0x4>, <0x174 0x4>; 118 reg = <0x160 0x4>, <0x178 0x4>; [all …]
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| D | mmp3.dtsi | 16 #size-cells = <0>; 19 cpu@0 { 23 reg = <0>; 45 reg = <0xd4200000 0x00200000>; 52 reg = <0xd4282000 0x1000>, 53 <0xd4284000 0x100>; 62 reg = <0x150 0x4>, <0x168 0x4>; 72 reg = <0x154 0x4>, <0x16c 0x4>; 82 reg = <0x1bc 0x4>, <0x1a4 0x4>; 92 reg = <0x1c0 0x4>, <0x1a8 0x4>; [all …]
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| /kernel/linux/linux-6.6/arch/nios2/boot/dts/ |
| D | 10m50_devboard.dts | 16 #size-cells = <0>; 18 cpu: cpu@0 { 21 reg = <0x00000000>; 24 altr,exception-addr = <0xc8000120>; 25 altr,fast-tlb-miss-addr = <0xc0000100>; 32 altr,reset-addr = <0xd4000000>; 46 reg = <0x08000000 0x08000000>, 47 <0x00000000 0x00000400>; 50 sopc0: sopc@0 { 60 reg = <0x18001530 0x00000008>; [all …]
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| /kernel/linux/linux-5.10/arch/nios2/boot/dts/ |
| D | 10m50_devboard.dts | 16 #size-cells = <0>; 18 cpu: cpu@0 { 21 reg = <0x00000000>; 24 altr,exception-addr = <0xc8000120>; 25 altr,fast-tlb-miss-addr = <0xc0000100>; 32 altr,reset-addr = <0xd4000000>; 46 reg = <0x08000000 0x08000000>, 47 <0x00000000 0x00000400>; 50 sopc0: sopc@0 { 60 reg = <0x18001530 0x00000008>; [all …]
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| /kernel/linux/linux-5.10/arch/arm64/include/asm/ |
| D | insn.h | 22 * 0 0 - - Unallocated 23 * 1 0 0 - Data processing, immediate 24 * 1 0 1 - Branch, exception generation and system instructions 25 * - 1 - 0 Loads and stores 26 * - 1 0 1 Data processing - register 27 * 0 1 1 1 Data processing - SIMD and floating point 42 AARCH64_INSN_HINT_NOP = 0x0 << 5, 43 AARCH64_INSN_HINT_YIELD = 0x1 << 5, 44 AARCH64_INSN_HINT_WFE = 0x2 << 5, 45 AARCH64_INSN_HINT_WFI = 0x3 << 5, [all …]
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| /kernel/linux/linux-6.6/arch/arm64/include/asm/ |
| D | insn.h | 18 AARCH64_INSN_HINT_NOP = 0x0 << 5, 19 AARCH64_INSN_HINT_YIELD = 0x1 << 5, 20 AARCH64_INSN_HINT_WFE = 0x2 << 5, 21 AARCH64_INSN_HINT_WFI = 0x3 << 5, 22 AARCH64_INSN_HINT_SEV = 0x4 << 5, 23 AARCH64_INSN_HINT_SEVL = 0x5 << 5, 25 AARCH64_INSN_HINT_XPACLRI = 0x07 << 5, 26 AARCH64_INSN_HINT_PACIA_1716 = 0x08 << 5, 27 AARCH64_INSN_HINT_PACIB_1716 = 0x0A << 5, 28 AARCH64_INSN_HINT_AUTIA_1716 = 0x0C << 5, [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/imx/ |
| D | imx27.dtsi | 47 reg = <0x10040000 0x1000>; 53 #clock-cells = <0>; 59 #size-cells = <0>; 62 cpu: cpu@0 { 64 reg = <0>; 88 reg = <0x10000000 0x20000>; 93 reg = <0x10001000 0x1000>; 104 reg = <0x10002000 0x1000>; 111 reg = <0x10003000 0x1000>; 120 reg = <0x10004000 0x1000>; [all …]
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| /kernel/linux/linux-6.6/crypto/ |
| D | aes_generic.c | 67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6, 68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591, 69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56, 70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec, 71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa, 72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb, 73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45, 74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b, 75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c, 76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83, [all …]
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| /kernel/linux/linux-5.10/crypto/ |
| D | aes_generic.c | 67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6, 68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591, 69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56, 70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec, 71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa, 72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb, 73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45, 74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b, 75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c, 76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83, [all …]
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