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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Drenesas,irqc.yaml82 reg = <0xe61c0000 0x200>;
83 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/interrupt-controller/
Drenesas,irqc.yaml87 reg = <0xe61c0000 0x200>;
88 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
/kernel/linux/linux-5.10/arch/arm/mach-shmobile/
Dregulator-quirk-rcar-gen2.c32 #define IRQC_BASE 0xe61c0000
33 #define IRQC_MONITOR 0x104 /* IRQn Signal Level Monitor Register */
38 #define DA9210_REG_MASK_A 0x54
53 static u8 da9063_irq_clr[] = { DA9063_REG_IRQ_MASK_A, 0xff, 0xff, 0xff, 0xff };
54 static u8 da9210_irq_clr[] = { DA9210_REG_MASK_A, 0xff, 0xff };
84 return 0; in regulator_quirk_notify()
87 dev_dbg(dev, "%s: %ld, IRQC_MONITOR = 0x%x\n", __func__, action, mon); in regulator_quirk_notify()
92 return 0; in regulator_quirk_notify()
109 dev_info(&client->dev, "clearing %s@0x%02x interrupts\n", in regulator_quirk_notify()
121 return 0; in regulator_quirk_notify()
[all …]
/kernel/linux/linux-6.6/arch/arm/mach-shmobile/
Dregulator-quirk-rcar-gen2.c32 #define IRQC_BASE 0xe61c0000
33 #define IRQC_MONITOR 0x104 /* IRQn Signal Level Monitor Register */
38 #define DA9210_REG_MASK_A 0x54
53 static u8 da9063_irq_clr[] = { DA9063_REG_IRQ_MASK_A, 0xff, 0xff, 0xff, 0xff };
54 static u8 da9210_irq_clr[] = { DA9210_REG_MASK_A, 0xff, 0xff };
84 return 0; in regulator_quirk_notify()
87 dev_dbg(dev, "%s: %ld, IRQC_MONITOR = 0x%x\n", __func__, action, mon); in regulator_quirk_notify()
92 return 0; in regulator_quirk_notify()
109 dev_info(&client->dev, "clearing %s@0x%02x interrupts\n", in regulator_quirk_notify()
121 return 0; in regulator_quirk_notify()
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dr8a73a4.dtsi21 #size-cells = <0>;
23 cpu0: cpu@0 {
26 reg = <0>;
33 L2_CA15: cache-controller-0 {
65 reg = <0 0xe6790000 0 0x10000>;
71 reg = <0 0xe67a0000 0 0x10000>;
86 reg = <0 0xe6700020 0 0x89e0>;
121 #size-cells = <0>;
123 reg = <0 0xe60b0000 0 0x428>;
133 reg = <0 0xe6130000 0 0x1004>;
[all …]
Dr8a7792.dtsi40 #clock-cells = <0>;
42 clock-frequency = <0>;
47 #size-cells = <0>;
50 cpu0: cpu@0 {
53 reg = <0>;
70 L2_CA15: cache-controller-0 {
81 #clock-cells = <0>;
83 clock-frequency = <0>;
96 #clock-cells = <0>;
98 clock-frequency = <0>;
[all …]
Dr8a77470.dtsi27 #size-cells = <0>;
30 cpu0: cpu@0 {
33 reg = <0>;
50 L2_CA7: cache-controller-0 {
61 #clock-cells = <0>;
63 clock-frequency = <0>;
76 #clock-cells = <0>;
78 clock-frequency = <0>;
92 reg = <0 0xe6020000 0 0x0c>;
102 reg = <0 0xe6050000 0 0x50>;
[all …]
Dr8a7794.dtsi34 * The external audio clocks are configured as 0 Hz fixed frequency
40 #clock-cells = <0>;
41 clock-frequency = <0>;
45 #clock-cells = <0>;
46 clock-frequency = <0>;
50 #clock-cells = <0>;
51 clock-frequency = <0>;
57 #clock-cells = <0>;
59 clock-frequency = <0>;
64 #size-cells = <0>;
[all …]
Dr8a7793.dtsi32 * The external audio clocks are configured as 0 Hz fixed frequency
38 #clock-cells = <0>;
39 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
48 #clock-cells = <0>;
49 clock-frequency = <0>;
55 #clock-cells = <0>;
57 clock-frequency = <0>;
62 #size-cells = <0>;
[all …]
Dr8a7745.dtsi36 * The external audio clocks are configured as 0 Hz fixed
42 #clock-cells = <0>;
43 clock-frequency = <0>;
47 #clock-cells = <0>;
48 clock-frequency = <0>;
52 #clock-cells = <0>;
53 clock-frequency = <0>;
59 #clock-cells = <0>;
61 clock-frequency = <0>;
66 #size-cells = <0>;
[all …]
Dr8a7742.dtsi19 * The external audio clocks are configured as 0 Hz fixed frequency
25 #clock-cells = <0>;
26 clock-frequency = <0>;
30 #clock-cells = <0>;
31 clock-frequency = <0>;
35 #clock-cells = <0>;
36 clock-frequency = <0>;
42 #clock-cells = <0>;
44 clock-frequency = <0>;
49 #size-cells = <0>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/renesas/
Dr8a73a4.dtsi21 #size-cells = <0>;
23 cpu0: cpu@0 {
26 reg = <0>;
33 L2_CA15: cache-controller-0 {
65 reg = <0 0xe6790000 0 0x10000>;
71 reg = <0 0xe67a0000 0 0x10000>;
77 #size-cells = <0>;
79 reg = <0 0xe60b0000 0 0x428>;
89 reg = <0 0xe6130000 0 0x1004>;
108 reg = <0 0xe61c0000 0 0x200>;
[all …]
Dr8a7792.dtsi40 #clock-cells = <0>;
42 clock-frequency = <0>;
47 #size-cells = <0>;
49 cpu0: cpu@0 {
52 reg = <0>;
71 L2_CA15: cache-controller-0 {
82 #clock-cells = <0>;
84 clock-frequency = <0>;
97 #clock-cells = <0>;
99 clock-frequency = <0>;
[all …]
Dr8a77470.dtsi27 #size-cells = <0>;
29 cpu0: cpu@0 {
32 reg = <0>;
51 L2_CA7: cache-controller-0 {
62 #clock-cells = <0>;
64 clock-frequency = <0>;
77 #clock-cells = <0>;
79 clock-frequency = <0>;
93 reg = <0 0xe6020000 0 0x0c>;
104 reg = <0 0xe6050000 0 0x50>;
[all …]
Dr8a7794.dtsi34 * The external audio clocks are configured as 0 Hz fixed frequency
40 #clock-cells = <0>;
41 clock-frequency = <0>;
45 #clock-cells = <0>;
46 clock-frequency = <0>;
50 #clock-cells = <0>;
51 clock-frequency = <0>;
57 #clock-cells = <0>;
59 clock-frequency = <0>;
64 #size-cells = <0>;
[all …]
Dr8a7793.dtsi32 * The external audio clocks are configured as 0 Hz fixed frequency
38 #clock-cells = <0>;
39 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
48 #clock-cells = <0>;
49 clock-frequency = <0>;
55 #clock-cells = <0>;
57 clock-frequency = <0>;
62 #size-cells = <0>;
[all …]
Dr8a7745.dtsi36 * The external audio clocks are configured as 0 Hz fixed
42 #clock-cells = <0>;
43 clock-frequency = <0>;
47 #clock-cells = <0>;
48 clock-frequency = <0>;
52 #clock-cells = <0>;
53 clock-frequency = <0>;
59 #clock-cells = <0>;
61 clock-frequency = <0>;
66 #size-cells = <0>;
[all …]
Dr8a7742.dtsi19 * The external audio clocks are configured as 0 Hz fixed frequency
25 #clock-cells = <0>;
26 clock-frequency = <0>;
30 #clock-cells = <0>;
31 clock-frequency = <0>;
35 #clock-cells = <0>;
36 clock-frequency = <0>;
42 #clock-cells = <0>;
44 clock-frequency = <0>;
49 #size-cells = <0>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/renesas/
Dr8a77995.dtsi21 #clock-cells = <0>;
22 clock-frequency = <0>;
27 #size-cells = <0>;
29 a53_0: cpu@0 {
31 reg = <0x0>;
48 #clock-cells = <0>;
50 clock-frequency = <0>;
65 #clock-cells = <0>;
66 clock-frequency = <0>;
79 reg = <0 0xe6020000 0 0x0c>;
[all …]
Dr8a77970.dtsi30 #clock-cells = <0>;
31 clock-frequency = <0>;
36 #size-cells = <0>;
38 a53_0: cpu@0 {
41 reg = <0>;
68 #clock-cells = <0>;
70 clock-frequency = <0>;
75 #clock-cells = <0>;
77 clock-frequency = <0>;
95 #clock-cells = <0>;
[all …]
Dr8a77980.dtsi31 #clock-cells = <0>;
32 clock-frequency = <0>;
37 #size-cells = <0>;
39 a53_0: cpu@0 {
42 reg = <0>;
89 #clock-cells = <0>;
91 clock-frequency = <0>;
96 #clock-cells = <0>;
98 clock-frequency = <0>;
104 #clock-cells = <0>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/renesas/
Dr8a77970.dtsi22 #clock-cells = <0>;
23 clock-frequency = <0>;
28 #size-cells = <0>;
30 a53_0: cpu@0 {
33 reg = <0>;
60 #clock-cells = <0>;
62 clock-frequency = <0>;
67 #clock-cells = <0>;
69 clock-frequency = <0>;
87 #clock-cells = <0>;
[all …]
Dr8a779f0.dtsi17 cluster01_opp: opp-table-0 {
73 #size-cells = <0>;
113 a55_0: cpu@0 {
115 reg = <0>;
127 reg = <0x100>;
139 reg = <0x10000>;
151 reg = <0x10100>;
163 reg = <0x20000>;
175 reg = <0x20100>;
187 reg = <0x30000>;
[all …]
Dr8a77980.dtsi22 #clock-cells = <0>;
23 clock-frequency = <0>;
28 #size-cells = <0>;
30 a53_0: cpu@0 {
33 reg = <0>;
80 #clock-cells = <0>;
82 clock-frequency = <0>;
87 #clock-cells = <0>;
89 clock-frequency = <0>;
95 #clock-cells = <0>;
[all …]
Dr8a77995.dtsi19 * The external audio clocks are configured as 0 Hz fixed frequency
25 #clock-cells = <0>;
26 clock-frequency = <0>;
31 #clock-cells = <0>;
32 clock-frequency = <0>;
38 #clock-cells = <0>;
39 clock-frequency = <0>;
44 #size-cells = <0>;
46 a53_0: cpu@0 {
48 reg = <0x0>;
[all …]

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