| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/ |
| D | mtd-physmap.yaml | 154 reg = <0xff000000 0x01000000>; 160 ranges = <0 0xff000000 0x01000000>; 162 fs@0 { 164 reg = <0 0xf80000>; 168 reg = <0xf80000 0x80000>; 176 flash@0 { 178 reg = <0x00000000 0x02000000>, 179 <0x02000000 0x02000000>; 184 ranges = <0 0 0x04000000>; 186 partition@0 { [all …]
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| /kernel/linux/linux-5.10/include/rdma/ |
| D | opa_addr.h | 11 #define OPA_SPECIAL_OUI (0x00066AULL) 14 ? 0 : x) 15 #define OPA_GID_INDEX 0x1 17 * 0xF8 - 4 bits of multicast range and 1 bit for collective range 19 * Multicast range: 0xF00000 to 0xF7FFFF 20 * Collective range: 0xF80000 to 0xFFFFFE 22 #define OPA_MCAST_NR 0x4 /* Number of top bits set */ 23 #define OPA_COLLECTIVE_NR 0x1 /* Number of bits after MCAST_NR */ 48 return be64_to_cpu(gid->global.interface_id) & 0xFFFFFFFF; in opa_get_lid_from_gid()
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| /kernel/linux/linux-6.6/include/rdma/ |
| D | opa_addr.h | 11 #define OPA_SPECIAL_OUI (0x00066AULL) 14 ? 0 : x) 15 #define OPA_GID_INDEX 0x1 17 * 0xF8 - 4 bits of multicast range and 1 bit for collective range 19 * Multicast range: 0xF00000 to 0xF7FFFF 20 * Collective range: 0xF80000 to 0xFFFFFE 22 #define OPA_MCAST_NR 0x4 /* Number of top bits set */ 23 #define OPA_COLLECTIVE_NR 0x1 /* Number of bits after MCAST_NR */ 48 return be64_to_cpu(gid->global.interface_id) & 0xFFFFFFFF; in opa_get_lid_from_gid()
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| /kernel/linux/linux-6.6/drivers/mtd/maps/ |
| D | netsc520.c | 45 .offset = 0, 46 .size = 0xc0000 50 .offset = 0xc0000, 51 .size = 0x40000 55 .offset = 0x100000, 56 .size = 0xe80000 60 .offset = 0xf80000, 61 .size = 0x80000 66 #define WINDOW_SIZE 0x00100000 67 #define WINDOW_ADDR 0x00200000 [all …]
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| /kernel/linux/linux-5.10/drivers/mtd/maps/ |
| D | netsc520.c | 45 .offset = 0, 46 .size = 0xc0000 50 .offset = 0xc0000, 51 .size = 0x40000 55 .offset = 0x100000, 56 .size = 0xe80000 60 .offset = 0xf80000, 61 .size = 0x80000 66 #define WINDOW_SIZE 0x00100000 67 #define WINDOW_ADDR 0x00200000 [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | keystone-k2e-evm.dts | 23 reg = <0x00000008 0x1f800000 0x00000000 0x800000>; 34 #clock-cells = <0>; 41 #clock-cells = <0>; 48 #clock-cells = <0>; 83 reg = <0x50>; 94 ti,cs-chipselect = <0>; 104 nand@0,0 { 108 reg = <0 0 0x4000000 109 1 0 0x0000100>; 111 ti,davinci-chipselect = <0>; [all …]
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| D | keystone-k2l-evm.dts | 23 reg = <0x00000008 0x1f800000 0x00000000 0x800000>; 33 #clock-cells = <0>; 56 reg = <0x50>; 67 ti,cs-chipselect = <0>; 77 nand@0,0 { 81 reg = <0 0 0x4000000 82 1 0 0x0000100>; 84 ti,davinci-chipselect = <0>; 85 ti,davinci-mask-ale = <0x2000>; 86 ti,davinci-mask-cle = <0x4000>; [all …]
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| D | keystone-k2hk-evm.dts | 23 reg = <0x00000008 0x1f800000 0x00000000 0x800000>; 56 #clock-cells = <0>; 63 #clock-cells = <0>; 70 #clock-cells = <0>; 77 #clock-cells = <0>; 84 #clock-cells = <0>; 111 ti,cs-chipselect = <0>; 121 nand@0,0 { 125 reg = <0 0 0x4000000 126 1 0 0x0000100>; [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/ti/keystone/ |
| D | keystone-k2l-evm.dts | 23 reg = <0x00000008 0x1f800000 0x00000000 0x800000>; 33 #clock-cells = <0>; 56 reg = <0x50>; 67 ti,cs-chipselect = <0>; 77 nand@0,0 { 81 reg = <0 0 0x4000000 82 1 0 0x0000100>; 84 ti,davinci-chipselect = <0>; 85 ti,davinci-mask-ale = <0x2000>; 86 ti,davinci-mask-cle = <0x4000>; [all …]
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| D | keystone-k2e-evm.dts | 23 reg = <0x00000008 0x1f800000 0x00000000 0x800000>; 34 #clock-cells = <0>; 41 #clock-cells = <0>; 48 #clock-cells = <0>; 83 reg = <0x50>; 94 ti,cs-chipselect = <0>; 104 nand@0,0 { 108 reg = <0 0 0x4000000 109 1 0 0x0000100>; 111 ti,davinci-chipselect = <0>; [all …]
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| D | keystone-k2hk-evm.dts | 23 reg = <0x00000008 0x1f800000 0x00000000 0x800000>; 56 #clock-cells = <0>; 63 #clock-cells = <0>; 70 #clock-cells = <0>; 77 #clock-cells = <0>; 84 #clock-cells = <0>; 111 ti,cs-chipselect = <0>; 121 nand@0,0 { 125 reg = <0 0 0x4000000 126 1 0 0x0000100>; [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | pamu.txt | 12 "fsl,pamu-v1.0". The second is "fsl,pamu". 18 PAMU v1.0, on an SOC that has five PAMU devices, the size 19 is 0x5000. 56 For PAMU v1.0, this size is 0x1000. 95 compatible = "fsl,pamu-v1.0", "fsl,pamu"; 96 reg = <0x20000 0x5000>; 97 ranges = <0 0x20000 0x5000>; 98 fsl,portid-mapping = <0xf80000>; 102 24 2 0 0 105 pamu0: pamu@0 { [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | pamu.txt | 12 "fsl,pamu-v1.0". The second is "fsl,pamu". 18 PAMU v1.0, on an SOC that has five PAMU devices, the size 19 is 0x5000. 56 For PAMU v1.0, this size is 0x1000. 95 compatible = "fsl,pamu-v1.0", "fsl,pamu"; 96 reg = <0x20000 0x5000>; 97 ranges = <0 0x20000 0x5000>; 98 fsl,portid-mapping = <0xf80000>; 102 24 2 0 0 105 pamu0: pamu@0 { [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/renesas/rcar-du/ |
| D | rcar_du_plane.c | 75 return 0; in rcar_du_plane_hwmask() 86 * VSPD1. VSPD0 feeds DU0/1 plane 0, and VSPD1 feeds either DU2 plane 0 or 91 * availability of planes 0 and 1. 105 /* VSPD0 feeds plane 0 on DU0/1. */ in rcar_du_plane_hwalloc() 106 if (plane->group->index != 0) in rcar_du_plane_hwalloc() 109 fixed = 0; in rcar_du_plane_hwalloc() 111 /* VSPD1 feeds plane 1 on DU0/1 or plane 0 on DU2. */ in rcar_du_plane_hwalloc() 112 fixed = plane->group->index == 0 ? 1 : 0; in rcar_du_plane_hwalloc() 115 if (fixed >= 0) in rcar_du_plane_hwalloc() 118 for (i = RCAR_DU_NUM_HW_PLANES - 1; i >= 0; --i) { in rcar_du_plane_hwalloc() [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/rcar-du/ |
| D | rcar_du_plane.c | 74 return 0; in rcar_du_plane_hwmask() 85 * VSPD1. VSPD0 feeds DU0/1 plane 0, and VSPD1 feeds either DU2 plane 0 or 90 * availability of planes 0 and 1. 104 /* VSPD0 feeds plane 0 on DU0/1. */ in rcar_du_plane_hwalloc() 105 if (plane->group->index != 0) in rcar_du_plane_hwalloc() 108 fixed = 0; in rcar_du_plane_hwalloc() 110 /* VSPD1 feeds plane 1 on DU0/1 or plane 0 on DU2. */ in rcar_du_plane_hwalloc() 111 fixed = plane->group->index == 0 ? 1 : 0; in rcar_du_plane_hwalloc() 114 if (fixed >= 0) in rcar_du_plane_hwalloc() 117 for (i = RCAR_DU_NUM_HW_PLANES - 1; i >= 0; --i) { in rcar_du_plane_hwalloc() [all …]
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| /kernel/linux/linux-6.6/drivers/cpufreq/ |
| D | ti-cpufreq.c | 20 #define REVISION_MASK 0xF 23 #define AM33XX_800M_ARM_MPU_MAX_FREQ 0x1E2F 24 #define AM43XX_600M_ARM_MPU_MAX_FREQ 0xFFA 32 #define DRA7_EFUSE_NOM_MPU_OPP BIT(0) 37 #define OMAP3_CONTROL_DEVICE_STATUS 0x4800244C 38 #define OMAP3_CONTROL_IDCODE 0x4830A204 39 #define OMAP34xx_ProdID_SKUID 0x4830A20C 40 #define OMAP3_SYSCON_BASE (0x48000000 + 0x2000 + 0x270) 46 #define AM625_SUPPORT_K_MPU_OPP BIT(0) 137 .efuse_offset = 0x07fc, [all …]
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| /kernel/linux/linux-5.10/drivers/cpufreq/ |
| D | ti-cpufreq.c | 20 #define REVISION_MASK 0xF 23 #define AM33XX_800M_ARM_MPU_MAX_FREQ 0x1E2F 24 #define AM43XX_600M_ARM_MPU_MAX_FREQ 0xFFA 32 #define DRA7_EFUSE_NOM_MPU_OPP BIT(0) 37 #define OMAP3_CONTROL_DEVICE_STATUS 0x4800244C 38 #define OMAP3_CONTROL_IDCODE 0x4830A204 39 #define OMAP34xx_ProdID_SKUID 0x4830A20C 40 #define OMAP3_SYSCON_BASE (0x48000000 + 0x2000 + 0x270) 111 .efuse_offset = 0x07fc, 112 .efuse_mask = 0x1fff, [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/xilinx/ |
| D | zynqmp-sm-k26-revA.dts | 48 memory@0 { 50 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; 59 reg = <0x0 0x7ff00000 0x0 0x100000>; 93 io-channels = <&xilinx_ams 0>, <&xilinx_ams 1>, <&xilinx_ams 2>, 131 &qspi { /* MIO 0-5 - U143 */ 133 spi_flash: flash@0 { /* MT25QU512A */ 137 reg = <0>; 147 partition@0 { 149 reg = <0x0 0x80000>; /* 512KB */ 155 reg = <0x80000 0x80000>; /* 512KB */ [all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/myricom/myri10ge/ |
| D | myri10ge_mcp.h | 54 #define MXGEFW_FLAGS_SMALL 0x1 55 #define MXGEFW_FLAGS_TSO_HDR 0x1 56 #define MXGEFW_FLAGS_FIRST 0x2 57 #define MXGEFW_FLAGS_ALIGN_ODD 0x4 58 #define MXGEFW_FLAGS_CKSUM 0x8 59 #define MXGEFW_FLAGS_TSO_LAST 0x8 60 #define MXGEFW_FLAGS_NO_TSO 0x10 61 #define MXGEFW_FLAGS_TSO_CHOP 0x10 62 #define MXGEFW_FLAGS_TSO_PLD 0x20 95 #define MXGEFW_BOOT_HANDOFF 0xfc0000 [all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/myricom/myri10ge/ |
| D | myri10ge_mcp.h | 54 #define MXGEFW_FLAGS_SMALL 0x1 55 #define MXGEFW_FLAGS_TSO_HDR 0x1 56 #define MXGEFW_FLAGS_FIRST 0x2 57 #define MXGEFW_FLAGS_ALIGN_ODD 0x4 58 #define MXGEFW_FLAGS_CKSUM 0x8 59 #define MXGEFW_FLAGS_TSO_LAST 0x8 60 #define MXGEFW_FLAGS_NO_TSO 0x10 61 #define MXGEFW_FLAGS_TSO_CHOP 0x10 62 #define MXGEFW_FLAGS_TSO_PLD 0x20 95 #define MXGEFW_BOOT_HANDOFF 0xfc0000 [all …]
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| /kernel/linux/linux-5.10/drivers/staging/rtl8192e/rtl8192e/ |
| D | r8192E_phyreg.h | 11 #define RF_DATA 0x1d4 13 #define rPMAC_Reset 0x100 14 #define rPMAC_TxStart 0x104 15 #define rPMAC_TxLegacySIG 0x108 16 #define rPMAC_TxHTSIG1 0x10c 17 #define rPMAC_TxHTSIG2 0x110 18 #define rPMAC_PHYDebug 0x114 19 #define rPMAC_TxPacketNum 0x118 20 #define rPMAC_TxIdle 0x11c 21 #define rPMAC_TxMACHeader0 0x120 [all …]
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| /kernel/linux/linux-6.6/drivers/staging/rtl8192e/rtl8192e/ |
| D | r8192E_phyreg.h | 10 #define RF_DATA 0x1d4 12 #define rPMAC_Reset 0x100 13 #define rPMAC_TxStart 0x104 14 #define rPMAC_TxLegacySIG 0x108 15 #define rPMAC_TxHTSIG1 0x10c 16 #define rPMAC_TxHTSIG2 0x110 17 #define rPMAC_PHYDebug 0x114 18 #define rPMAC_TxPacketNum 0x118 19 #define rPMAC_TxIdle 0x11c 20 #define rPMAC_TxMACHeader0 0x120 [all …]
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| /kernel/linux/linux-6.6/drivers/net/wireless/legacy/ |
| D | rayctl.h | 10 #define PROTOCOL_VER 0x00 11 #define DATA_TYPE 0x08 12 #define ASSOC_REQ_TYPE 0x00 13 #define ASSOC_RESP_TYPE 0x10 14 #define REASSOC_REQ_TYPE 0x20 15 #define REASSOC_RESP_TYPE 0x30 16 #define NULL_MSG_TYPE 0x48 17 #define BEACON_TYPE 0x80 18 #define DISASSOC_TYPE 0xA0 19 #define PSPOLL_TYPE 0xA4 [all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/ |
| D | rayctl.h | 10 #define PROTOCOL_VER 0x00 11 #define DATA_TYPE 0x08 12 #define ASSOC_REQ_TYPE 0x00 13 #define ASSOC_RESP_TYPE 0x10 14 #define REASSOC_REQ_TYPE 0x20 15 #define REASSOC_RESP_TYPE 0x30 16 #define NULL_MSG_TYPE 0x48 17 #define BEACON_TYPE 0x80 18 #define DISASSOC_TYPE 0xA0 19 #define PSPOLL_TYPE 0xA4 [all …]
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| /kernel/linux/linux-5.10/drivers/staging/rtl8712/ |
| D | rtl871x_mp_phy_regdef.h | 37 * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF 39 * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 40 * 3. RF register 0x00-2E 45 * 1. Page1(0x100) 47 #define rPMAC_Reset 0x100 48 #define rPMAC_TxStart 0x104 49 #define rPMAC_TxLegacySIG 0x108 50 #define rPMAC_TxHTSIG1 0x10c 51 #define rPMAC_TxHTSIG2 0x110 52 #define rPMAC_PHYDebug 0x114 [all …]
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