| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/fpga/ |
| D | altera-hps2fpga-bridge.txt | 17 reg = <0xff400000 0x100000>; 20 bridge-enable = <0>; 25 reg = <0xff500000 0x10000>; 33 reg = <0xff600000 0x100000>;
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| D | fpga-region.txt | 210 bridge's region (0xff200000) and the hps bridge's region (0xc0000000) for use by 218 reg = <0xff706000 0x1000 219 0xffb90000 0x20>; 220 interrupts = <0 175 4>; 225 reg = <0xff400000 0x100000>; 241 reg = <0xff500000 0x10000>; 257 ranges = <0x20000 0xff200000 0x100000>, 258 <0x0 0xc0000000 0x20000000>; 262 reg = <0x10040 0x20>; 272 reg = <0x0 0x10000>; [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/fpga/ |
| D | altera-hps2fpga-bridge.txt | 17 reg = <0xff400000 0x100000>; 20 bridge-enable = <0>; 25 reg = <0xff500000 0x10000>; 33 reg = <0xff600000 0x100000>;
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| D | fpga-region.txt | 210 bridge's region (0xff200000) and the hps bridge's region (0xc0000000) for use by 218 reg = <0xff706000 0x1000 219 0xffb90000 0x20>; 220 interrupts = <0 175 4>; 225 reg = <0xff400000 0x100000>; 241 reg = <0xff500000 0x10000>; 250 fragment@0 { 260 ranges = <0x20000 0xff200000 0x100000>, 261 <0x0 0xc0000000 0x20000000>; 265 reg = <0x10040 0x20>; [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
| D | ctxnv40.h | 45 ctx->ctxprog_reg = (reg - 0x00400000) >> 2; in cp_ctx() 52 length = 0; in cp_ctx() 68 for (i = 0; i < ctx->ctxprog_len; i++) { in cp_name() 69 if ((ctxprog[i] & 0xfff00000) != 0xff400000) in cp_name() 73 ctxprog[i] = (ctxprog[i] & 0x00ff00ff) | in cp_name() 81 int ip = 0; in _cp_bra() 85 if (ip == 0) in _cp_bra() 86 ip = 0xff000000 | (name << CP_BRA_IP_SHIFT); in _cp_bra() 90 (state ? 0 : CP_BRA_IF_CLEAR)); in _cp_bra() 92 #define cp_bra(c, f, s, n) _cp_bra((c), 0, CP_FLAG_##f, CP_FLAG_##f##_##s, n) [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
| D | ctxnv40.h | 45 ctx->ctxprog_reg = (reg - 0x00400000) >> 2; in cp_ctx() 52 length = 0; in cp_ctx() 68 for (i = 0; i < ctx->ctxprog_len; i++) { in cp_name() 69 if ((ctxprog[i] & 0xfff00000) != 0xff400000) in cp_name() 73 ctxprog[i] = (ctxprog[i] & 0x00ff00ff) | in cp_name() 81 int ip = 0; in _cp_bra() 85 if (ip == 0) in _cp_bra() 86 ip = 0xff000000 | (name << CP_BRA_IP_SHIFT); in _cp_bra() 90 (state ? 0 : CP_BRA_IF_CLEAR)); in _cp_bra() 92 #define cp_bra(c, f, s, n) _cp_bra((c), 0, CP_FLAG_##f, CP_FLAG_##f##_##s, n) [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/ |
| D | amlogic,meson-g12a-usb-ctrl.yaml | 81 "^usb@[0-9a-f]+$": 202 reg = <0xffe09000 0xa0>; 218 reg = <0xff400000 0x40000>; 231 reg = <0xff500000 0x100000>; 235 snps,quirk-frame-length-adjustment = <0x20>;
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/ |
| D | amlogic,meson-g12a-usb-ctrl.yaml | 81 "^usb@[0-9a-f]+$": 199 reg = <0xffe09000 0xa0>; 215 reg = <0xff400000 0x40000>; 228 reg = <0xff500000 0x100000>;
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| /kernel/linux/linux-5.10/arch/mips/kernel/ |
| D | bmips_vec.S | 35 * it to resume execution at 0x8000_0200 (!BEV IV vector) when it is 37 * it to a more convenient place: BMIPS_WARM_RESTART_VEC @ 0x8000_0380. 54 /* set up CPU1 CBR; move BASE to 0xa000_0000 */ 55 li k0, 0xff400000 60 andi k1, 0x8000 63 li k1, 0xa0080000 64 sw k1, 0(k0) 78 * entire function gets copied to 0x8000_0000. 100 /* if we're not on core 0, this must be the SMP boot signal */ 134 andi k0, 0xff00 [all …]
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| /kernel/linux/linux-6.6/arch/mips/kernel/ |
| D | bmips_vec.S | 35 * it to resume execution at 0x8000_0200 (!BEV IV vector) when it is 37 * it to a more convenient place: BMIPS_WARM_RESTART_VEC @ 0x8000_0380. 54 /* set up CPU1 CBR; move BASE to 0xa000_0000 */ 55 li k0, 0xff400000 60 andi k1, 0x8000 63 li k1, 0xa0080000 64 sw k1, 0(k0) 78 * entire function gets copied to 0x8000_0000. 100 /* if we're not on core 0, this must be the SMP boot signal */ 134 andi k0, 0xff00 [all …]
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| /kernel/linux/linux-6.6/drivers/mtd/maps/ |
| D | ichxrom.c | 30 #define BIOS_CNTL 0x4e 31 #define FWH_DEC_EN1 0xE3 32 #define FWH_DEC_EN2 0xF0 33 #define FWH_SEL1 0xE8 34 #define FWH_SEL2 0xEE 83 window->phys = 0; in ichxrom_cleanup() 84 window->size = 0; in ichxrom_cleanup() 113 window->phys = 0; in ichxrom_init_one() 115 if (byte == 0xff) { in ichxrom_init_one() 116 window->phys = 0xffc00000; in ichxrom_init_one() [all …]
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| D | esb2rom.c | 34 #define BIOS_CNTL 0xDC 35 #define BIOS_LOCK_ENABLE 0x02 36 #define BIOS_WRITE_ENABLE 0x01 39 #define FWH_DEC_EN1 0xD8 40 #define FWH_F8_EN 0x8000 41 #define FWH_F0_EN 0x4000 42 #define FWH_E8_EN 0x2000 43 #define FWH_E0_EN 0x1000 44 #define FWH_D8_EN 0x0800 45 #define FWH_D0_EN 0x0400 [all …]
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| /kernel/linux/linux-5.10/drivers/mtd/maps/ |
| D | ichxrom.c | 30 #define BIOS_CNTL 0x4e 31 #define FWH_DEC_EN1 0xE3 32 #define FWH_DEC_EN2 0xF0 33 #define FWH_SEL1 0xE8 34 #define FWH_SEL2 0xEE 83 window->phys = 0; in ichxrom_cleanup() 84 window->size = 0; in ichxrom_cleanup() 113 window->phys = 0; in ichxrom_init_one() 115 if (byte == 0xff) { in ichxrom_init_one() 116 window->phys = 0xffc00000; in ichxrom_init_one() [all …]
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| D | esb2rom.c | 34 #define BIOS_CNTL 0xDC 35 #define BIOS_LOCK_ENABLE 0x02 36 #define BIOS_WRITE_ENABLE 0x01 39 #define FWH_DEC_EN1 0xD8 40 #define FWH_F8_EN 0x8000 41 #define FWH_F0_EN 0x4000 42 #define FWH_E8_EN 0x2000 43 #define FWH_E0_EN 0x1000 44 #define FWH_D8_EN 0x0800 45 #define FWH_D0_EN 0x0400 [all …]
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| /kernel/linux/linux-5.10/arch/powerpc/platforms/83xx/ |
| D | suspend-asm.S | 14 #define SS_MEMSAVE 0x00 /* First 8 bytes of RAM */ 15 #define SS_HID 0x08 /* 3 HIDs */ 16 #define SS_IABR 0x14 /* 2 IABRs */ 17 #define SS_IBCR 0x1c 18 #define SS_DABR 0x20 /* 2 DABRs */ 19 #define SS_DBCR 0x28 20 #define SS_SP 0x2c 21 #define SS_SR 0x30 /* 16 segment registers */ 22 #define SS_R2 0x70 23 #define SS_MSR 0x74 [all …]
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| /kernel/linux/linux-6.6/arch/powerpc/platforms/83xx/ |
| D | suspend-asm.S | 14 #define SS_MEMSAVE 0x00 /* First 8 bytes of RAM */ 15 #define SS_HID 0x08 /* 3 HIDs */ 16 #define SS_IABR 0x14 /* 2 IABRs */ 17 #define SS_IBCR 0x1c 18 #define SS_DABR 0x20 /* 2 DABRs */ 19 #define SS_DBCR 0x28 20 #define SS_SP 0x2c 21 #define SS_SR 0x30 /* 16 segment registers */ 22 #define SS_R2 0x70 23 #define SS_MSR 0x74 [all …]
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| /kernel/linux/linux-5.10/arch/m68k/include/asm/ |
| D | io_mm.h | 47 #define q40_isa_io_base 0xff400000 48 #define q40_isa_mem_base 0xff800000 55 #define MULTI_ISA 0 65 #define MULTI_ISA 0 74 #define enec_isa_read_base 0xfffa0000 75 #define enec_isa_write_base 0xfffb0000 77 #define ENEC_ISA_IO_B(ioaddr) (enec_isa_read_base+((((unsigned long)(ioaddr))&0x7F)<<9)) 78 #define ENEC_ISA_IO_W(ioaddr) (enec_isa_read_base+((((unsigned long)(ioaddr))&0x7F)<<9)) 79 #define ENEC_ISA_MEM_B(madr) (enec_isa_read_base+((((unsigned long)(madr))&0x7F)<<9)) 80 #define ENEC_ISA_MEM_W(madr) (enec_isa_read_base+((((unsigned long)(madr))&0x7F)<<9)) [all …]
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| /kernel/linux/linux-6.6/arch/m68k/include/asm/ |
| D | io_mm.h | 45 #define q40_isa_io_base 0xff400000 46 #define q40_isa_mem_base 0xff800000 53 #define MULTI_ISA 0 63 #define MULTI_ISA 0 72 #define enec_isa_read_base 0xfffa0000 73 #define enec_isa_write_base 0xfffb0000 75 #define ENEC_ISA_IO_B(ioaddr) (enec_isa_read_base+((((unsigned long)(ioaddr))&0x7F)<<9)) 76 #define ENEC_ISA_IO_W(ioaddr) (enec_isa_read_base+((((unsigned long)(ioaddr))&0x7F)<<9)) 77 #define ENEC_ISA_MEM_B(madr) (enec_isa_read_base+((((unsigned long)(madr))&0x7F)<<9)) 78 #define ENEC_ISA_MEM_W(madr) (enec_isa_read_base+((((unsigned long)(madr))&0x7F)<<9)) [all …]
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| /kernel/linux/linux-5.10/drivers/staging/wlan-ng/ |
| D | prism2fw.c | 65 #define S3ADDR_PLUG (0xff000000UL) 66 #define S3ADDR_CRC (0xff100000UL) 67 #define S3ADDR_INFO (0xff200000UL) 68 #define S3ADDR_START (0xff400000UL) 204 * 0 - success 205 * ~0 - failure 215 PRISM2_USB_FWFILE, &udev->dev) != 0) { in prism2_fwtry() 229 return 0; in prism2_fwtry() 242 * 0 - success 243 * ~0 - failure [all …]
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| /kernel/linux/linux-6.6/drivers/staging/wlan-ng/ |
| D | prism2fw.c | 44 #define S3ADDR_PLUG (0xff000000UL) 45 #define S3ADDR_CRC (0xff100000UL) 46 #define S3ADDR_INFO (0xff200000UL) 47 #define S3ADDR_START (0xff400000UL) 183 * 0 - success 184 * ~0 - failure 194 PRISM2_USB_FWFILE, &udev->dev) != 0) { in prism2_fwtry() 208 return 0; in prism2_fwtry() 221 * 0 - success 222 * ~0 - failure [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/intel/socfpga/ |
| D | socfpga.dtsi | 23 #size-cells = <0>; 26 cpu0: cpu@0 { 29 reg = <0>; 43 interrupts = <0 176 4>, <0 177 4>; 45 reg = <0xff111000 0x1000>, 46 <0xff113000 0x1000>; 53 reg = <0xfffed000 0x1000>, 54 <0xfffec100 0x100>; 73 reg = <0xffe01000 0x1000>; 74 interrupts = <0 104 4>, [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | socfpga.dtsi | 23 #size-cells = <0>; 26 cpu0: cpu@0 { 29 reg = <0>; 43 interrupts = <0 176 4>, <0 177 4>; 45 reg = <0xff111000 0x1000>, 46 <0xff113000 0x1000>; 53 reg = <0xfffed000 0x1000>, 54 <0xfffec100 0x100>; 73 reg = <0xffe01000 0x1000>; 74 interrupts = <0 104 4>, [all …]
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| /kernel/linux/linux-6.6/arch/arm/probes/ |
| D | decode-thumb.c | 20 DECODE_REJECT (0xfe4f0000, 0xe80f0000), 24 DECODE_REJECT (0xffc00000, 0xe8000000), 27 DECODE_REJECT (0xffc00000, 0xe9800000), 30 DECODE_REJECT (0xfe508000, 0xe8008000), 32 DECODE_REJECT (0xfe50c000, 0xe810c000), 34 DECODE_REJECT (0xfe402000, 0xe8002000), 40 DECODE_CUSTOM (0xfe400000, 0xe8000000, PROBES_T32_LDMSTM), 50 DECODE_OR (0xff600000, 0xe8600000), 53 DECODE_EMULATEX (0xff400000, 0xe9400000, PROBES_T32_LDRDSTRD, 54 REGS(NOPCWB, NOSPPC, NOSPPC, 0, 0)), [all …]
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| /kernel/linux/linux-5.10/arch/arm/probes/ |
| D | decode-thumb.c | 20 DECODE_REJECT (0xfe4f0000, 0xe80f0000), 24 DECODE_REJECT (0xffc00000, 0xe8000000), 27 DECODE_REJECT (0xffc00000, 0xe9800000), 30 DECODE_REJECT (0xfe508000, 0xe8008000), 32 DECODE_REJECT (0xfe50c000, 0xe810c000), 34 DECODE_REJECT (0xfe402000, 0xe8002000), 40 DECODE_CUSTOM (0xfe400000, 0xe8000000, PROBES_T32_LDMSTM), 50 DECODE_OR (0xff600000, 0xe8600000), 53 DECODE_EMULATEX (0xff400000, 0xe9400000, PROBES_T32_LDRDSTRD, 54 REGS(NOPCWB, NOSPPC, NOSPPC, 0, 0)), [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/ |
| D | meson-axg.dtsi | 23 tdmif_a: audio-controller-0 { 25 #sound-dai-cells = <0>; 36 #sound-dai-cells = <0>; 47 #sound-dai-cells = <0>; 66 #address-cells = <0x2>; 67 #size-cells = <0x0>; 69 cpu0: cpu@0 { 72 reg = <0x0 0x0>; 75 clocks = <&scpi_dvfs 0>; 81 reg = <0x0 0x1>; [all …]
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