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/kernel/linux/linux-6.6/tools/testing/selftests/tc-testing/tc-tests/qdiscs/
Dtaprio.json4 "name": "Add taprio Qdisc to multi-queue device (8 queues)",
15 …H root handle 1: taprio num_tc 3 map 2 2 1 0 2 2 2 2 2 2 2 2 2 2 2 2 queues 1@0 1@0 1@0 base-time …
18 … "matchPattern": "qdisc taprio 1: root refcnt [0-9]+ tc 3 map 2 2 1 0 2 2 2 2 2 2 2 2 2 2 2 2",
26 "name": "Add taprio Qdisc with multiple sched-entry",
37 …num_tc 3 map 2 2 1 0 2 2 2 2 2 2 2 2 2 2 2 2 queues 1@0 1@0 1@0 base-time 1000000000 sched-entry S…
40 "matchPattern": "index [0-9]+ cmd S gatemask 0x[0-9]+ interval [0-9]+00000",
48 "name": "Add taprio Qdisc with txtime-delay",
59 …taprio num_tc 3 map 2 2 1 0 2 2 2 2 2 2 2 2 2 2 2 2 queues 1@0 1@0 1@0 base-time 1000000000 sched-…
80 …H root handle 1: taprio num_tc 3 map 2 2 1 0 2 2 2 2 2 2 2 2 2 2 2 2 queues 1@0 1@0 1@0 base-time …
104 …H root handle 1: taprio num_tc 3 map 2 2 1 0 2 2 2 2 2 2 2 2 2 2 2 2 queues 1@0 1@0 1@0 base-time …
[all …]
/kernel/linux/linux-5.10/arch/arm64/crypto/
Dpoly1305-core.S_shipped36 and x9,x9,#-4
38 mov w9,#-1
60 .size poly1305_init,.-poly1305_init
66 ands x2,x2,#-16
87 add x12,x12,x13,lsl#26 // base 2^26 -> base 2^64
97 add x9,x8,x8,lsr#2 // s1 = r1 + (r1 >> 2)
137 and x10,x14,#-4 // final reduction
139 add x10,x10,x14,lsr#2
151 .size poly1305_blocks,.-poly1305_blocks
157 ldp x4,x5,[x0] // load hash base 2^64
[all …]
Dsha3-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * sha3-ce-core.S - core SHA-3 transform using v8.2 Crypto Extensions
8 * it under the terms of the GNU General Public License version 2 as
15 .irp b,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31
16 .set .Lv\b\().2d, \b
21 * ARMv8.2 Crypto Extensions instructions
46 ld1 { v0.1d- v3.1d}, [x0]
47 ld1 { v4.1d- v7.1d}, [x8], #32
48 ld1 { v8.1d-v11.1d}, [x8], #32
49 ld1 {v12.1d-v15.1d}, [x8], #32
[all …]
Dsha512-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * sha512-ce-core.S - core SHA-384/SHA-512 transform using v8 Crypto Extensions
8 * it under the terms of the GNU General Public License version 2 as
15 .irp b,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19
17 .set .Lv\b\().2d, \b
37 * The SHA-512 round constants
85 ld1 {v\rc1\().2d}, [x4], #16
87 add v5.2d, v\rc0\().2d, v\in0\().2d
91 add v\i3\().2d, v\i3\().2d, v5.2d
94 sha512su0 v\in0\().2d, v\in1\().2d
[all …]
/kernel/linux/linux-6.6/scripts/
Drust_is_available.sh2 # SPDX-License-Identifier: GPL-2.0
6 set -e
8 min_tool_version=$(dirname $0)/min-tool-version.sh
10 # Convert the version string x.y.z to a canonical up-to-7-digits form.
18 set -- $1
19 echo $((100000 * $1 + 100 * $2 + $3))
25 echo >&2 "***"
26 echo >&2 "*** Please see Documentation/rust/quick-start.rst for details"
27 echo >&2 "*** on how to set up the Rust support."
28 echo >&2 "***"
[all …]
/kernel/linux/linux-6.6/arch/x86/platform/ce4100/
Dfalconfalls.dts1 // SPDX-License-Identifier: GPL-2.0-only
7 /dts-v1/;
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
27 #address-cells = <1>;
28 #size-cells = <1>;
29 compatible = "intel,ce4100-cp";
32 ioapic1: interrupt-controller@fec00000 {
[all …]
/kernel/linux/linux-5.10/arch/x86/platform/ce4100/
Dfalconfalls.dts1 // SPDX-License-Identifier: GPL-2.0-only
7 /dts-v1/;
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
27 #address-cells = <1>;
28 #size-cells = <1>;
29 compatible = "intel,ce4100-cp";
32 ioapic1: interrupt-controller@fec00000 {
[all …]
/kernel/linux/linux-6.6/arch/xtensa/variants/de212/include/variant/
Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
40 /* Save area for non-coprocessor optional and custom (TIE) state: */
45 #define XCHAL_TOTAL_SA_SIZE 32 /* with 16-byte align padding */
58 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
59 * kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg)
62 * galign = group byte alignment (power of 2) (galign >= align)
63 * align = register byte alignment (power of 2)
66 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
68 * regnum = reg index in regfile, or special/TIE-user reg number
[all …]
/kernel/linux/linux-5.10/arch/xtensa/variants/de212/include/variant/
Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
40 /* Save area for non-coprocessor optional and custom (TIE) state: */
45 #define XCHAL_TOTAL_SA_SIZE 32 /* with 16-byte align padding */
58 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
59 * kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg)
62 * galign = group byte alignment (power of 2) (galign >= align)
63 * align = register byte alignment (power of 2)
66 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
68 * regnum = reg index in regfile, or special/TIE-user reg number
[all …]
/kernel/linux/linux-6.6/arch/arm64/crypto/
Dsha3-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * sha3-ce-core.S - core SHA-3 transform using v8.2 Crypto Extensions
8 * it under the terms of the GNU General Public License version 2 as
15 .irp b,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31
16 .set .Lv\b\().2d, \b
21 * ARMv8.2 Crypto Extensions instructions
46 ld1 { v0.1d- v3.1d}, [x0]
47 ld1 { v4.1d- v7.1d}, [x8], #32
48 ld1 { v8.1d-v11.1d}, [x8], #32
49 ld1 {v12.1d-v15.1d}, [x8], #32
[all …]
Dsha512-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * sha512-ce-core.S - core SHA-384/SHA-512 transform using v8 Crypto Extensions
8 * it under the terms of the GNU General Public License version 2 as
15 .irp b,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19
17 .set .Lv\b\().2d, \b
37 * The SHA-512 round constants
85 ld1 {v\rc1\().2d}, [x4], #16
87 add v5.2d, v\rc0\().2d, v\in0\().2d
91 add v\i3\().2d, v\i3\().2d, v5.2d
94 sha512su0 v\in0\().2d, v\in1\().2d
[all …]
/kernel/linux/linux-5.10/drivers/misc/habanalabs/goya/
Dgoya_security.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright 2016-2019 HabanaLabs, Ltd.
12 * goya_set_block_as_protected - set the given block as protected
20 u32 pb_addr = base - CFG_BASE + PROT_BITS_OFFS; in goya_pb_set_block()
68 word_offset = ((mmMME_DUMMY & PROT_BITS_OFFS) >> 7) << 2; in goya_init_mme_protection_bits()
69 mask = 1 << ((mmMME_DUMMY & 0x7F) >> 2); in goya_init_mme_protection_bits()
70 mask |= 1 << ((mmMME_RESET & 0x7F) >> 2); in goya_init_mme_protection_bits()
71 mask |= 1 << ((mmMME_STALL & 0x7F) >> 2); in goya_init_mme_protection_bits()
72 mask |= 1 << ((mmMME_SM_BASE_ADDRESS_LOW & 0x7F) >> 2); in goya_init_mme_protection_bits()
73 mask |= 1 << ((mmMME_SM_BASE_ADDRESS_HIGH & 0x7F) >> 2); in goya_init_mme_protection_bits()
[all …]
/kernel/linux/linux-6.6/drivers/accel/habanalabs/goya/
Dgoya_security.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright 2016-2019 HabanaLabs, Ltd.
12 * goya_set_block_as_protected - set the given block as protected
20 u32 pb_addr = base - CFG_BASE + PROT_BITS_OFFS; in goya_pb_set_block()
68 word_offset = ((mmMME_DUMMY & PROT_BITS_OFFS) >> 7) << 2; in goya_init_mme_protection_bits()
69 mask = 1 << ((mmMME_DUMMY & 0x7F) >> 2); in goya_init_mme_protection_bits()
70 mask |= 1 << ((mmMME_RESET & 0x7F) >> 2); in goya_init_mme_protection_bits()
71 mask |= 1 << ((mmMME_STALL & 0x7F) >> 2); in goya_init_mme_protection_bits()
72 mask |= 1 << ((mmMME_SM_BASE_ADDRESS_LOW & 0x7F) >> 2); in goya_init_mme_protection_bits()
73 mask |= 1 << ((mmMME_SM_BASE_ADDRESS_HIGH & 0x7F) >> 2); in goya_init_mme_protection_bits()
[all …]
/kernel/linux/linux-5.10/drivers/media/dvb-frontends/
Dstv090x_reg.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
48 #define STV090x_OFFST_SSTREAM_LCK_1_FIELD 2
66 #define STV090x_OFFST_SPKTDEL_LOCK_2_FIELD 2
76 #define STV090x_OFFST_SDEMOD_LOCKB_2_FIELD 2
94 #define STV090x_OFFST_SDISEQC2TX_IRQ_FIELD 2
108 #define STV090x_OFFST_MSTREAM_LCK_1_FIELD 2
126 #define STV090x_OFFST_MPKTDEL_LOCK_2_FIELD 2
144 #define STV090x_OFFST_MDEMOD_LOCKB_2_FIELD 2
162 #define STV090x_OFFST_MDISEQC2TX_IRQ_FIELD 2
173 #define STV090x_WIDTH_12CADDR_INC_FIELD 2
[all …]
/kernel/linux/linux-6.6/drivers/media/dvb-frontends/
Dstv090x_reg.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
48 #define STV090x_OFFST_SSTREAM_LCK_1_FIELD 2
66 #define STV090x_OFFST_SPKTDEL_LOCK_2_FIELD 2
76 #define STV090x_OFFST_SDEMOD_LOCKB_2_FIELD 2
94 #define STV090x_OFFST_SDISEQC2TX_IRQ_FIELD 2
108 #define STV090x_OFFST_MSTREAM_LCK_1_FIELD 2
126 #define STV090x_OFFST_MPKTDEL_LOCK_2_FIELD 2
144 #define STV090x_OFFST_MDEMOD_LOCKB_2_FIELD 2
162 #define STV090x_OFFST_MDISEQC2TX_IRQ_FIELD 2
173 #define STV090x_WIDTH_12CADDR_INC_FIELD 2
[all …]
/kernel/linux/linux-6.6/tools/testing/selftests/netfilter/
Dnft_audit.sh2 # SPDX-License-Identifier: GPL-2.0
9 nft --version >/dev/null 2>&1 || {
15 [ "${1}" != "run" ] && { unshare -n "${0}" run; exit $?; }
17 # give other scripts a chance to finish - audit_logread sees all activity
25 trap 'kill $logread_pid; rm -f $logfile $rulefile' EXIT
29 echo -n "testing for cmd: $1 ... "
33 res=$(diff -a -u <(echo "$2") - <&3)
34 [ $? -eq 0 ] && { echo "OK"; return; }
36 grep -v '^\(---\|+++\|@@\)' <<< "$res"
37 ((RC--))
[all …]
/kernel/linux/linux-6.6/sound/firewire/dice/
Ddice-weiss.c1 // SPDX-License-Identifier: GPL-2.0
2 // dice-weiss.c - a part of driver for DICE based devices
13 // Weiss DAC202: 192kHz 2-channel DAC
15 .tx_pcm_chs = {{2, 2, 2}, {0, 0, 0} },
16 .rx_pcm_chs = {{2, 2, 2}, {0, 0, 0} },
19 // Weiss MAN301: 192kHz 2-channel music archive network player
21 .tx_pcm_chs = {{2, 2, 2}, {0, 0, 0} },
22 .rx_pcm_chs = {{2, 2, 2}, {0, 0, 0} },
25 // Weiss INT202: 192kHz unidirectional 2-channel digital Firewire nterface
27 .tx_pcm_chs = {{2, 2, 2}, {0, 0, 0} },
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dexynos5410-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Exynos5410 SoC pin-mux and pin-config device tree source
9 #include <dt-bindings/pinctrl/samsung.h>
13 gpio-controller;
14 #gpio-cells = <2>;
16 interrupt-controller;
17 #interrupt-cells = <2>;
21 gpio-controller;
22 #gpio-cells = <2>;
24 interrupt-controller;
[all …]
/kernel/linux/linux-5.10/arch/xtensa/variants/csp/include/variant/
Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
63 /* Save area for non-coprocessor optional and custom (TIE) state: */
68 #define XCHAL_TOTAL_SA_SIZE 48 /* with 16-byte align padding */
81 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
82 * kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg)
85 * galign = group byte alignment (power of 2) (galign >= align)
86 * align = register byte alignment (power of 2)
89 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
91 * regnum = reg index in regfile, or special/TIE-user reg number
[all …]
/kernel/linux/linux-6.6/arch/xtensa/variants/csp/include/variant/
Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
63 /* Save area for non-coprocessor optional and custom (TIE) state: */
68 #define XCHAL_TOTAL_SA_SIZE 48 /* with 16-byte align padding */
81 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
82 * kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg)
85 * galign = group byte alignment (power of 2) (galign >= align)
86 * align = register byte alignment (power of 2)
89 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
91 * regnum = reg index in regfile, or special/TIE-user reg number
[all …]
/kernel/linux/linux-6.6/tools/testing/selftests/drivers/net/mlxsw/spectrum/
Dvxlan_flooding_ipv6.sh2 # SPDX-License-Identifier: GPL-2.0
9 # +-----------------------+
13 # +----|------------------+
15 # +----|----------------------------------------------------------------------+
17 # | +--|--------------------------------------------------------------------+ |
21 # | | local 2001:db8:2::1 | |
22 # | | remote 2001:db8:2::{2..21} | |
24 # | +-----------------------------------------------------------------------+ |
26 # | 2001:db8:2::0/64 via 2001:db8:3::2 |
30 # +----|----------------------------------------------------------------------+
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/panel/
Dpanel-truly-nt35597.c1 // SPDX-License-Identifier: GPL-2.0
64 struct mipi_dsi_device *dsi[2];
78 { { 0xff, 0x20 }, 2 },
79 { { 0xfb, 0x01 }, 2 },
80 { { 0x00, 0x01 }, 2 },
81 { { 0x01, 0x55 }, 2 },
82 { { 0x02, 0x45 }, 2 },
83 { { 0x05, 0x40 }, 2 },
84 { { 0x06, 0x19 }, 2 },
85 { { 0x07, 0x1e }, 2 },
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/panel/
Dpanel-truly-nt35597.c1 // SPDX-License-Identifier: GPL-2.0
64 struct mipi_dsi_device *dsi[2];
78 { { 0xff, 0x20 }, 2 },
79 { { 0xfb, 0x01 }, 2 },
80 { { 0x00, 0x01 }, 2 },
81 { { 0x01, 0x55 }, 2 },
82 { { 0x02, 0x45 }, 2 },
83 { { 0x05, 0x40 }, 2 },
84 { { 0x06, 0x19 }, 2 },
85 { { 0x07, 0x1e }, 2 },
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/rockchip/
Drk3588-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include "rockchip-pinconf.dtsi"
15 /omit-if-no-ref/
16 clk32k_out1: clk32k-out1 {
19 <2 RK_PC5 1 &pcfg_pull_none>;
25 /omit-if-no-ref/
26 eth0_pins: eth0-pins {
29 <2 RK_PC3 1 &pcfg_pull_none>;
35 /omit-if-no-ref/
[all …]
/kernel/linux/linux-5.10/drivers/staging/fbtft/
Dfb_ssd1331.c1 // SPDX-License-Identifier: GPL-2.0
16 #define DEFAULT_GAMMA "0 2 2 2 2 2 2 2 " \
17 "2 2 2 2 2 2 2 2 " \
18 "2 2 2 2 2 2 2 2 " \
19 "2 2 2 2 2 2 2 2 " \
20 "2 2 2 2 2 2 2 2 " \
21 "2 2 2 2 2 2 2 2 " \
22 "2 2 2 2 2 2 2 2 " \
23 "2 2 2 2 2 2 2" \
27 par->fbtftops.reset(par); in init_display()
[all …]

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