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/kernel/linux/linux-6.6/drivers/gpu/drm/etnaviv/
Dstate_hi.xml.h6 This file was generated by the rules-ng-ng headergen tool in this git repository:
7 http://0x04.net/cgit/index.cgi/rules-ng-ng
8 git clone git://0x04.net/rules-ng-ng
10 The rules-ng-ng source files this header was generated from are:
11 - state.xml ( 27198 bytes, from 2022-04-22 10:35:24)
12 - common.xml ( 35468 bytes, from 2020-10-28 12:56:03)
13 - common_3d.xml ( 15058 bytes, from 2020-10-28 12:56:03)
14 - state_hi.xml ( 34804 bytes, from 2022-12-02 09:06:28)
15 - copyright.xml ( 1597 bytes, from 2020-10-28 12:56:03)
16 - state_2d.xml ( 51552 bytes, from 2020-10-28 12:56:03)
[all …]
/kernel/linux/linux-6.6/Documentation/networking/device_drivers/ethernet/marvell/
Docteontx2.rst1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
7 Copyright (c) 2020 Marvell International Ltd.
12 - `Overview`_
13 - `Drivers`_
14 - `Basic packet flow`_
15 - `Devlink health reporters`_
16 - `Quality of service`_
23 PCI-compatible physical and virtual functions. Each functional block
31 - Network pool or buffer allocator (NPA)
32 - Network interface controller (NIX)
[all …]
/kernel/linux/linux-6.6/include/dt-bindings/interconnect/
Dqcom,sm8250.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (c) 2020, The Linux Foundation. All rights reserved.
21 #define A1NOC_SNOC_SLV 10
23 #define SLAVE_SERVICE_A1NOC 12
35 #define MASTER_UFS_CARD 10
37 #define SLAVE_ANOC_PCIE_GEM_NOC 12
53 #define SLAVE_RBCPR_CX_CFG 10
55 #define SLAVE_RBCPR_MX_CFG 12
110 #define MASTER_SNOC_SF_MEM_NOC 10
112 #define SLAVE_LLCC 12
[all …]
Dqcom,sm8150.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (c) 2020, The Linux Foundation. All rights reserved.
30 #define MASTER_PCIE 10
32 #define MASTER_QDSS_ETR 12
57 #define SLAVE_CDSP_CFG 10
59 #define SLAVE_RBCPR_MMCX_CFG 12
116 #define MASTER_SNOC_SF_MEM_NOC 10
118 #define SLAVE_MSS_PROC_MS_MPU_CFG 12
137 #define SLAVE_MNOC_SF_MEM_NOC 10
139 #define SLAVE_SERVICE_MNOC 12
[all …]
Dqcom,sc7180.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (c) 2020, The Linux Foundation. All rights reserved.
49 #define SLAVE_CAMERA_NRT_THROTTLE_CFG 10
51 #define SLAVE_CLK_CTL 12
107 #define SLAVE_GEM_NOC_SNOC 10
109 #define SLAVE_SERVICE_GEM_NOC 12
124 #define SLAVE_SERVICE_MNOC 10
136 #define SLAVE_SERVICE_NPU_NOC 10
153 #define SLAVE_PIMEM 10
155 #define SLAVE_QDSS_STM 12
Dqcom,sm8450.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
3 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
29 #define MASTER_SDCC_2 10
31 #define SLAVE_SERVICE_A2NOC 12
50 #define SLAVE_RBCPR_MXA_CFG 10
52 #define SLAVE_CRYPTO_0_CFG 12
106 #define MASTER_SNOC_SF_MEM_NOC 10
108 #define SLAVE_LLCC 12
140 #define MASTER_VIDEO_V_PROC 10
142 #define SLAVE_MNOC_SF_MEM_NOC 12
Dqcom,sm8350.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
5 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
32 #define MASTER_UFS_CARD 10
34 #define SLAVE_ANOC_PCIE_GEM_NOC 12
47 #define SLAVE_RBCPR_CX_CFG 10
49 #define SLAVE_RBCPR_MX_CFG 12
113 #define MASTER_SNOC_SF_MEM_NOC 10
115 #define SLAVE_MCDMA_MS_MPU_CFG 12
149 #define SLAVE_MNOC_HF_MEM_NOC 10
151 #define SLAVE_SERVICE_MNOC 12
/kernel/linux/linux-5.10/include/dt-bindings/interconnect/
Dqcom,sm8250.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (c) 2020, The Linux Foundation. All rights reserved.
21 #define A1NOC_SNOC_SLV 10
23 #define SLAVE_SERVICE_A1NOC 12
35 #define MASTER_UFS_CARD 10
37 #define SLAVE_ANOC_PCIE_GEM_NOC 12
53 #define SLAVE_RBCPR_CX_CFG 10
55 #define SLAVE_RBCPR_MX_CFG 12
110 #define MASTER_SNOC_SF_MEM_NOC 10
112 #define SLAVE_LLCC 12
[all …]
Dqcom,sm8150.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (c) 2020, The Linux Foundation. All rights reserved.
30 #define MASTER_PCIE 10
32 #define MASTER_QDSS_ETR 12
57 #define SLAVE_CDSP_CFG 10
59 #define SLAVE_RBCPR_MMCX_CFG 12
116 #define MASTER_SNOC_SF_MEM_NOC 10
118 #define SLAVE_MSS_PROC_MS_MPU_CFG 12
140 #define SLAVE_MNOC_SF_MEM_NOC 10
142 #define SLAVE_SERVICE_MNOC 12
[all …]
Dqcom,sc7180.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (c) 2020, The Linux Foundation. All rights reserved.
49 #define SLAVE_CAMERA_NRT_THROTTLE_CFG 10
51 #define SLAVE_CLK_CTL 12
107 #define SLAVE_GEM_NOC_SNOC 10
109 #define SLAVE_SERVICE_GEM_NOC 12
127 #define SLAVE_SERVICE_MNOC 10
139 #define SLAVE_SERVICE_NPU_NOC 10
156 #define SLAVE_PIMEM 10
158 #define SLAVE_QDSS_STM 12
/kernel/linux/linux-6.6/drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/
Dsun8i_a83t_mipi_csi2_reg.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2020 Kévin L'hôpital <kevin.lhopital@bootlin.com>
4 * Copyright 2020-2022 Bootlin
40 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_CRC_ERR_VC0 BIT(12)
42 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_FRM_SEQ_ERR_VC2 BIT(10)
65 #define SUN8I_A83T_MIPI_CSI2_INT_STA1_DT_ERR_VC0 BIT(12)
67 #define SUN8I_A83T_MIPI_CSI2_INT_STA1_ECC_ERR1_VC2 BIT(10)
95 #define SUN8I_A83T_MIPI_CSI2_INT_MSK0_CRC_ERR_VC0 BIT(12)
97 #define SUN8I_A83T_MIPI_CSI2_INT_MSK0_FRM_SEQ_ERR_VC2 BIT(10)
112 #define SUN8I_A83T_MIPI_CSI2_INT_MSK1_DT_ERR_VC0 BIT(12)
[all …]
/kernel/linux/linux-6.6/drivers/net/can/dev/
Dlength.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (C) 2012, 2020 Oliver Hartkopp <socketcan@hartkopp.net>
11 8, 12, 16, 20, 24, 32, 48, 64
22 0, 1, 2, 3, 4, 5, 6, 7, 8, /* 0 - 8 */
23 9, 9, 9, 9, /* 9 - 12 */
24 10, 10, 10, 10, /* 13 - 16 */
25 11, 11, 11, 11, /* 17 - 20 */
26 12, 12, 12, 12, /* 21 - 24 */
27 13, 13, 13, 13, 13, 13, 13, 13, /* 25 - 32 */
28 14, 14, 14, 14, 14, 14, 14, 14, /* 33 - 40 */
[all …]
/kernel/linux/linux-5.10/include/dt-bindings/clock/
Dmt8167-clk.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2020 MediaTek Inc.
4 * Copyright (c) 2020 BayLibre, SAS.
13 #include <dt-bindings/clock/mt8516-clk.h>
34 #define CLK_TOP_TVDPLL_D2 (CLK_TOP_NR_CLK + 10)
36 #define CLK_TOP_TVDPLL_D8 (CLK_TOP_NR_CLK + 12)
89 #define CLK_MM_DISP_OVL0 10
91 #define CLK_MM_DISP_RDMA1 12
/kernel/linux/linux-6.6/include/dt-bindings/clock/
Dmt8167-clk.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2020 MediaTek Inc.
4 * Copyright (c) 2020 BayLibre, SAS.
13 #include <dt-bindings/clock/mt8516-clk.h>
34 #define CLK_TOP_TVDPLL_D2 (CLK_TOP_NR_CLK + 10)
36 #define CLK_TOP_TVDPLL_D8 (CLK_TOP_NR_CLK + 12)
89 #define CLK_MM_DISP_OVL0 10
91 #define CLK_MM_DISP_RDMA1 12
Dmicrochip,mpfs-clock.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
4 * Copyright (C) 2020-2022 Microchip Technology Inc. All rights reserved.
21 #define CLK_MMUART2 10
23 #define CLK_MMUART4 12
62 #define CLK_CCC_PLL1_OUT2 10
65 #define CLK_CCC_DLL0_OUT0 12
/kernel/linux/linux-6.6/arch/arm/boot/dts/st/
Dstm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
4 * Copyright (c) 2020 Engicam srl
5 * Copyright (c) 2020 Amarula Solutions(India)
8 /dts-v1/;
10 #include "stm32mp157a-microgea-stm32mp1.dtsi"
11 #include "stm32mp15-pinctrl.dtsi"
12 #include "stm32mp15xxaa-pinctrl.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
17 compatible = "engicam,microgea-stm32mp1-microdev2.0-of7",
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/adreno/
Da2xx.xml.h6 This file was generated by the rules-ng-ng headergen tool in this git repository:
10 The rules-ng-ng source files this header was generated from are:
11 - /home/robclark/src/envytools/rnndb/adreno.xml ( 594 bytes, from 2020-07-23…
12 - /home/robclark/src/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2020-07-23…
13 - /home/robclark/src/envytools/rnndb/adreno/a2xx.xml ( 90159 bytes, from 2020-07-23…
14 - /home/robclark/src/envytools/rnndb/adreno/adreno_common.xml ( 14386 bytes, from 2020-07-23…
15 - /home/robclark/src/envytools/rnndb/adreno/adreno_pm4.xml ( 65048 bytes, from 2020-07-23…
16 - /home/robclark/src/envytools/rnndb/adreno/a3xx.xml ( 84226 bytes, from 2020-07-23…
17 - /home/robclark/src/envytools/rnndb/adreno/a4xx.xml ( 112556 bytes, from 2020-07-23…
18 - /home/robclark/src/envytools/rnndb/adreno/a5xx.xml ( 149461 bytes, from 2020-07-23…
[all …]
Da3xx.xml.h6 This file was generated by the rules-ng-ng headergen tool in this git repository:
10 The rules-ng-ng source files this header was generated from are:
11 - /home/robclark/src/envytools/rnndb/adreno.xml ( 594 bytes, from 2020-07-23…
12 - /home/robclark/src/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2020-07-23…
13 - /home/robclark/src/envytools/rnndb/adreno/a2xx.xml ( 90159 bytes, from 2020-07-23…
14 - /home/robclark/src/envytools/rnndb/adreno/adreno_common.xml ( 14386 bytes, from 2020-07-23…
15 - /home/robclark/src/envytools/rnndb/adreno/adreno_pm4.xml ( 65048 bytes, from 2020-07-23…
16 - /home/robclark/src/envytools/rnndb/adreno/a3xx.xml ( 84226 bytes, from 2020-07-23…
17 - /home/robclark/src/envytools/rnndb/adreno/a4xx.xml ( 112556 bytes, from 2020-07-23…
18 - /home/robclark/src/envytools/rnndb/adreno/a5xx.xml ( 149461 bytes, from 2020-07-23…
[all …]
/kernel/linux/linux-6.6/drivers/pinctrl/visconti/
Dpinctrl-tmpv7700.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2020 TOSHIBA CORPORATION
4 * Copyright (c) 2020 Toshiba Electronic Devices & Storage Corporation
5 * Copyright (c) 2020 Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
13 #include "pinctrl-common.h"
52 VISCONTI_PIN(PINCTRL_PIN(5, "gpio5"), REG_IO_DSEL5, 12,
62 VISCONTI_PIN(PINCTRL_PIN(10, "gpio10"), REG_IO_DSEL6, 0,
66 VISCONTI_PIN(PINCTRL_PIN(12, "gpio12"), REG_IO_DSEL6, 8,
67 REG_IO_PUDE2, REG_IO_PUDSEL2, 10),
68 VISCONTI_PIN(PINCTRL_PIN(13, "gpio13"), REG_IO_DSEL6, 12,
[all …]
/kernel/linux/linux-5.10/drivers/pinctrl/visconti/
Dpinctrl-tmpv7700.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2020 TOSHIBA CORPORATION
4 * Copyright (c) 2020 Toshiba Electronic Devices & Storage Corporation
5 * Copyright (c) 2020 Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
13 #include "pinctrl-common.h"
52 VISCONTI_PIN(PINCTRL_PIN(5, "gpio5"), REG_IO_DSEL5, 12,
62 VISCONTI_PIN(PINCTRL_PIN(10, "gpio10"), REG_IO_DSEL6, 0,
66 VISCONTI_PIN(PINCTRL_PIN(12, "gpio12"), REG_IO_DSEL6, 8,
67 REG_IO_PUDE2, REG_IO_PUDSEL2, 10),
68 VISCONTI_PIN(PINCTRL_PIN(13, "gpio13"), REG_IO_DSEL6, 12,
[all …]
/kernel/linux/linux-5.10/drivers/mmc/host/
Dmeson-mx-sdhc.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2020 Martin Blumenstingl <martin.blumenstingl@googlemail.com>
19 #define MESON_SDHC_SEND_DATA_DIR BIT(10)
21 #define MESON_SDHC_SEND_R1B BIT(12)
28 #define MESON_SDHC_CTRL_PACK_LEN GENMASK(12, 4)
40 #define MESON_SDHC_STAT_RXFIFO_CNT GENMASK(12, 6)
56 #define MESON_SDHC_PDMA_RD_BURST GENMASK(14, 10)
83 #define MESON_SDHC_ICTL_DAT1_IRQ BIT(10)
85 #define MESON_SDHC_ICTL_RXFIFO_FULL BIT(12)
102 #define MESON_SDHC_ISTA_DAT1_IRQ BIT(10)
[all …]
/kernel/linux/linux-6.6/drivers/mmc/host/
Dmeson-mx-sdhc.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2020 Martin Blumenstingl <martin.blumenstingl@googlemail.com>
19 #define MESON_SDHC_SEND_DATA_DIR BIT(10)
21 #define MESON_SDHC_SEND_R1B BIT(12)
28 #define MESON_SDHC_CTRL_PACK_LEN GENMASK(12, 4)
40 #define MESON_SDHC_STAT_RXFIFO_CNT GENMASK(12, 6)
56 #define MESON_SDHC_PDMA_RD_BURST GENMASK(14, 10)
83 #define MESON_SDHC_ICTL_DAT1_IRQ BIT(10)
85 #define MESON_SDHC_ICTL_RXFIFO_FULL BIT(12)
102 #define MESON_SDHC_ISTA_DAT1_IRQ BIT(10)
[all …]
/kernel/liteos_a/testsuites/unittest/libc/io/full/
DIt_stdlib_poll_002.cpp2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
33 int g_pipeFd[10][2]; // 2, read and write; 10, listen fd number.
34 static pthread_t g_tid = -1;
35 static const int LISTEN_FD_NUM = 10;
51 while (times--) { in Pthread01()
61 ret = read(fds[i].fd, buffer, 12); // 12, "hello world" length and '\0' in Pthread01()
62 ICUNIT_GOTO_EQUAL(ret, 12, ret, EXIT); // 12, "hello world" length and '\0' in Pthread01()
73 ICUNIT_GOTO_EQUAL(totalNum, LISTEN_FD_NUM, -1, EXIT); in Pthread01()
93 ret = write(g_pipeFd[i][1], "hello world", 12); // 12, "hello world" length and '\0' in Testcase()
[all …]
/kernel/liteos_a/testsuites/kernel/sample/kernel_base/core/swtmr/full/
DIt_los_swtmr_037.c2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
67 ret = LOS_TaskDelay(12); // 12, set delay time in Testcase()
69 …if (g_testCount < 10) { // 10, if g_testCount < 10 set an erro … in Testcase()
70 …ICUNIT_GOTO_EQUAL(g_testCount, 10, g_testCount, EXIT); // 10, if g_testCount < 10 set an erro code… in Testcase()
/kernel/linux/linux-6.6/arch/riscv/kernel/
Djump_label.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020 Emil Renner Berthing
24 long offset = jump_entry_target(entry) - jump_entry_code(entry); in arch_jump_label_transform()
26 if (WARN_ON(offset & 1 || offset < -524288 || offset >= 524288)) in arch_jump_label_transform()
30 (((u32)offset & GENMASK(19, 12)) << (12 - 12)) | in arch_jump_label_transform()
31 (((u32)offset & GENMASK(11, 11)) << (20 - 11)) | in arch_jump_label_transform()
32 (((u32)offset & GENMASK(10, 1)) << (21 - 1)) | in arch_jump_label_transform()
33 (((u32)offset & GENMASK(20, 20)) << (31 - 20)); in arch_jump_label_transform()

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