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/kernel/linux/linux-6.6/arch/arm64/crypto/
Daes-ce-ccm-core.S19 ld1 {v0.16b}, [x0] /* load mac */
30 eor v0.16b, v0.16b, v1.16b
37 bne 5f
42 3: aese v0.16b, v4.16b
43 aesmc v0.16b, v0.16b
45 aese v0.16b, v5.16b
46 aesmc v0.16b, v0.16b
47 5: ld1 {v4.4s}, [x6], #16 /* load next round key */
49 aese v0.16b, v3.16b
50 aesmc v0.16b, v0.16b
[all …]
Dsm3-ce-core.S12 .irp b, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12
17 .inst 0xce60c000 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
21 .inst 0xce60c400 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
25 .inst 0xce400000 | .L\rd | (.L\rn << 5) | (.L\ra << 10) | (.L\rm << 16)
29 .inst 0xce408000 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)
33 .inst 0xce408400 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)
37 .inst 0xce408800 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)
41 .inst 0xce408c00 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)
89 0: ld1 {v0.16b-v3.16b}, [x1], #64
95 CPU_LE( rev32 v0.16b, v0.16b )
[all …]
Daes-modes.S26 encrypt_block4x v0, v1, v2, v3, w3, x2, x8, w7
31 decrypt_block4x v0, v1, v2, v3, w3, x2, x8, w7
35 #if MAX_STRIDE == 5
37 encrypt_block5x v0, v1, v2, v3, v4, w3, x2, x8, w7
42 decrypt_block5x v0, v1, v2, v3, v4, w3, x2, x8, w7
62 ld1 {v0.16b-v3.16b}, [x1], #64 /* get 4 pt blocks */
66 st1 {v0.16b-v3.16b}, [x0], #64
73 ld1 {v0.16b}, [x1], #16 /* get next pt block */
74 encrypt_block v0, w3, x2, x5, w6
75 st1 {v0.16b}, [x0], #16
[all …]
/kernel/linux/linux-6.6/arch/mips/include/asm/mach-cavium-octeon/
Dkernel-entry-init.h30 dmfc0 v0, CP0_CVMMEMCTL_REG
32 dins v0, $0, 0, 6
33 ori v0, CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE
34 dmtc0 v0, CP0_CVMMEMCTL_REG # Write the cavium mem control register
35 dmfc0 v0, CP0_CVMCTL_REG # Read the cavium control register
38 or v0, v0, 0x5001
39 xor v0, v0, 0x1001
43 and v0, v0, v1
44 ori v0, v0, (6 << 7)
58 bnez t1, 5f # Skip WAR for others.
[all …]
/kernel/linux/linux-5.10/arch/mips/include/asm/mach-cavium-octeon/
Dkernel-entry-init.h30 dmfc0 v0, CP0_CVMMEMCTL_REG
32 dins v0, $0, 0, 6
33 ori v0, CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE
34 dmtc0 v0, CP0_CVMMEMCTL_REG # Write the cavium mem control register
35 dmfc0 v0, CP0_CVMCTL_REG # Read the cavium control register
38 or v0, v0, 0x5001
39 xor v0, v0, 0x1001
43 and v0, v0, v1
44 ori v0, v0, (6 << 7)
58 bnez t1, 5f # Skip WAR for others.
[all …]
/kernel/linux/linux-5.10/arch/arm64/crypto/
Dsm3-ce-core.S11 .irp b, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12
16 .inst 0xce60c000 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
20 .inst 0xce60c400 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
24 .inst 0xce400000 | .L\rd | (.L\rn << 5) | (.L\ra << 10) | (.L\rm << 16)
28 .inst 0xce408000 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)
32 .inst 0xce408400 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)
36 .inst 0xce408800 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)
40 .inst 0xce408c00 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)
88 0: ld1 {v0.16b-v3.16b}, [x1], #64
94 CPU_LE( rev32 v0.16b, v0.16b )
[all …]
Daes-ce-ccm-core.S20 ld1 {v0.16b}, [x0] /* load mac */
31 eor v0.16b, v0.16b, v1.16b
38 bne 5f
43 3: aese v0.16b, v4.16b
44 aesmc v0.16b, v0.16b
46 aese v0.16b, v5.16b
47 aesmc v0.16b, v0.16b
48 5: ld1 {v4.4s}, [x6], #16 /* load next round key */
50 aese v0.16b, v3.16b
51 aesmc v0.16b, v0.16b
[all …]
/kernel/linux/linux-5.10/lib/
Dsiphash.c21 #define SIPROUND SIPHASH_PERMUTATION(v0, v1, v2, v3)
24 u64 v0 = SIPHASH_CONST_0; \
32 v0 ^= key->key[0];
38 v0 ^= b; \
44 return (v0 ^ v1) ^ (v2 ^ v3);
58 v0 ^= m; in __siphash_aligned()
67 case 6: b |= ((u64)end[5]) << 40; /* fall through */ in __siphash_aligned()
68 case 5: b |= ((u64)end[4]) << 32; /* fall through */ in __siphash_aligned()
91 v0 ^= m; in __siphash_unaligned()
100 case 6: b |= ((u64)end[5]) << 40; /* fall through */ in __siphash_unaligned()
[all …]
/kernel/linux/linux-6.6/lib/
Dsiphash.c20 #define SIPROUND SIPHASH_PERMUTATION(v0, v1, v2, v3)
23 u64 v0 = SIPHASH_CONST_0; \
31 v0 ^= key->key[0];
37 v0 ^= b; \
43 return (v0 ^ v1) ^ (v2 ^ v3);
57 v0 ^= m; in __siphash_aligned()
66 case 6: b |= ((u64)end[5]) << 40; fallthrough; in __siphash_aligned()
67 case 5: b |= ((u64)end[4]) << 32; fallthrough; in __siphash_aligned()
90 v0 ^= m; in __siphash_unaligned()
99 case 6: b |= ((u64)end[5]) << 40; fallthrough; in __siphash_unaligned()
[all …]
/kernel/linux/linux-5.10/arch/mips/kernel/
Dscall32-o32.S25 .align 5
64 load_a4: user_lw(t5, 16(t0)) # argument #5 from usp
70 sw t5, 16(sp) # argument #5 to ksp
88 subu v0, v0, __NR_O32_Linux # check syscall number
89 sltiu t0, v0, __NR_O32_Linux_syscalls
92 sll t0, v0, 2
102 sltu t0, t0, v0
107 negu v0 # error
109 1: sw v0, PT_R2(sp) # result
121 * syscall number is in v0 unless we called syscall(__NR_###)
[all …]
Dscall64-o32.S27 .align 5
36 dsubu t0, v0, __NR_O32_Linux # check syscall number
43 move a1, v0
69 load_a4: lw a4, 16(t0) # argument #5 from usp
88 dsll t0, v0, 3 # offset into table
94 sltu t0, t0, v0
99 dnegu v0 # error
101 1: sd v0, PT_R2(sp) # result
117 * absolute syscall number is in v0 unless we called syscall(__NR_###)
125 subu t1, v0, __NR_O32_Linux
[all …]
/kernel/linux/linux-6.6/arch/mips/kernel/
Dscall32-o32.S24 .align 5
61 load_a4: user_lw(t5, 16(t0)) # argument #5 from usp
67 sw t5, 16(sp) # argument #5 to ksp
85 subu v0, v0, __NR_O32_Linux # check syscall number
86 sltiu t0, v0, __NR_O32_Linux_syscalls
89 sll t0, v0, 2
99 sltu t0, t0, v0
104 negu v0 # error
106 1: sw v0, PT_R2(sp) # result
118 * syscall number is in v0 unless we called syscall(__NR_###)
[all …]
Dscall64-o32.S27 .align 5
36 dsubu t0, v0, __NR_O32_Linux # check syscall number
43 move a1, v0
69 load_a4: lw a4, 16(t0) # argument #5 from usp
88 dsll t0, v0, 3 # offset into table
94 sltu t0, t0, v0
99 dnegu v0 # error
101 1: sd v0, PT_R2(sp) # result
117 * absolute syscall number is in v0 unless we called syscall(__NR_###)
125 subu t1, v0, __NR_O32_Linux
[all …]
/kernel/linux/linux-6.6/arch/powerpc/lib/
Dmemcpy_power7.S62 blt 5f
81 .align 5
133 5: srdi r6,r5,4
308 bf cr7*4+3,5f
314 5: bf cr7*4+2,6f
316 lvx v0,r4,r9
319 stvx v0,r3,r9
326 lvx v0,r4,r11
331 stvx v0,r3,r11
352 .align 5
[all …]
Dcopyuser_power7.S118 blt 5f
137 .align 5
189 5: srdi r6,r5,4
364 bf cr7*4+3,5f
370 5: bf cr7*4+2,6f
372 err3; lvx v0,r4,r9
375 err3; stvx v0,r3,r9
382 err3; lvx v0,r4,r11
387 err3; stvx v0,r3,r11
408 .align 5
[all …]
/kernel/linux/linux-6.6/tools/testing/selftests/powerpc/copyloops/
Dmemcpy_power7.S62 blt 5f
81 .align 5
133 5: srdi r6,r5,4
308 bf cr7*4+3,5f
314 5: bf cr7*4+2,6f
316 lvx v0,r4,r9
319 stvx v0,r3,r9
326 lvx v0,r4,r11
331 stvx v0,r3,r11
352 .align 5
[all …]
Dcopyuser_power7.S118 blt 5f
137 .align 5
189 5: srdi r6,r5,4
364 bf cr7*4+3,5f
370 5: bf cr7*4+2,6f
372 err3; lvx v0,r4,r9
375 err3; stvx v0,r3,r9
382 err3; lvx v0,r4,r11
387 err3; stvx v0,r3,r11
408 .align 5
[all …]
/kernel/linux/linux-5.10/arch/powerpc/lib/
Dmemcpy_power7.S62 blt 5f
81 .align 5
133 5: srdi r6,r5,4
308 bf cr7*4+3,5f
314 5: bf cr7*4+2,6f
316 lvx v0,r4,r9
319 stvx v0,r3,r9
326 lvx v0,r4,r11
331 stvx v0,r3,r11
352 .align 5
[all …]
Dcopyuser_power7.S118 blt 5f
137 .align 5
189 5: srdi r6,r5,4
364 bf cr7*4+3,5f
370 5: bf cr7*4+2,6f
372 err3; lvx v0,r4,r9
375 err3; stvx v0,r3,r9
382 err3; lvx v0,r4,r11
387 err3; stvx v0,r3,r11
408 .align 5
[all …]
/kernel/linux/linux-5.10/tools/testing/selftests/powerpc/copyloops/
Dmemcpy_power7.S62 blt 5f
81 .align 5
133 5: srdi r6,r5,4
308 bf cr7*4+3,5f
314 5: bf cr7*4+2,6f
316 lvx v0,r4,r9
319 stvx v0,r3,r9
326 lvx v0,r4,r11
331 stvx v0,r3,r11
352 .align 5
[all …]
Dcopyuser_power7.S118 blt 5f
137 .align 5
189 5: srdi r6,r5,4
364 bf cr7*4+3,5f
370 5: bf cr7*4+2,6f
372 err3; lvx v0,r4,r9
375 err3; stvx v0,r3,r9
382 err3; lvx v0,r4,r11
387 err3; stvx v0,r3,r11
408 .align 5
[all …]
/kernel/linux/linux-5.10/include/uapi/linux/
Dpsci.h16 * PSCI v0.1 interface
18 * The PSCI v0.1 function numbers are implementation defined.
22 * to PSCI v0.1.
25 /* PSCI v0.2 interface */
38 #define PSCI_0_2_FN_MIGRATE PSCI_0_2_FN(5)
47 #define PSCI_0_2_FN64_MIGRATE PSCI_0_2_FN64(5)
58 /* PSCI v0.2 power state encoding for CPU_SUSPEND function */
75 /* PSCI v0.2 affinity level state returned by AFFINITY_INFO */
80 /* PSCI v0.2 multicore support in Trusted OS returned by MIGRATE_INFO_TYPE */
113 #define PSCI_RET_ON_PENDING -5
/kernel/linux/linux-5.10/drivers/pcmcia/
Dsa1111_badge4.c30 * on JP6) or 5v0 (short pins 3 and 5 on JP6).
34 * PCM Vpp on BadgePAD 4 can be jumpered for 12v0 (short pins 4 and 6
36 * 12v0 operation requires that the power supply actually supply 12v0
42 * and 2 on JP10) or 5v0 (short pins 2 and 3 on JP10).
50 * tenths of volts; e.g. pcmv=33,120,50 indicates 3v3 PCM Vcc, 12v0
51 * PCM Vpp, and 5v0 CF Vcc.
55 static int badge4_pcmvcc = 50; /* pins 3 and 5 jumpered on JP6 */
/kernel/linux/linux-6.6/include/uapi/linux/
Dpsci.h16 * PSCI v0.1 interface
18 * The PSCI v0.1 function numbers are implementation defined.
22 * to PSCI v0.1.
25 /* PSCI v0.2 interface */
38 #define PSCI_0_2_FN_MIGRATE PSCI_0_2_FN(5)
47 #define PSCI_0_2_FN64_MIGRATE PSCI_0_2_FN64(5)
72 /* PSCI v0.2 power state encoding for CPU_SUSPEND function */
89 /* PSCI v0.2 affinity level state returned by AFFINITY_INFO */
94 /* PSCI v0.2 multicore support in Trusted OS returned by MIGRATE_INFO_TYPE */
131 #define PSCI_RET_ON_PENDING -5
/kernel/linux/linux-5.10/arch/s390/kernel/
Dfpu.c36 asm volatile("std 5,%0" : "=Q" (state->fprs[5])); in __kernel_fpu_begin()
60 " jo 5f\n" /* -> save V0..V31 */ in __kernel_fpu_begin()
72 " jo 2f\n" /* 11 -> save V0..V15 */ in __kernel_fpu_begin()
74 " VSTM 0,7,0,1\n" /* vstm %v0,%v7,0(%r1) */ in __kernel_fpu_begin()
78 "2: VSTM 0,15,0,1\n" /* vstm %v0,%v15,0(%r1) */ in __kernel_fpu_begin()
88 "5: VSTM 0,15,0,1\n" /* vstm %v0,%v15,0(%r1) */ in __kernel_fpu_begin()
118 asm volatile("ld 5,%0" : : "Q" (state->fprs[5])); in __kernel_fpu_end()
142 " jo 5f\n" /* -> restore V0..V31 */ in __kernel_fpu_end()
154 " jo 2f\n" /* 11 -> restore V0..V15 */ in __kernel_fpu_end()
156 " VLM 0,7,0,1\n" /* vlm %v0,%v7,0(%r1) */ in __kernel_fpu_end()
[all …]

12345678910>>...27