| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | axm5516-cpus.dtsi | 74 compatible = "arm,cortex-a15";
82 compatible = "arm,cortex-a15";
90 compatible = "arm,cortex-a15";
98 compatible = "arm,cortex-a15";
106 compatible = "arm,cortex-a15";
114 compatible = "arm,cortex-a15";
122 compatible = "arm,cortex-a15";
130 compatible = "arm,cortex-a15";
138 compatible = "arm,cortex-a15";
146 compatible = "arm,cortex-a15";
[all …]
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| D | ecx-2000.dts | 22 compatible = "arm,cortex-a15";
30 compatible = "arm,cortex-a15";
38 compatible = "arm,cortex-a15";
46 compatible = "arm,cortex-a15";
70 compatible = "arm,cortex-a15-timer", "arm,armv7-timer"; interrupts = <1 13 0xf08>,
83 compatible = "arm,cortex-a15-gic";
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| D | vexpress-v2p-ca15_a7.dts | 40 compatible = "arm,cortex-a15";
50 compatible = "arm,cortex-a15";
150 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
226 pmu-a15 {
227 compatible = "arm,cortex-a15-pmu";
257 /* A15 PLL 0 reference clock */
266 /* A15 PLL 1 reference clock */
337 volt-a15 {
338 /* A15 CPU core voltage */
341 regulator-name = "A15 Vcore";
[all …]
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| D | alpine.dtsi | 47 compatible = "arm,cortex-a15";
54 compatible = "arm,cortex-a15";
61 compatible = "arm,cortex-a15";
68 compatible = "arm,cortex-a15";
83 compatible = "arm,cortex-a15-timer",
95 compatible = "arm,cortex-a15-gic";
122 compatible = "arm,cortex-a15-pmu";
|
| D | hip04.dtsi | 89 compatible = "arm,cortex-a15";
94 compatible = "arm,cortex-a15";
99 compatible = "arm,cortex-a15";
104 compatible = "arm,cortex-a15";
109 compatible = "arm,cortex-a15";
114 compatible = "arm,cortex-a15";
119 compatible = "arm,cortex-a15";
124 compatible = "arm,cortex-a15";
129 compatible = "arm,cortex-a15";
134 compatible = "arm,cortex-a15";
[all …]
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| D | exynos5420-cpus.dtsi | 9 * boards: CPU[0123] being the A15.
14 * Exynos5420 and Exynos5800 always boot from Cortex-A15. On Exynos5422
27 compatible = "arm,cortex-a15";
39 compatible = "arm,cortex-a15";
51 compatible = "arm,cortex-a15";
63 compatible = "arm,cortex-a15";
|
| D | xenvm-4.2.dts | 6 * Cortex-A15 MPCore (V2P-CA15)
30 compatible = "arm,cortex-a15";
36 compatible = "arm,cortex-a15";
55 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
|
| D | exynos5422-cpus.dtsi | 13 * Exynos5420 and Exynos5800 always boot from Cortex-A15. On Exynos5422
78 compatible = "arm,cortex-a15";
91 compatible = "arm,cortex-a15";
104 compatible = "arm,cortex-a15";
117 compatible = "arm,cortex-a15";
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/intel/axm/ |
| D | axm5516-cpus.dtsi | 74 compatible = "arm,cortex-a15";
82 compatible = "arm,cortex-a15";
90 compatible = "arm,cortex-a15";
98 compatible = "arm,cortex-a15";
106 compatible = "arm,cortex-a15";
114 compatible = "arm,cortex-a15";
122 compatible = "arm,cortex-a15";
130 compatible = "arm,cortex-a15";
138 compatible = "arm,cortex-a15";
146 compatible = "arm,cortex-a15";
[all …]
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| /kernel/linux/linux-5.10/arch/c6x/kernel/ |
| D | entry.S | 65 ADD .D1X SP,-8,A15
66 || STDW .D2T1 A15:A14,*SP--[16] ; save A15:A14
69 || STDW .D1T1 A13:A12,*A15--[1]
73 || STDW .D1T1 A11:A10,*A15--[1]
77 || STDW .D1T1 A9:A8,*A15--[1]
80 || STDW .D1T1 A7:A6,*A15--[1]
84 || STDW .D1T1 A5:A4,*A15--[1]
87 || STDW .D1T1 A3:A2,*A15--[1]
91 || STDW .D1T1 A1:A0,*A15--[1]
95 || STDW .D1T1 A31:A30,*A15--[1]
[all …]
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| /kernel/linux/linux-5.10/arch/xtensa/include/asm/ |
| D | atomic.h | 28 * rsil a15, TOPLEVEL
30 * wsr a15, PS
33 * Note that a15 is used here because the register allocation
36 * a15 in the rsil, the machine is guaranteed to be in a state
188 " rsil a15, "__stringify(TOPLEVEL)"\n" \
192 " wsr a15, ps\n" \
196 : "a15", "memory" \
206 " rsil a15,"__stringify(TOPLEVEL)"\n" \
210 " wsr a15, ps\n" \
214 : "a15", "memory" \
[all …]
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| D | cmpxchg.h | 55 " rsil a15, "__stringify(TOPLEVEL)"\n" in __cmpxchg_u32()
60 " wsr a15, ps\n" in __cmpxchg_u32()
64 : "a15", "memory"); in __cmpxchg_u32()
119 * Note that a15 is used here because the register allocation
122 * a15 in the rsil, the machine is guaranteed to be in a state
160 " rsil a15, "__stringify(TOPLEVEL)"\n" in xchg_u32()
163 " wsr a15, ps\n" in xchg_u32()
167 : "a15", "memory"); in xchg_u32()
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/arm/ |
| D | vexpress-v2p-ca15_a7.dts | 40 compatible = "arm,cortex-a15";
50 compatible = "arm,cortex-a15";
150 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
226 pmu-a15 {
227 compatible = "arm,cortex-a15-pmu";
257 /* A15 PLL 0 reference clock */
266 /* A15 PLL 1 reference clock */
337 volt-a15 {
338 /* A15 CPU core voltage */
341 regulator-name = "A15 Vcore";
[all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/calxeda/ |
| D | ecx-2000.dts | 22 compatible = "arm,cortex-a15";
30 compatible = "arm,cortex-a15";
38 compatible = "arm,cortex-a15";
46 compatible = "arm,cortex-a15";
70 compatible = "arm,cortex-a15-timer", "arm,armv7-timer"; interrupts = <1 13 0xf08>,
83 compatible = "arm,cortex-a15-gic";
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/cpu-enable-method/ |
| D | al,alpine-smp | 12 Compatible CPUs: "arm,cortex-a15"
48 compatible = "arm,cortex-a15";
54 compatible = "arm,cortex-a15";
60 compatible = "arm,cortex-a15";
66 compatible = "arm,cortex-a15";
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/cpu-enable-method/ |
| D | al,alpine-smp | 12 Compatible CPUs: "arm,cortex-a15"
48 compatible = "arm,cortex-a15";
54 compatible = "arm,cortex-a15";
60 compatible = "arm,cortex-a15";
66 compatible = "arm,cortex-a15";
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/amazon/ |
| D | alpine.dtsi | 47 compatible = "arm,cortex-a15";
54 compatible = "arm,cortex-a15";
61 compatible = "arm,cortex-a15";
68 compatible = "arm,cortex-a15";
83 compatible = "arm,cortex-a15-timer",
95 compatible = "arm,cortex-a15-gic";
122 compatible = "arm,cortex-a15-pmu";
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/hisilicon/ |
| D | hip04.dtsi | 89 compatible = "arm,cortex-a15";
94 compatible = "arm,cortex-a15";
99 compatible = "arm,cortex-a15";
104 compatible = "arm,cortex-a15";
109 compatible = "arm,cortex-a15";
114 compatible = "arm,cortex-a15";
119 compatible = "arm,cortex-a15";
124 compatible = "arm,cortex-a15";
129 compatible = "arm,cortex-a15";
134 compatible = "arm,cortex-a15";
[all …]
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| /kernel/linux/linux-6.6/arch/arm64/crypto/ |
| D | chacha-neon-core.S | 183 a15 .req w28
235 mov a15, v15.s[0]
261 eor a15, a15, a3
270 ror a15, a15, #16
283 add a11, a11, a15
328 eor a15, a15, a3
337 ror a15, a15, #24
350 add a11, a11, a15
389 eor a15, a15, a0
398 ror a15, a15, #16
[all …]
|
| /kernel/linux/linux-5.10/arch/arm64/crypto/ |
| D | chacha-neon-core.S | 183 a15 .req w28
236 mov a15, v15.s[0]
262 eor a15, a15, a3
271 ror a15, a15, #16
284 add a11, a11, a15
329 eor a15, a15, a3
338 ror a15, a15, #24
351 add a11, a11, a15
390 eor a15, a15, a0
399 ror a15, a15, #16
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/samsung/ |
| D | exynos5420-cpus.dtsi | 9 * boards: CPU[0123] being the A15.
14 * Exynos5420 and Exynos5800 always boot from Cortex-A15. On Exynos5422
59 compatible = "arm,cortex-a15";
71 compatible = "arm,cortex-a15";
83 compatible = "arm,cortex-a15";
95 compatible = "arm,cortex-a15";
|
| D | exynos5422-cpus.dtsi | 13 * Exynos5420 and Exynos5800 always boot from Cortex-A15. On Exynos5422
110 compatible = "arm,cortex-a15";
123 compatible = "arm,cortex-a15";
136 compatible = "arm,cortex-a15";
149 compatible = "arm,cortex-a15";
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/xen/ |
| D | xenvm-4.2.dts | 6 * Cortex-A15 MPCore (V2P-CA15)
30 compatible = "arm,cortex-a15";
36 compatible = "arm,cortex-a15";
55 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
|
| /kernel/linux/linux-6.6/arch/arm/mach-sunxi/ |
| D | headsmp.S | 9 * SMP support for sunxi based systems with Cortex A7/A15
23 * Cortex-A15. These settings are from the vendor kernel.
34 /* The following is Cortex-A15 specific */
55 /* End of Cortex-A15 specific setup */
|
| /kernel/linux/linux-5.10/arch/arm/mach-sunxi/ |
| D | headsmp.S | 9 * SMP support for sunxi based systems with Cortex A7/A15
23 * Cortex-A15. These settings are from the vendor kernel.
34 /* The following is Cortex-A15 specific */
55 /* End of Cortex-A15 specific setup */
|