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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/timer/
Dsamsung,exynos4210-mct.yaml79 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
99 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
120 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
140 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/timer/
Dsamsung,exynos4210-mct.yaml165 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
185 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
206 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
226 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
/kernel/linux/linux-6.6/include/dt-bindings/clock/
Dexynos5410.h13 #define CLK_FIN_PLL 1 macro
Dexynos5250.h13 #define CLK_FIN_PLL 1 macro
Dexynos5420.h13 #define CLK_FIN_PLL 1 macro
Dexynos4.h15 #define CLK_FIN_PLL 3 macro
Dexynos3250.h26 #define CLK_FIN_PLL 2 macro
/kernel/linux/linux-5.10/include/dt-bindings/clock/
Dexynos5410.h13 #define CLK_FIN_PLL 1 macro
Dexynos5250.h13 #define CLK_FIN_PLL 1 macro
Dexynos5420.h13 #define CLK_FIN_PLL 1 macro
Dexynos4.h15 #define CLK_FIN_PLL 3 macro
Dexynos3250.h26 #define CLK_FIN_PLL 2 macro
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/samsung/
Dpmu.yaml127 clocks = <&clock CLK_FIN_PLL>;
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dexynos3250.dtsi168 clocks = <&cmu CLK_FIN_PLL>;
219 assigned-clock-parents = <&cmu CLK_FIN_PLL>,
220 <&cmu CLK_FIN_PLL>;
271 clocks = <&cmu CLK_FIN_PLL>, <&cmu CLK_MCT>;
Dexynos5250.dtsi230 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>,
239 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
284 clocks = <&clock CLK_FIN_PLL>;
650 clocks = <&clock CLK_USB3>, <&clock CLK_FIN_PLL>;
681 clocks = <&clock CLK_USB2>, <&clock CLK_FIN_PLL>;
Dexynos5420.dtsi187 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MAU_EPLL>,
841 clocks = <&clock CLK_FIN_PLL>;
1307 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
Dexynos4210.dtsi114 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
Dexynos5250-snow-common.dtsi672 assigned-clock-parents = <&clock CLK_FIN_PLL>;
/kernel/linux/linux-6.6/arch/arm/boot/dts/samsung/
Dexynos3250.dtsi352 clocks = <&cmu CLK_FIN_PLL>;
402 assigned-clock-parents = <&cmu CLK_FIN_PLL>,
403 <&cmu CLK_FIN_PLL>;
455 clocks = <&cmu CLK_FIN_PLL>, <&cmu CLK_MCT>;
Dexynos5250.dtsi237 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>,
247 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
292 clocks = <&clock CLK_FIN_PLL>;
664 clocks = <&clock CLK_USB3>, <&clock CLK_FIN_PLL>;
695 clocks = <&clock CLK_USB2>, <&clock CLK_FIN_PLL>;
Dexynos5420.dtsi295 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MAU_EPLL>,
924 clocks = <&clock CLK_FIN_PLL>;
1288 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
Dexynos4210.dtsi286 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/samsung/
Dexynos-pmu.yaml189 clocks = <&clock CLK_FIN_PLL>;
/kernel/linux/linux-6.6/drivers/clk/samsung/
Dclk-exynos5250.c228 FRATE(CLK_FIN_PLL, "fin_pll", NULL, 0, 0),
812 if (clk_hw_get_rate(hws[CLK_FIN_PLL]) == 24 * MHZ) { in exynos5250_clk_init()
Dclk-exynos4.c1058 fclk.id = CLK_FIN_PLL; in exynos4_clk_register_finpll()
1294 if (clk_hw_get_rate(hws[CLK_FIN_PLL]) == 24000000) { in exynos4_clk_init()
1308 if (clk_hw_get_rate(hws[CLK_FIN_PLL]) == 24000000) { in exynos4_clk_init()

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