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/kernel/linux/linux-6.6/sound/soc/mediatek/mt8186/
Dmt8186-afe-clk.h72 CLK_TOP_APLL12_DIV0, enumerator
Dmt8186-afe-clk.c65 [CLK_TOP_APLL12_DIV0] = "top_apll12_div0",
520 .div_clk_id = CLK_TOP_APLL12_DIV0,
/kernel/linux/linux-6.6/sound/soc/mediatek/mt8183/
Dmt8183-afe-clk.c44 CLK_TOP_APLL12_DIV0, enumerator
83 [CLK_TOP_APLL12_DIV0] = "top_apll12_div0",
514 .div_clk_id = CLK_TOP_APLL12_DIV0,
/kernel/linux/linux-5.10/sound/soc/mediatek/mt8183/
Dmt8183-afe-clk.c44 CLK_TOP_APLL12_DIV0, enumerator
83 [CLK_TOP_APLL12_DIV0] = "top_apll12_div0",
514 .div_clk_id = CLK_TOP_APLL12_DIV0,
/kernel/linux/linux-6.6/include/dt-bindings/clock/
Dmt8516-clk.h151 #define CLK_TOP_APLL12_DIV0 119 macro
Dmt6765-clk.h113 #define CLK_TOP_APLL12_DIV0 78 macro
Dmt8183-clk.h158 #define CLK_TOP_APLL12_DIV0 122 macro
Dmt6779-clk.h138 #define CLK_TOP_APLL12_DIV0 128 macro
Dmt8192-clk.h154 #define CLK_TOP_APLL12_DIV0 142 macro
Dmt8195-clk.h230 #define CLK_TOP_APLL12_DIV0 218 macro
/kernel/linux/linux-5.10/include/dt-bindings/clock/
Dmt8516-clk.h151 #define CLK_TOP_APLL12_DIV0 119 macro
Dmt6765-clk.h113 #define CLK_TOP_APLL12_DIV0 78 macro
Dmt8183-clk.h158 #define CLK_TOP_APLL12_DIV0 122 macro
Dmt6779-clk.h138 #define CLK_TOP_APLL12_DIV0 128 macro
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/
Dmt8195-afe-pcm.yaml163 <&topckgen 233>, //CLK_TOP_APLL12_DIV0
/kernel/linux/linux-6.6/sound/soc/mediatek/mt8192/
Dmt8192-afe-clk.h206 CLK_TOP_APLL12_DIV0, enumerator
Dmt8192-afe-clk.c49 [CLK_TOP_APLL12_DIV0] = "top_apll12_div0",
422 .div_clk_id = CLK_TOP_APLL12_DIV0,
/kernel/linux/linux-6.6/drivers/clk/mediatek/
Dclk-mt8516.c632 GATE_TOP5(CLK_TOP_APLL12_DIV0, "apll12_div0", "apll12_ck_div0", 0),
Dclk-mt8167.c850 GATE_TOP5(CLK_TOP_APLL12_DIV0, "apll12_div0", "apll12_ck_div0", 0),
Dclk-mt8183.c625 DIV_GATE(CLK_TOP_APLL12_DIV0, "apll12_div0", "apll_i2s0_sel", 0x320, 2, 0x324, 8, 0),
Dclk-mt6765.c516 GATE_TOP2(CLK_TOP_APLL12_DIV0, "apll12_div0", "aud_1_ck", 2),
Dclk-mt8192.c700 DIV_GATE(CLK_TOP_APLL12_DIV0, "apll12_div0", "apll_i2s0_m_sel", 0x320, 0, 0x328, 8, 0),
/kernel/linux/linux-5.10/drivers/clk/mediatek/
Dclk-mt8516.c666 GATE_TOP5(CLK_TOP_APLL12_DIV0, "apll12_div0", "apll12_ck_div0", 0),
Dclk-mt8167.c912 GATE_TOP5(CLK_TOP_APLL12_DIV0, "apll12_div0", "apll12_ck_div0", 0),
Dclk-mt6765.c531 GATE_TOP2(CLK_TOP_APLL12_DIV0, "apll12_div0", "aud_1_ck", 2),

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