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/kernel/linux/linux-6.6/sound/soc/mediatek/mt8186/
Dmt8186-afe-clk.h73 CLK_TOP_APLL12_DIV1, enumerator
Dmt8186-afe-clk.c66 [CLK_TOP_APLL12_DIV1] = "top_apll12_div1",
524 .div_clk_id = CLK_TOP_APLL12_DIV1,
/kernel/linux/linux-6.6/sound/soc/mediatek/mt8183/
Dmt8183-afe-clk.c45 CLK_TOP_APLL12_DIV1, enumerator
84 [CLK_TOP_APLL12_DIV1] = "top_apll12_div1",
518 .div_clk_id = CLK_TOP_APLL12_DIV1,
/kernel/linux/linux-5.10/sound/soc/mediatek/mt8183/
Dmt8183-afe-clk.c45 CLK_TOP_APLL12_DIV1, enumerator
84 [CLK_TOP_APLL12_DIV1] = "top_apll12_div1",
518 .div_clk_id = CLK_TOP_APLL12_DIV1,
/kernel/linux/linux-6.6/include/dt-bindings/clock/
Dmt8516-clk.h152 #define CLK_TOP_APLL12_DIV1 120 macro
Dmt6765-clk.h114 #define CLK_TOP_APLL12_DIV1 79 macro
Dmt8183-clk.h159 #define CLK_TOP_APLL12_DIV1 123 macro
Dmt6779-clk.h139 #define CLK_TOP_APLL12_DIV1 129 macro
Dmt8192-clk.h155 #define CLK_TOP_APLL12_DIV1 143 macro
Dmt8195-clk.h231 #define CLK_TOP_APLL12_DIV1 219 macro
/kernel/linux/linux-5.10/include/dt-bindings/clock/
Dmt8516-clk.h152 #define CLK_TOP_APLL12_DIV1 120 macro
Dmt6765-clk.h114 #define CLK_TOP_APLL12_DIV1 79 macro
Dmt8183-clk.h159 #define CLK_TOP_APLL12_DIV1 123 macro
Dmt6779-clk.h139 #define CLK_TOP_APLL12_DIV1 129 macro
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/
Dmt8195-afe-pcm.yaml164 <&topckgen 234>, //CLK_TOP_APLL12_DIV1
/kernel/linux/linux-6.6/sound/soc/mediatek/mt8192/
Dmt8192-afe-clk.h207 CLK_TOP_APLL12_DIV1, enumerator
Dmt8192-afe-clk.c50 [CLK_TOP_APLL12_DIV1] = "top_apll12_div1",
435 .div_clk_id = CLK_TOP_APLL12_DIV1,
/kernel/linux/linux-6.6/drivers/clk/mediatek/
Dclk-mt8516.c633 GATE_TOP5(CLK_TOP_APLL12_DIV1, "apll12_div1", "apll12_ck_div1", 1),
Dclk-mt8167.c851 GATE_TOP5(CLK_TOP_APLL12_DIV1, "apll12_div1", "apll12_ck_div1", 1),
Dclk-mt8183.c626 DIV_GATE(CLK_TOP_APLL12_DIV1, "apll12_div1", "apll_i2s1_sel", 0x320, 3, 0x324, 8, 8),
Dclk-mt6765.c517 GATE_TOP2(CLK_TOP_APLL12_DIV1, "apll12_div1", "aud_1_ck", 3),
Dclk-mt8192.c701 DIV_GATE(CLK_TOP_APLL12_DIV1, "apll12_div1", "apll_i2s1_m_sel", 0x320, 1, 0x328, 8, 8),
/kernel/linux/linux-5.10/drivers/clk/mediatek/
Dclk-mt8516.c667 GATE_TOP5(CLK_TOP_APLL12_DIV1, "apll12_div1", "apll12_ck_div1", 1),
Dclk-mt8167.c913 GATE_TOP5(CLK_TOP_APLL12_DIV1, "apll12_div1", "apll12_ck_div1", 1),
Dclk-mt6765.c532 GATE_TOP2(CLK_TOP_APLL12_DIV1, "apll12_div1", "aud_1_ck", 3),

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