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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/
Drockchip,i2s-tdm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip,i2s-tdm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip I2S/TDM Controller
10 The Rockchip I2S/TDM Controller is a Time Division Multiplexed
15 - Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
18 - $ref: dai-common.yaml#
23 - rockchip,px30-i2s-tdm
24 - rockchip,rk1808-i2s-tdm
[all …]
Dallwinner,sun4i-a10-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/allwinner,sun4i-a10-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 I2S Controller
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#sound-dai-cells":
19 - const: allwinner,sun4i-a10-i2s
20 - const: allwinner,sun6i-a31-i2s
[all …]
Dsnps,designware-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/snps,designware-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: DesignWare I2S controller
10 - Jose Abreu <joabreu@synopsys.com>
15 - items:
16 - const: canaan,k210-i2s
17 - const: snps,designware-i2s
18 - enum:
[all …]
Dingenic,aic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs AC97 / I2S Controller (AIC)
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: dai-common.yaml#
17 pattern: '^audio-controller@'
21 - enum:
22 - ingenic,jz4740-i2s
23 - ingenic,jz4760-i2s
[all …]
Dintel,keembay-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/sound/intel,keembay-i2s.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Intel KeemBay I2S
11 - Daniele Alessandrelli <daniele.alessandrelli@intel.com>
12 - Paul J. Murphy <paul.j.murphy@intel.com>
15 Intel KeemBay I2S
18 - $ref: dai-common.yaml#
23 - intel,keembay-i2s
[all …]
Drockchip-i2s.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip I2S controller
10 The I2S bus (Inter-IC sound bus) is a serial link for digital
14 - Heiko Stuebner <heiko@sntech.de>
17 - $ref: dai-common.yaml#
22 - const: rockchip,rk3066-i2s
23 - items:
[all …]
Dsamsung-i2s.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/samsung-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung SoC I2S controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
14 - $ref: dai-common.yaml#
19 samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
21 samsung,s5pv210-i2s: for 8/16/24bit multichannel (5.1) I2S with
[all …]
Dimg,i2s-in.txt1 Imagination Technologies I2S Input Controller
5 - compatible : Compatible list, must contain "img,i2s-in"
7 - #sound-dai-cells : Must be equal to 0
9 - reg : Offset and length of the register set for the device
11 - clocks : Contains an entry for each entry in clock-names
13 - clock-names : Must include the following entry:
16 - dmas: Contains an entry for each entry in dma-names.
18 - dma-names: Must include the following entry:
19 "rx" Single DMA channel used by all active I2S channels
21 - img,i2s-channels : Number of I2S channels instantiated in the I2S in block
[all …]
Dhisilicon,hi6210-i2s.txt1 * Hisilicon 6210 i2s controller
5 - compatible: should be one of the following:
6 - "hisilicon,hi6210-i2s"
7 - reg: physical base address of the i2s controller unit and length of
9 - interrupts: should contain the i2s interrupt.
10 - clocks: a list of phandle + clock-specifier pairs, one for each entry
11 in clock-names.
12 - clock-names: should contain following:
13 - "dacodec"
14 - "i2s-base"
[all …]
Datmel,sama5d2-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/sound/atmel,sama5d2-i2s.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Atmel I2S controller
11 - Nicolas Ferre <nicolas.ferre@microchip.com>
12 - Alexandre Belloni <alexandre.belloni@bootlin.com>
13 - Claudiu Beznea <claudiu.beznea@microchip.com>
16 Atmel I2S (Inter-IC Sound Controller) bus is the standard
21 const: atmel,sama5d2-i2s
[all …]
Dnvidia,tegra20-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra20-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra20 I2S Controller
10 The I2S Controller streams synchronous serial audio data between system
11 memory and an external audio device. The controller supports the I2S Left
15 - Thierry Reding <treding@nvidia.com>
16 - Jon Hunter <jonathanh@nvidia.com>
20 const: nvidia,tegra20-i2s
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/
Dallwinner,sun4i-a10-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/allwinner,sun4i-a10-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 I2S Controller Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#sound-dai-cells":
19 - const: allwinner,sun4i-a10-i2s
20 - const: allwinner,sun6i-a31-i2s
[all …]
Drockchip-i2s.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip I2S controller
10 The I2S bus (Inter-IC sound bus) is a serial link for digital
14 - Heiko Stuebner <heiko@sntech.de>
19 - const: rockchip,rk3066-i2s
20 - items:
21 - enum:
[all …]
Dingenic,aic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs AC97 / I2S Controller (AIC) DT bindings
10 - Paul Cercueil <paul@crapouillou.net>
14 pattern: '^audio-controller@'
18 - enum:
19 - ingenic,jz4740-i2s
20 - ingenic,jz4760-i2s
21 - ingenic,jz4770-i2s
[all …]
Datmel-i2s.txt1 * Atmel I2S controller
4 - compatible: Should be "atmel,sama5d2-i2s".
5 - reg: Should be the physical base address of the controller and the
7 - interrupts: Should contain the interrupt for the controller.
8 - dmas: Should be one per channel name listed in the dma-names property,
9 as described in atmel-dma.txt and dma.txt files.
10 - dma-names: Two dmas have to be defined, "tx" and "rx".
11 This IP also supports one shared channel for both rx and tx;
12 if this mode is used, one "rx-tx" name must be used.
13 - clocks: Must contain an entry for each entry in clock-names.
[all …]
Dsamsung-i2s.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/samsung-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung SoC I2S controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
16 samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
18 samsung,s5pv210-i2s: for 8/16/24bit multichannel (5.1) I2S with
22 samsung,exynos5420-i2s: for 8/16/24bit multichannel (5.1) I2S for
[all …]
Dimg,i2s-in.txt1 Imagination Technologies I2S Input Controller
5 - compatible : Compatible list, must contain "img,i2s-in"
7 - #sound-dai-cells : Must be equal to 0
9 - reg : Offset and length of the register set for the device
11 - clocks : Contains an entry for each entry in clock-names
13 - clock-names : Must include the following entry:
16 - dmas: Contains an entry for each entry in dma-names.
18 - dma-names: Must include the following entry:
19 "rx" Single DMA channel used by all active I2S channels
21 - img,i2s-channels : Number of I2S channels instantiated in the I2S in block
[all …]
Dhisilicon,hi6210-i2s.txt1 * Hisilicon 6210 i2s controller
5 - compatible: should be one of the following:
6 - "hisilicon,hi6210-i2s"
7 - reg: physical base address of the i2s controller unit and length of
9 - interrupts: should contain the i2s interrupt.
10 - clocks: a list of phandle + clock-specifier pairs, one for each entry
11 in clock-names.
12 - clock-names: should contain following:
13 - "dacodec"
14 - "i2s-base"
[all …]
Dnvidia,tegra20-i2s.txt1 NVIDIA Tegra 20 I2S controller
4 - compatible : "nvidia,tegra20-i2s"
5 - reg : Should contain I2S registers location and length
6 - interrupts : Should contain I2S interrupt
7 - resets : Must contain an entry for each entry in reset-names.
9 - reset-names : Must include the following entries:
10 - i2s
11 - dmas : Must contain an entry for each entry in clock-names.
13 - dma-names : Must include the following entries:
14 - rx
[all …]
Dzte,zx-i2s.txt1 ZTE ZX296702 I2S controller
4 - compatible : Must be one of:
5 "zte,zx296718-i2s", "zte,zx296702-i2s"
6 "zte,zx296702-i2s"
7 - reg : Must contain I2S core's registers location and length
8 - clocks : Pairs of phandle and specifier referencing the controller's clocks.
9 - clock-names: "wclk" for the wclk, "pclk" for the pclk to the I2S interface.
10 - dmas: Pairs of phandle and specifier for the DMA channel that is used by
12 - dma-names : Must be "tx" and "rx"
14 For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties
[all …]
/kernel/linux/linux-6.6/sound/soc/loongson/
Dloongson_i2s.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * ALSA I2S interface for the Loongson platform
15 /* I2S Common Registers */
16 #define LS_I2S_VER 0x00 /* I2S Version */
17 #define LS_I2S_CFG 0x04 /* I2S Config */
18 #define LS_I2S_CTRL 0x08 /* I2S Control */
19 #define LS_I2S_RX_DATA 0x0C /* I2S DMA RX Address */
20 #define LS_I2S_TX_DATA 0x10 /* I2S DMA TX Address */
22 /* 2K2000 I2S Specify Registers */
23 #define LS_I2S_CFG1 0x14 /* I2S Config1 */
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Dstarfive,jh7110-syscrg.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/starfive,jh7110-syscrg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Emil Renner Berthing <kernel@esmil.dk>
14 const: starfive,jh7110-syscrg
21 - items:
22 - description: Main Oscillator (24 MHz)
23 - description: GMAC1 RMII reference or GMAC1 RGMII RX
24 - description: External I2S TX bit clock
[all …]
/kernel/linux/linux-6.6/sound/soc/qcom/qdsp6/
Dq6prm.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 /* Clock ID for Primary I2S IBIT */
8 /* Clock ID for Primary I2S EBIT */
10 /* Clock ID for Secondary I2S IBIT */
12 /* Clock ID for Secondary I2S EBIT */
14 /* Clock ID for Tertiary I2S IBIT */
16 /* Clock ID for Tertiary I2S EBIT */
18 /* Clock ID for Quartnery I2S IBIT */
20 /* Clock ID for Quartnery I2S EBIT */
22 /* Clock ID for Speaker I2S IBIT */
[all …]
/kernel/linux/linux-5.10/sound/soc/pxa/
Dpxa2xx-i2s.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * pxa2xx-i2s.c -- ALSA Soc Audio Layer
21 #include <sound/pxa2xx-lib.h>
27 #include "pxa2xx-i2s.h"
30 * I2S Controller Register and Bit Definitions
33 #define SACR1 __REG(0x40400004) /* Serial Audio I 2 S/MSB-Justified Control Register */
34 #define SASR0 __REG(0x4040000C) /* Serial Audio I 2 S/MSB-Justified Interface and FIFO Status Reg…
38 #define SADR __REG(0x40400080) /* Serial Audio Data Register (TX and RX FIFO access Register). */
40 #define SACR0_RFTH(x) ((x) << 12) /* Rx FIFO Interrupt or DMA Trigger Threshold */
44 #define SACR0_RST (1 << 3) /* FIFO, i2s Register Reset */
[all …]
/kernel/linux/linux-6.6/sound/soc/pxa/
Dpxa2xx-i2s.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * pxa2xx-i2s.c -- ALSA Soc Audio Layer
21 #include <sound/pxa2xx-lib.h>
24 #include <linux/platform_data/asoc-pxa.h>
26 #include "pxa2xx-i2s.h"
29 * I2S Controller Register and Bit Definitions
32 #define SACR1 (0x0004) /* Serial Audio I 2 S/MSB-Justified Control Register */
33 #define SASR0 (0x000C) /* Serial Audio I 2 S/MSB-Justified Interface and FIFO Status Register */
37 #define SADR (0x0080) /* Serial Audio Data Register (TX and RX FIFO access Register). */
39 #define SACR0_RFTH(x) ((x) << 12) /* Rx FIFO Interrupt or DMA Trigger Threshold */
[all …]

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