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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Dmotorcomm,yt8xxx.yaml23 RGMII RX Clock Delay used only when PHY operates in RGMII mode with
24 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
32 RGMII TX Clock Delay used only when PHY operates in RGMII mode with
33 internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds.
57 drive strength of rx_clk rgmii pad.
58 The YT8531 RGMII LDO voltage supports 1.8V/3.3V, and the LDO voltage can
74 drive strength of rx_data/rx_ctl rgmii pad.
75 The YT8531 RGMII LDO voltage supports 1.8V/3.3V, and the LDO voltage can
97 Use original or inverted RGMII Transmit PHY Clock to drive the RGMII
103 Use original or inverted RGMII Transmit PHY Clock to drive the RGMII
[all …]
Dibm,emac.txt5 special McMAL DMA controller, and sometimes an RGMII or ZMII
45 Supported values are: "mii", "rmii", "smii", "rgmii",
47 For Axon on CAB, it is "rgmii"
55 - rgmii-device : 1 cell, required iff connected to an RGMII. phandle
56 of the RGMII device node.
57 For Axon: phandle of plb5/plb4/opb/rgmii
58 - rgmii-channel : 1 cell, required iff connected to an RGMII. Which
59 RGMII channel is used by this EMAC.
143 phy-mode = "rgmii";
146 rgmii-device = <&RGMII0>;
[all …]
Dadi,adin.yaml21 RGMII RX Clock Delay used only when PHY operates in RGMII mode with
22 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
28 RGMII TX Clock Delay used only when PHY operates in RGMII mode with
29 internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds.
63 phy-mode = "rgmii-id";
Dxlnx,gmii-to-rgmii.yaml4 $id: http://devicetree.org/schemas/net/xlnx,gmii-to-rgmii.yaml#
7 title: Xilinx GMII to RGMII Converter
14 Independent Interface (RGMII) core provides the RGMII between RGMII-compliant
24 const: xlnx,gmii-to-rgmii-1.0
51 compatible = "xlnx,gmii-to-rgmii-1.0";
Dethernet-controller.yaml79 - rgmii
81 # RGMII with internal RX and TX delays provided by the PHY,
83 - rgmii-id
85 # RGMII with internal RX delay provided by the PHY, the MAC
87 - rgmii-rxid
89 # RGMII with internal TX delay provided by the PHY, the MAC
91 - rgmii-txid
270 - rgmii
271 - rgmii-rxid
272 - rgmii-txid
[all …]
Dqcom,ethqos.yaml33 - const: rgmii
56 - rgmii
85 reg-names = "stmmaceth", "rgmii";
86 clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";
107 phy-mode = "rgmii";
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/dsa/
Dsja1105.txt19 of support for RGMII internal delays (supported on P/Q/R/S, but not on
33 clock source or sink for this interface (not applicable for RGMII
35 - In the case of RGMII it affects the behavior regarding internal
38 of "rgmii-id", "rgmii-txid" or "rgmii-rxid", then the entity
39 designated to apply the delay/clock skew necessary for RGMII
45 E or T device, it is an error to specify an RGMII phy-mode other
46 than "rgmii" for a port that is in fixed-link mode. In that case,
88 phy-mode = "rgmii-id";
96 phy-mode = "rgmii-id";
104 phy-mode = "rgmii-id";
[all …]
Dmt7530.txt39 must be either "trgmii" or "rgmii"
54 In the case of a build-in MT7530 switch, port 5 shares the RGMII bus with 2nd
58 and RGMII delay.
68 2. swapped: RGMII TX, RX are swapped; external phy interface with the switch as
76 * mt7621: phy-mode = "rgmii-txid";
77 * mt7623: phy-mode = "rgmii";
145 phy-mode = "rgmii";
157 phy-mode = "rgmii-txid";
216 phy-mode = "rgmii";
235 phy-mode = "rgmii";
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dadi,adin.yaml21 RGMII RX Clock Delay used only when PHY operates in RGMII mode with
22 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
28 RGMII TX Clock Delay used only when PHY operates in RGMII mode with
29 internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds.
47 phy-mode = "rgmii-id";
Dibm,emac.txt5 special McMAL DMA controller, and sometimes an RGMII or ZMII
45 Supported values are: "mii", "rmii", "smii", "rgmii",
47 For Axon on CAB, it is "rgmii"
55 - rgmii-device : 1 cell, required iff connected to an RGMII. phandle
56 of the RGMII device node.
57 For Axon: phandle of plb5/plb4/opb/rgmii
58 - rgmii-channel : 1 cell, required iff connected to an RGMII. Which
59 RGMII channel is used by this EMAC.
143 phy-mode = "rgmii";
146 rgmii-device = <&RGMII0>;
[all …]
Damlogic,meson-dwmac.yaml65 The internal RGMII TX clock delay (provided by this driver) in
67 When phy-mode is set to "rgmii" then the TX delay should be
69 used. When the phy-mode is set to either "rgmii-id" or "rgmii-txid"
82 The internal RGMII RX clock delay (provided by this IP block) in
83 nanoseconds. When phy-mode is set to "rgmii" then the RX delay
85 either "rgmii-id" or "rgmii-rxid" the RX clock delay is already
134 phy-mode = "rgmii";
Dethernet-controller.yaml73 - rgmii
75 # RGMII with internal RX and TX delays provided by the PHY,
77 - rgmii-id
79 # RGMII with internal RX delay provided by the PHY, the MAC
81 - rgmii-rxid
83 # RGMII with internal TX delay provided by the PHY, the MAC
85 - rgmii-txid
126 RGMII Receive Clock Delay defined in pico seconds.
144 RGMII Transmit Clock Delay defined in pico seconds.
Dqcom,ethqos.txt14 - reg-names: Should contain register names "stmmaceth", "rgmii"
19 "ptp_ref", "rgmii"
34 reg-names = "stmmaceth", "rgmii";
35 clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";
52 phy-mode = "rgmii";
Dxilinx_gmii2rgmii.txt5 Independent Interface (RGMII) core provides the RGMII between RGMII-compliant
18 - compatible : Should be "xlnx,gmii-to-rgmii-1.0"
31 compatible = "xlnx,gmii-to-rgmii-1.0";
Dmediatek-dwmac.txt25 It should be defined for RGMII/MII interface.
28 It should be defined for RGMII/MII interface.
30 Both delay properties need to be a multiple of 170 for RGMII interface,
42 1. tx clock will be inversed in MII/RGMII case,
48 1. rx clock will be inversed in MII/RGMII case.
62 phy-mode ="rgmii-rxid";
/kernel/linux/linux-6.6/drivers/net/ethernet/ibm/emac/
Drgmii.h3 * drivers/net/ethernet/ibm/emac/rgmii.h
5 * Driver for PowerPC 4xx on-chip ethernet controller, RGMII bridge support.
25 /* RGMII bridge type */
29 /* RGMII bridge */
35 /* RGMII device */
39 /* RGMII bridge flags */
46 /* number of EMACs using this RGMII bridge */
Drgmii.c3 * drivers/net/ethernet/ibm/emac/rgmii.c
5 * Driver for PowerPC 4xx on-chip ethernet controller, RGMII bridge support.
30 // XXX FIXME: Axon seems to support a subset of the RGMII, we
49 /* RGMII bridge supports only GMII/TBI and RGMII/RTBI PHYs */
87 /* Check if we need to attach to a RGMII */ in rgmii_attach()
209 * rgmii ? if yes, then we'll add a cell_index in rgmii_dump_regs()
246 /* Check for RGMII flags */ in rgmii_probe()
251 if (of_device_is_compatible(ofdev->dev.of_node, "ibm,rgmii-axon")) in rgmii_probe()
261 "RGMII %pOF initialized with%s MDIO support\n", in rgmii_probe()
291 .compatible = "ibm,rgmii",
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/ibm/emac/
Drgmii.h3 * drivers/net/ethernet/ibm/emac/rgmii.h
5 * Driver for PowerPC 4xx on-chip ethernet controller, RGMII bridge support.
25 /* RGMII bridge type */
29 /* RGMII bridge */
35 /* RGMII device */
39 /* RGMII bridge flags */
46 /* number of EMACs using this RGMII bridge */
Drgmii.c3 * drivers/net/ethernet/ibm/emac/rgmii.c
5 * Driver for PowerPC 4xx on-chip ethernet controller, RGMII bridge support.
28 // XXX FIXME: Axon seems to support a subset of the RGMII, we
47 /* RGMII bridge supports only GMII/TBI and RGMII/RTBI PHYs */
85 /* Check if we need to attach to a RGMII */ in rgmii_attach()
207 * rgmii ? if yes, then we'll add a cell_index in rgmii_dump_regs()
244 /* Check for RGMII flags */ in rgmii_probe()
249 if (of_device_is_compatible(ofdev->dev.of_node, "ibm,rgmii-axon")) in rgmii_probe()
259 "RGMII %pOF initialized with%s MDIO support\n", in rgmii_probe()
289 .compatible = "ibm,rgmii",
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/dsa/
Dnxp,sja1105.yaml85 - rgmii
86 - rgmii-rxid
87 - rgmii-txid
88 - rgmii-id
154 phy-mode = "rgmii-id";
162 phy-mode = "rgmii-id";
170 phy-mode = "rgmii-id";
178 phy-mode = "rgmii-id";
186 phy-mode = "rgmii";
Dmicrochip,lan937x.yaml48 - rgmii
49 - rgmii-id
50 - rgmii-txid
51 - rgmii-rxid
124 phy-mode = "rgmii";
138 phy-mode = "rgmii";
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/
Deiger.dts278 RGMII0: emac-rgmii@ef600900 {
279 compatible = "ibm,rgmii-460sx", "ibm,rgmii";
284 RGMII1: emac-rgmii@ef600920 {
285 compatible = "ibm,rgmii-460sx", "ibm,rgmii";
320 phy-mode = "rgmii";
322 rgmii-device = <&RGMII0>;
323 rgmii-channel = <0>;
350 phy-mode = "rgmii";
352 rgmii-device = <&RGMII0>;
353 rgmii-channel = <1>;
[all …]
/kernel/linux/linux-6.6/arch/powerpc/boot/dts/
Deiger.dts278 RGMII0: emac-rgmii@ef600900 {
279 compatible = "ibm,rgmii-460sx", "ibm,rgmii";
284 RGMII1: emac-rgmii@ef600920 {
285 compatible = "ibm,rgmii-460sx", "ibm,rgmii";
320 phy-mode = "rgmii";
322 rgmii-device = <&RGMII0>;
323 rgmii-channel = <0>;
350 phy-mode = "rgmii";
352 rgmii-device = <&RGMII0>;
353 rgmii-channel = <1>;
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/apm/xgene-v2/
Dmac.c21 u32 intf_ctrl, rgmii; in xge_mac_set_speed() local
26 rgmii = xge_rd_csr(pdata, RGMII_REG_0); in xge_mac_set_speed()
37 SET_REG_BIT(&rgmii, CFG_SPEED_125, 0); in xge_mac_set_speed()
44 SET_REG_BIT(&rgmii, CFG_SPEED_125, 0); in xge_mac_set_speed()
51 SET_REG_BIT(&rgmii, CFG_SPEED_125, 1); in xge_mac_set_speed()
60 xge_wr_csr(pdata, RGMII_REG_0, rgmii); in xge_mac_set_speed()
/kernel/linux/linux-6.6/drivers/net/ethernet/apm/xgene-v2/
Dmac.c21 u32 intf_ctrl, rgmii; in xge_mac_set_speed() local
26 rgmii = xge_rd_csr(pdata, RGMII_REG_0); in xge_mac_set_speed()
37 SET_REG_BIT(&rgmii, CFG_SPEED_125, 0); in xge_mac_set_speed()
44 SET_REG_BIT(&rgmii, CFG_SPEED_125, 0); in xge_mac_set_speed()
51 SET_REG_BIT(&rgmii, CFG_SPEED_125, 1); in xge_mac_set_speed()
60 xge_wr_csr(pdata, RGMII_REG_0, rgmii); in xge_mac_set_speed()

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