| /kernel/linux/linux-5.10/include/dt-bindings/clock/ |
| D | s3c2443.h | 32 #define SCLK_I2S0 18 macro
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| D | rk3188-cru-common.h | 31 #define SCLK_I2S0 75 macro
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| D | rk3128-cru.h | 28 #define SCLK_I2S0 80 macro
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| D | rk3228-cru.h | 27 #define SCLK_I2S0 80 macro
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| D | rv1108-cru.h | 25 #define SCLK_I2S0 75 macro
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| D | rk3328-cru.h | 30 #define SCLK_I2S0 41 macro
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| D | rk3288-cru.h | 37 #define SCLK_I2S0 82 macro
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | rockchip-i2s.yaml | 107 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
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| /kernel/linux/linux-5.10/drivers/clk/samsung/ |
| D | clk-s3c2443.c | 115 GATE(SCLK_I2S0, "sclk_i2s0", "mux_i2s0", SCLKCON, 9, 0, 0),
174 ALIAS(SCLK_I2S0, NULL, "i2s-if"),
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/ |
| D | rockchip-i2s.yaml | 133 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
|
| /kernel/linux/linux-6.6/include/dt-bindings/clock/ |
| D | rk3188-cru-common.h | 31 #define SCLK_I2S0 75 macro
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| D | rk3228-cru.h | 27 #define SCLK_I2S0 80 macro
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| D | rk3128-cru.h | 28 #define SCLK_I2S0 80 macro
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| D | rv1108-cru.h | 25 #define SCLK_I2S0 75 macro
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| D | rk3328-cru.h | 30 #define SCLK_I2S0 41 macro
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| D | rk3288-cru.h | 37 #define SCLK_I2S0 82 macro
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| /kernel/linux/linux-6.6/drivers/clk/rockchip/ |
| D | clk-rk3188.c | 547 MUX(SCLK_I2S0, "sclk_i2s0", mux_sclk_i2s0_p, CLK_SET_RATE_PARENT,
672 MUX(SCLK_I2S0, "sclk_i2s0", mux_sclk_i2s0_p, CLK_SET_RATE_PARENT,
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| D | clk-rk3128.c | 358 GATE(SCLK_I2S0, "sclk_i2s0", "i2s0_pre", CLK_SET_RATE_PARENT,
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| D | clk-rk3228.c | 424 GATE(SCLK_I2S0, "sclk_i2s0", "i2s0_pre", CLK_SET_RATE_PARENT,
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| /kernel/linux/linux-5.10/drivers/clk/rockchip/ |
| D | clk-rk3188.c | 546 MUX(SCLK_I2S0, "sclk_i2s0", mux_sclk_i2s0_p, 0,
670 MUX(SCLK_I2S0, "sclk_i2s0", mux_sclk_i2s0_p, CLK_SET_RATE_PARENT,
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| D | clk-rk3128.c | 363 GATE(SCLK_I2S0, "sclk_i2s0", "i2s0_pre", CLK_SET_RATE_PARENT,
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| D | clk-rk3228.c | 423 GATE(SCLK_I2S0, "sclk_i2s0", "i2s0_pre", CLK_SET_RATE_PARENT,
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| D | clk-rv1108.c | 507 GATE(SCLK_I2S0, "sclk_i2s0", "i2s0_pre", CLK_SET_RATE_PARENT,
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/rockchip/ |
| D | rk3288-firefly-reload.dts | 222 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | rk3288-firefly-reload.dts | 222 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
|