Searched +full:am654 +full:- +full:hwspinlock (Results 1 – 16 of 16) sorted by relevance
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/hwlock/ |
| D | ti,omap-hwspinlock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/hwlock/ti,omap-hwspinlock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI HwSpinlock for OMAP and K3 based SoCs 10 - Suman Anna <s-anna@ti.com> 15 - ti,omap4-hwspinlock # for OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs 16 - ti,am654-hwspinlock # for K3 AM65x, J721E and J7200 SoCs 21 "#hwlock-cells": 24 The OMAP hwspinlock users will use a 0-indexed relative hwlock number as [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/hwlock/ |
| D | ti,omap-hwspinlock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/hwlock/ti,omap-hwspinlock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI HwSpinlock for OMAP and K3 based SoCs 10 - Suman Anna <s-anna@ti.com> 15 - ti,omap4-hwspinlock # for OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs 16 - ti,am64-hwspinlock # for K3 AM64x SoCs 17 - ti,am654-hwspinlock # for K3 AM65x, J721E and J7200 SoCs 22 "#hwlock-cells": [all …]
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| /kernel/linux/linux-6.6/drivers/hwspinlock/ |
| D | omap_hwspinlock.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2010-2021 Texas Instruments Incorporated - https://www.ti.com 8 * Hari Kanigeri <h-kanigeri2@ti.com> 9 * Ohad Ben-Cohen <ohad@wizery.com> 10 * Suman Anna <s-anna@ti.com> 22 #include <linux/hwspinlock.h> 38 static int omap_hwspinlock_trylock(struct hwspinlock *lock) in omap_hwspinlock_trylock() 40 void __iomem *lock_addr = lock->priv; in omap_hwspinlock_trylock() 46 static void omap_hwspinlock_unlock(struct hwspinlock *lock) in omap_hwspinlock_unlock() 48 void __iomem *lock_addr = lock->priv; in omap_hwspinlock_unlock() [all …]
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| /kernel/linux/linux-5.10/drivers/hwspinlock/ |
| D | omap_hwspinlock.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2010-2015 Texas Instruments Incorporated - http://www.ti.com 8 * Hari Kanigeri <h-kanigeri2@ti.com> 9 * Ohad Ben-Cohen <ohad@wizery.com> 21 #include <linux/hwspinlock.h> 37 static int omap_hwspinlock_trylock(struct hwspinlock *lock) in omap_hwspinlock_trylock() 39 void __iomem *lock_addr = lock->priv; in omap_hwspinlock_trylock() 45 static void omap_hwspinlock_unlock(struct hwspinlock *lock) in omap_hwspinlock_unlock() 47 void __iomem *lock_addr = lock->priv; in omap_hwspinlock_unlock() 63 static void omap_hwspinlock_relax(struct hwspinlock *lock) in omap_hwspinlock_relax() [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/ti/ |
| D | k3-am65-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy-am654-serdes.h> 11 compatible = "mmio-sram"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 atf-sram@0 { 21 sysfw-sram@f0000 { 25 l3cache-sram@100000 { 30 gic500: interrupt-controller@1800000 { [all …]
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| D | k3-j721e-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2019 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy.h> 8 #include <dt-bindings/mux/mux.h> 9 #include <dt-bindings/mux/ti-serdes.h> 12 cmn_refclk: clock-cmnrefclk { 13 #clock-cells = <0>; 14 compatible = "fixed-clock"; 15 clock-frequency = <0>; 18 cmn_refclk1: clock-cmnrefclk1 { [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/ti/ |
| D | k3-am62a-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 17 gic500: interrupt-controller@1800000 { 18 compatible = "arm,gic-v3"; 25 #address-cells = <2>; 26 #size-cells = <2>; 28 #interrupt-cells = <3>; [all …]
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| D | k3-am62-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 17 gic500: interrupt-controller@1800000 { 18 compatible = "arm,gic-v3"; 19 #address-cells = <2>; 20 #size-cells = <2>; 22 #interrupt-cells = <3>; [all …]
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| D | k3-j7200-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ 9 serdes_refclk: serdes-refclk { 10 #clock-cells = <0>; 11 compatible = "fixed-clock"; 17 compatible = "mmio-sram"; 19 #address-cells = <1>; 20 #size-cells = <1>; 23 atf-sram@0 { 28 scm_conf: scm-conf@100000 { [all …]
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| D | k3-am65-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy-am654-serdes.h> 11 compatible = "mmio-sram"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 atf-sram@0 { 21 sysfw-sram@f0000 { 25 l3cache-sram@100000 { 30 gic500: interrupt-controller@1800000 { [all …]
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| D | k3-j784s4-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 16 atf-sram@0 { 20 tifs-sram@1f0000 { 24 l3cache-sram@200000 { 29 gic500: interrupt-controller@1800000 { 30 compatible = "arm,gic-v3"; [all …]
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| D | k3-j721s2-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/phy/phy-cadence.h> 9 #include <dt-bindings/phy/phy-ti.h> 12 serdes_refclk: clock-cmnrefclk { 13 #clock-cells = <0>; 14 compatible = "fixed-clock"; 15 clock-frequency = <0>; 21 compatible = "mmio-sram"; 23 #address-cells = <1>; [all …]
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| D | k3-am64-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/phy/phy-cadence.h> 9 #include <dt-bindings/phy/phy-ti.h> 12 serdes_refclk: clock-cmnrefclk { 13 #clock-cells = <0>; 14 compatible = "fixed-clock"; 15 clock-frequency = <0>; 21 compatible = "mmio-sram"; 23 #address-cells = <1>; [all …]
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| D | k3-j721e-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy.h> 8 #include <dt-bindings/phy/phy-ti.h> 9 #include <dt-bindings/mux/mux.h> 11 #include "k3-serdes.h" 14 cmn_refclk: clock-cmnrefclk { 15 #clock-cells = <0>; 16 compatible = "fixed-clock"; 17 clock-frequency = <0>; [all …]
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| /kernel/linux/linux-5.10/ |
| D | MAINTAINERS | 9 ------------------------- 30 ``diff -u`` to make the patch easy to merge. Be prepared to get your 40 See Documentation/process/coding-style.rst for guidance here. 46 See Documentation/process/submitting-patches.rst for details. 57 include a Signed-off-by: line. The current version of this 59 Documentation/process/submitting-patches.rst. 70 that the bug would present a short-term risk to other users if it 76 Documentation/admin-guide/security-bugs.rst for details. 81 --------------------------------------------------- 97 W: *Web-page* with status/info [all …]
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| /kernel/linux/linux-6.6/ |
| D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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