Searched full:architected (Results 1 – 25 of 157) sorted by relevance
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/timer/ |
| D | arm,arch_timer.yaml | 7 title: ARM architected timer
13 ARM cores may have a per-core architected timer, which provides per-cpu timers,
14 or a memory mapped architected timer, which provides up to 8 frames with a
17 The per-core architected timer is attached to a GIC to deliver its
78 supported for 32-bit systems which follow the ARMv7 architected reset
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| D | arm,arch_timer_mmio.yaml | 7 title: ARM memory mapped architected timer
14 ARM cores may have a memory mapped architected timer, which provides up to 8
52 supported for 32-bit systems which follow the ARMv7 architected reset
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/timer/ |
| D | arm,arch_timer.yaml | 7 title: ARM architected timer
13 ARM cores may have a per-core architected timer, which provides per-cpu timers,
14 or a memory mapped architected timer, which provides up to 8 frames with a
17 The per-core architected timer is attached to a GIC to deliver its
95 supported for 32-bit systems which follow the ARMv7 architected reset
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| D | arm,arch_timer_mmio.yaml | 7 title: ARM memory mapped architected timer
14 ARM cores may have a memory mapped architected timer, which provides up to 8
52 supported for 32-bit systems which follow the ARMv7 architected reset
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| /kernel/linux/linux-6.6/arch/powerpc/kernel/ |
| D | cpu_specs_book3s_64.h | 200 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
203 .cpu_name = "POWER6 (architected)",
211 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
214 .cpu_name = "POWER7 (architected)",
226 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */
229 .cpu_name = "POWER8 (architected)",
241 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */
244 .cpu_name = "POWER9 (architected)",
255 { /* 3.1-compliant processor, i.e. Power10 "architected" mode */
258 .cpu_name = "POWER10 (architected)",
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| /kernel/linux/linux-5.10/arch/arm/mach-bcm/ |
| D | Kconfig | 10 comment "IPROC architected SoCs"
24 This enables support for systems based on Broadcom IPROC architected SoCs.
89 comment "KONA architected SoCs"
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| /kernel/linux/linux-6.6/arch/arm/mach-bcm/ |
| D | Kconfig | 10 comment "IPROC architected SoCs"
24 This enables support for systems based on Broadcom IPROC architected SoCs.
87 comment "KONA architected SoCs"
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| /kernel/linux/linux-5.10/Documentation/arm64/ |
| D | booting.rst | 184 System caches which respect the architected cache maintenance by VA
186 System caches which do not respect architected cache maintenance by VA
189 - Architected timers
205 All writable architected system registers at the exception level where
273 The requirements described above for CPU mode, caches, MMUs, architected
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| D | amu.rst | 39 The Activity Monitors architecture provides space for up to 16 architected
41 implement additional architected event counters.
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| D | elf_hwcaps.rst | 13 architected discovery mechanism available to userspace code at EL0. The
44 which are described by architected ID registers inaccessible to
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| /kernel/linux/linux-5.10/arch/ia64/include/uapi/asm/ |
| D | perfmon.h | 171 * miscellaneous architected definitions
174 #define PMU_MAX_PMCS 256 /* maximum architected number of PMC registers */
175 #define PMU_MAX_PMDS 256 /* maximum architected number of PMD registers */
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| /kernel/linux/linux-6.6/Documentation/arch/arm64/ |
| D | amu.rst | 39 The Activity Monitors architecture provides space for up to 16 architected
41 implement additional architected event counters.
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| D | booting.rst | 185 System caches which respect the architected cache maintenance by VA
187 System caches which do not respect architected cache maintenance by VA
190 - Architected timers
206 All writable architected system registers at or below the exception
414 The requirements described above for CPU mode, caches, MMUs, architected
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| D | elf_hwcaps.rst | 15 architected discovery mechanism available to userspace code at EL0. The
46 which are described by architected ID registers inaccessible to
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| /kernel/linux/linux-5.10/drivers/iommu/arm/arm-smmu/ |
| D | arm-smmu-qcom.c | 42 * Some platforms support more than the Arm SMMU architected maximum of in qcom_smmu_cfg_probe()
44 * groups don't exhibit the same behavior as the architected registers, in qcom_smmu_cfg_probe()
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| /kernel/linux/linux-5.10/arch/arm/kernel/ |
| D | arch_timer.c | 26 /* Use the architected timer for the delay loop. */ in arch_timer_delay_timer_register()
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| /kernel/linux/linux-5.10/arch/ia64/kernel/ |
| D | sigframe.h | 18 * End of architected state.
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| /kernel/linux/linux-6.6/arch/ia64/kernel/ |
| D | sigframe.h | 18 * End of architected state.
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| /kernel/linux/linux-6.6/arch/arm/kernel/ |
| D | arch_timer.c | 26 /* Use the architected timer for the delay loop. */ in arch_timer_delay_timer_register()
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| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/broadwellde/ |
| D | cache.json | 404 … of the event that counts load uops with true STLB miss retired to the architected path. True STLB…
416 …EBS) of the event that counts store uops true STLB miss retired to the architected path. True STLB…
430 …uses PEBS) of the event that counts load uops with locked access retired to the architected path.",
442 … PEBS) of the event that counts line-splitted load uops retired to the architected path. A line sp…
454 …PEBS) of the event that counts line-splitted store uops retired to the architected path. A line sp…
467 …(that is, uses PEBS) of the event that counts load uops retired to the architected path with a fil…
479 …that is, uses PEBS) of the event that counts store uops retired to the architected path with a fil…
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| /kernel/linux/linux-5.10/arch/arm64/kernel/ |
| D | jump_label.c | 33 * We use the architected A64 NOP in arch_static_branch, so there's no in arch_jump_label_transform_static()
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| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/broadwellde/ |
| D | cache.json | 483 …licDescription": "This event counts load uops with locked access retired to the architected path.",
493 …"PublicDescription": "This event counts line-splitted load uops retired to the architected path. A…
503 …"PublicDescription": "This event counts line-splitted store uops retired to the architected path. …
513 …tion": "This event counts load uops with true STLB miss retired to the architected path. True STLB…
523 …ion": "This event counts store uops with true STLB miss retired to the architected path. True STLB…
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| /kernel/linux/linux-5.10/arch/alpha/include/asm/ |
| D | hwrpb.h | 9 * These values are architected.
31 * These values are architected.
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| /kernel/linux/linux-6.6/arch/alpha/include/asm/ |
| D | hwrpb.h | 9 * These values are architected.
31 * These values are architected.
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| /kernel/linux/linux-6.6/drivers/parisc/ |
| D | gsc.h | 18 /* PA I/O Architected devices support at least 5 bits in the EIM register. */
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