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/kernel/linux/linux-6.6/arch/arm/boot/dts/broadcom/
Dbcm2835-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 * bcm2835, bcm2836 and bcm2837 implementations.
8 interrupt-parent = <&intc>;
11 dma: dma-controller@7e007000 { label
12 compatible = "brcm,bcm2835-dma";
25 /* dma channel 11-14 share one irq */
32 interrupt-names = "dma0",
47 "dma-shared-all";
48 #dma-cells = <1>;
49 brcm,dma-channel-mask = <0x7f35>;
[all …]
Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
[all …]
Dbcm2835.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "bcm2835-common.dtsi"
6 compatible = "brcm,bcm2835";
9 #address-cells = <1>;
10 #size-cells = <0>;
14 compatible = "arm,arm1176jzf-s";
16 /* Source for d/i-cache-line-size and d/i-cache-sets
18 * /h/level-one-memory-system/cache-organization?lang=en
20 * Source for d/i-cache-size
23 * NOTE: The BCM2835 has a L2 cache but it is dedicated to the GPU
[all …]
Dbcm2835-rpi.dtsi1 #include <dt-bindings/power/raspberrypi-power.h>
6 compatible = "raspberrypi,bcm2835-firmware", "simple-mfd";
7 #address-cells = <1>;
8 #size-cells = <1>;
11 dma-ranges;
15 compatible = "raspberrypi,bcm2835-power";
17 #power-domain-cells = <1>;
21 compatible = "brcm,bcm2835-vchiq";
41 pinctrl-names = "default";
42 pinctrl-0 = <&i2c0_gpio0>;
[all …]
Dbcm283x.dtsi1 #include <dt-bindings/pinctrl/bcm2835.h>
2 #include <dt-bindings/clock/bcm2835.h>
3 #include <dt-bindings/clock/bcm2835-aux.h>
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include <dt-bindings/soc/bcm2835-pm.h>
8 /* firmware-provided startup stubs live here, where the secondary CPUs are
14 * bcm2835 and bcm2836 implementations, leaving the CPU configuration to
15 * bcm2835.dtsi and bcm2836.dtsi.
19 compatible = "brcm,bcm2835";
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dbcm2835-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 * bcm2835, bcm2836 and bcm2837 implementations.
8 interrupt-parent = <&intc>;
11 dma: dma@7e007000 { label
12 compatible = "brcm,bcm2835-dma";
25 /* dma channel 11-14 share one irq */
32 interrupt-names = "dma0",
47 "dma-shared-all";
48 #dma-cells = <1>;
49 brcm,dma-channel-mask = <0x7f35>;
[all …]
Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
[all …]
Dbcm2835.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "bcm2835-common.dtsi"
4 #include "bcm2835-rpi-common.dtsi"
7 compatible = "brcm,bcm2835";
10 #address-cells = <1>;
11 #size-cells = <0>;
15 compatible = "arm,arm1176jzf-s";
22 dma-ranges = <0x40000000 0x00000000 0x20000000>;
25 arm-pmu {
26 compatible = "arm,arm1176-pmu";
[all …]
Dbcm2835-rpi.dtsi1 #include <dt-bindings/power/raspberrypi-power.h>
5 compatible = "gpio-leds";
7 led-act {
9 default-state = "keep";
10 linux,default-trigger = "heartbeat";
16 compatible = "raspberrypi,bcm2835-firmware", "simple-mfd";
17 #address-cells = <1>;
18 #size-cells = <1>;
21 dma-ranges;
25 compatible = "raspberrypi,bcm2835-power";
[all …]
Dbcm2836.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "bcm2835-common.dtsi"
4 #include "bcm2835-rpi-common.dtsi"
12 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
15 compatible = "brcm,bcm2836-l1-intc";
17 interrupt-controller;
18 #interrupt-cells = <2>;
19 interrupt-parent = <&local_intc>;
23 arm-pmu {
24 compatible = "arm,cortex-a7-pmu";
[all …]
Dbcm283x.dtsi1 #include <dt-bindings/pinctrl/bcm2835.h>
2 #include <dt-bindings/clock/bcm2835.h>
3 #include <dt-bindings/clock/bcm2835-aux.h>
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include <dt-bindings/soc/bcm2835-pm.h>
8 /* firmware-provided startup stubs live here, where the secondary CPUs are
14 * bcm2835 and bcm2836 implementations, leaving the CPU configuration to
15 * bcm2835.dtsi and bcm2836.dtsi.
19 compatible = "brcm,bcm2835";
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/
Dbrcm,bcm2835-dma.txt1 * BCM2835 DMA controller
3 The BCM2835 DMA controller has 16 channels in total.
11 - compatible: Should be "brcm,bcm2835-dma".
12 - reg: Should contain DMA registers location and length.
13 - interrupts: Should contain the DMA interrupts associated
14 to the DMA channels in ascending order.
15 - interrupt-names: Should contain the names of the interrupt
17 Use "dma-shared-all" for the common interrupt line
18 that is shared by all dma channels.
19 - #dma-cells: Must be <1>, the cell in the dmas property of the
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/dma/
Dbrcm,bcm2835-dma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/brcm,bcm2835-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: BCM2835 DMA controller
10 - Nicolas Saenz Julienne <nsaenz@kernel.org>
13 The BCM2835 DMA controller has 16 channels in total. Only the lower
19 - $ref: dma-controller.yaml#
23 const: brcm,bcm2835-dma
30 Should contain the DMA interrupts associated to the DMA channels in
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/
Dbrcm,bcm2835-sdhost.txt1 Broadcom BCM2835 SDHOST controller
4 by mmc.txt and the properties that represent the BCM2835 controller.
7 - compatible: Should be "brcm,bcm2835-sdhost".
8 - clocks: The clock feeding the SDHOST controller.
11 - dmas: DMA channel for read and write.
12 See Documentation/devicetree/bindings/dma/dma.txt for details
17 compatible = "brcm,bcm2835-sdhost";
21 dmas = <&dma 13>;
22 dma-names = "rx-tx";
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/
Dbrcm,bcm2835-sdhost.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/brcm,bcm2835-sdhost.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom BCM2835 SDHOST controller
10 - Stefan Wahren <stefan.wahren@i2se.com>
13 - $ref: mmc-controller.yaml
17 const: brcm,bcm2835-sdhost
31 dma-names:
32 const: rx-tx
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/
Dbrcm,bcm2835-i2s.txt1 * Broadcom BCM2835 SoC I2S/PCM module
4 - compatible: "brcm,bcm2835-i2s"
5 - reg: Should contain PCM registers location and length.
6 - clocks: the (PCM) clock to use
7 - dmas: List of DMA controller phandle and DMA request line ordered pairs.
8 - dma-names: Identifier string for each DMA request line in the dmas property.
11 One of the DMA channels will be responsible for transmission (should be
17 compatible = "brcm,bcm2835-i2s";
21 dmas = <&dma 2>,
22 <&dma 3>;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/
Dbrcm,bcm2835-i2s.txt1 * Broadcom BCM2835 SoC I2S/PCM module
4 - compatible: "brcm,bcm2835-i2s"
5 - reg: Should contain PCM registers location and length.
6 - clocks: the (PCM) clock to use
7 - dmas: List of DMA controller phandle and DMA request line ordered pairs.
8 - dma-names: Identifier string for each DMA request line in the dmas property.
11 One of the DMA channels will be responsible for transmission (should be
17 compatible = "brcm,bcm2835-i2s";
21 dmas = <&dma 2>,
22 <&dma 3>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/
Dbrcm,bcm2835-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/brcm,bcm2835-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eric Anholt <eric@anholt.net>
14 const: brcm,bcm2835-hdmi
18 - description: HDMI register range
19 - description: HD register range
26 - description: The pixel clock
27 - description: The HDMI state machine clock
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/
Dbrcm,bcm2835-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/brcm,bcm2835-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eric Anholt <eric@anholt.net>
14 const: brcm,bcm2835-hdmi
18 - description: HDMI register range
19 - description: HD register range
26 - description: The pixel clock
27 - description: The HDMI state machine clock
[all …]
/kernel/linux/linux-6.6/drivers/spi/
Dspi-bcm2835.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for Broadcom BCM2835 SPI Controllers
10 * spi-ath79.c, Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
11 * spi-atmel.c, Copyright (C) 2006 Atmel Corporation
18 #include <linux/dma-mapping.h>
74 #define DRV_NAME "spi-bcm2835"
83 * struct bcm2835_spi - BCM2835 SPI controller
94 * @tx_prologue: bytes transmitted without DMA if first TX sglist entry's
96 * @rx_prologue: bytes received without DMA if first RX sglist entry's
99 * @debugfs_dir: the debugfs directory - neede to remove debugfs when
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/interrupt-controller/
Dbrcm,bcm2835-armctrl-ic.txt1 BCM2835 Top-Level ("ARMCTRL") Interrupt Controller
3 The BCM2835 contains a custom top-level interrupt controller, which supports
4 72 interrupt sources using a 2-level register scheme. The interrupt
9 interrupts, but the per-CPU interrupt controller is the root, and an
14 - compatible : should be "brcm,bcm2835-armctrl-ic" or
15 "brcm,bcm2836-armctrl-ic"
16 - reg : Specifies base physical address and size of the registers.
17 - interrupt-controller : Identifies the node as an interrupt controller
18 - #interrupt-cells : Specifies the number of cells needed to encode an
28 Additional required properties for brcm,bcm2836-armctrl-ic:
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Dbrcm,bcm2835-armctrl-ic.txt1 BCM2835 Top-Level ("ARMCTRL") Interrupt Controller
3 The BCM2835 contains a custom top-level interrupt controller, which supports
4 72 interrupt sources using a 2-level register scheme. The interrupt
9 interrupts, but the per-CPU interrupt controller is the root, and an
14 - compatible : should be "brcm,bcm2835-armctrl-ic" or
15 "brcm,bcm2836-armctrl-ic"
16 - reg : Specifies base physical address and size of the registers.
17 - interrupt-controller : Identifies the node as an interrupt controller
18 - #interrupt-cells : Specifies the number of cells needed to encode an
28 Additional required properties for brcm,bcm2836-armctrl-ic:
[all …]
/kernel/linux/linux-5.10/drivers/spi/
Dspi-bcm2835.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for Broadcom BCM2835 SPI Controllers
10 * spi-ath79.c, Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
11 * spi-atmel.c, Copyright (C) 2006 Atmel Corporation
18 #include <linux/dma-mapping.h>
75 #define DRV_NAME "spi-bcm2835"
84 * struct bcm2835_spi - BCM2835 SPI controller
95 * @tx_prologue: bytes transmitted without DMA if first TX sglist entry's
97 * @rx_prologue: bytes received without DMA if first RX sglist entry's
100 * @prepare_cs: precalculated CS register value for ->prepare_message()
[all …]
/kernel/linux/linux-5.10/drivers/dma/
Dbcm2835-dma.c1 // SPDX-License-Identifier: GPL-2.0+
3 * BCM2835 DMA engine support
11 * BCM2708 DMA Driver
17 * MARVELL MMP Peripheral DMA Driver
21 #include <linux/dma-mapping.h>
35 #include "virt-dma.h"
41 * struct bcm2835_dmadev - BCM2835 DMA controller
42 * @ddev: DMA device
108 /* DMA CS Control and Status bits */
109 #define BCM2835_DMA_ACTIVE BIT(0) /* activate the DMA */
[all …]
/kernel/linux/linux-6.6/drivers/dma/
Dbcm2835-dma.c1 // SPDX-License-Identifier: GPL-2.0+
3 * BCM2835 DMA engine support
11 * BCM2708 DMA Driver
17 * MARVELL MMP Peripheral DMA Driver
21 #include <linux/dma-mapping.h>
35 #include "virt-dma.h"
41 * struct bcm2835_dmadev - BCM2835 DMA controller
42 * @ddev: DMA device
108 /* DMA CS Control and Status bits */
109 #define BCM2835_DMA_ACTIVE BIT(0) /* activate the DMA */
[all …]

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