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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/regulator/
Drohm,bd71847-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71847-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ROHM BD71847 and BD71850 Power Management Integrated Circuit regulators
10 - Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
13 List of regulators provided by this controller. BD71847 regulators node
14 should be sub node of the BD71847 MFD node. See BD71847 MFD bindings at
15 Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml
20 Note that if BD71847 starts at RUN state you probably want to use
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/regulator/
Drohm,bd71847-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71847-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ROHM BD71847 and BD71850 Power Management Integrated Circuit regulators
10 - Matti Vaittinen <mazziesaccount@gmail.com>
13 List of regulators provided by this controller. BD71847 regulators node
14 should be sub node of the BD71847 MFD node. See BD71847 MFD bindings at
15 Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml
20 Note that if BD71847 starts at RUN state you probably want to use
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/
Drohm,bd71847-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71847-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ROHM BD71847 and BD71850 Power Management Integrated Circuit bindings
10 - Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
14 single-core, dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is
18 …/www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applica…
19 …//www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applic…
24 - rohm,bd71847
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mfd/
Drohm,bd71847-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71847-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ROHM BD71847 and BD71850 Power Management Integrated Circuit
10 - Matti Vaittinen <mazziesaccount@gmail.com>
14 single-core, dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is
18 …/www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applica…
19 …//www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applic…
24 - rohm,bd71847
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/kernel/linux/linux-6.6/drivers/mfd/
Drohm-bd718x7.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 // ROHM BD71837MWV and BD71847MWV PMIC driver
8 // https://www.rohm.com/datasheet/BD71837MWV/bd71837mwv-e
14 #include <linux/mfd/rohm-bd718x7.h>
23 .gpio = -1,
30 .name = "bd718xx-pwrkey",
35 .name = "gpio-keys",
39 { .name = "bd71837-clk", },
40 { .name = "bd71837-pmic", },
45 .name = "gpio-keys",
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/kernel/linux/linux-5.10/drivers/mfd/
Drohm-bd718x7.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 // ROHM BD71837MWV and BD71847MWV PMIC driver
8 // https://www.rohm.com/datasheet/BD71837MWV/bd71837mwv-e
14 #include <linux/mfd/rohm-bd718x7.h>
23 .gpio = -1,
30 .name = "bd718xx-pwrkey",
35 .name = "gpio-keys",
39 { .name = "bd71837-clk", },
40 { .name = "bd71837-pmic", },
45 .name = "gpio-keys",
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/kernel/linux/linux-5.10/drivers/regulator/
Dbd718x7-regulator.c1 // SPDX-License-Identifier: GPL-2.0
3 // bd71837-regulator.c ROHM BD71837MWV/BD71847MWV regulator driver
9 #include <linux/mfd/rohm-bd718x7.h>
50 * controlled by software - or by PMIC internal HW state machine. Whether
51 * regulator should be under SW or HW control can be defined from device-tree.
95 dev_dbg(&rdev->dev, "Buck[%d] Set Ramp = %d\n", id + 1, in bd718xx_buck1234_set_ramp_delay()
112 dev_err(&rdev->dev, in bd718xx_buck1234_set_ramp_delay()
114 rdev->desc->name, ramp_delay); in bd718xx_buck1234_set_ramp_delay()
117 return regmap_update_bits(rdev->regmap, BD718XX_REG_BUCK1_CTRL + id, in bd718xx_buck1234_set_ramp_delay()
122 * We assume PMIC is in RUN state because SW running and able to query the
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/kernel/linux/linux-6.6/drivers/regulator/
Dbd718x7-regulator.c1 // SPDX-License-Identifier: GPL-2.0
3 // bd71837-regulator.c ROHM BD71837MWV/BD71847MWV regulator driver
9 #include <linux/mfd/rohm-bd718x7.h>
50 * controlled by software - or by PMIC internal HW state machine. Whether
51 * regulator should be under SW or HW control can be defined from device-tree.
97 * We assume PMIC is in RUN state because SW running and able to query the
102 * Note for next hacker - these PMICs have a register where the HW state can be
103 * read. If assuming RUN appears to be false in your use-case - you can
122 ret = regmap_read(rdev->regmap, rdev->desc->enable_reg, &val); in bd71837_get_buck34_enable_hwctrl()
137 * guarantee minimum of 1ms sleep - it shouldn't matter if we in voltage_change_done()
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
Dimx8mn-ddr4-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
9 #include "imx8mn-evk.dtsi"
13 compatible = "fsl,imx8mn-ddr4-evk", "fsl,imx8mn";
17 cpu-supply = <&buck2_reg>;
21 cpu-supply = <&buck2_reg>;
25 cpu-supply = <&buck2_reg>;
29 cpu-supply = <&buck2_reg>;
33 operating-points-v2 = <&ddrc_opp_table>;
35 ddrc_opp_table: opp-table {
[all …]
Dimx8mm-beacon-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 compatible = "mmc-pwrseq-simple";
9 pinctrl-names = "default";
10 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
11 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
13 clock-names = "ext_clock";
14 post-power-on-delay-ms = <80>;
24 cpu-supply = <&buck2_reg>;
28 operating-points-v2 = <&ddrc_opp_table>;
30 ddrc_opp_table: opp-table {
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Dimx8mm-evk.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/usb/pd.h>
13 stdout-path = &uart2;
22 compatible = "gpio-leds";
23 pinctrl-names = "default";
24 pinctrl-0 = <&pinctrl_gpio_led>;
29 default-state = "on";
33 reg_usdhc2_vmmc: regulator-usdhc2 {
34 compatible = "regulator-fixed";
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Dimx8mm-var-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 model = "Variscite VAR-SOM-MX8MM module";
11 compatible = "variscite,var-som-mx8mm", "fsl,imx8mm";
14 stdout-path = &uart4;
22 reg_eth_phy: regulator-eth-phy {
23 compatible = "regulator-fixed";
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_reg_eth_phy>;
26 regulator-name = "eth_phy_pwr";
27 regulator-min-microvolt = <3300000>;
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Dimx8mn-var-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright 2019-2020 Variscite Ltd.
11 model = "Variscite VAR-SOM-MX8MN module";
12 compatible = "variscite,var-som-mx8mn", "fsl,imx8mn";
15 stdout-path = &uart4;
23 reg_eth_phy: regulator-eth-phy {
24 compatible = "regulator-fixed";
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_reg_eth_phy>;
27 regulator-name = "eth_phy_pwr";
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/
Dimx8mn-ddr4-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
9 #include "imx8mn-evk.dtsi"
13 compatible = "fsl,imx8mn-ddr4-evk", "fsl,imx8mn";
17 cpu-supply = <&buck2_reg>;
21 cpu-supply = <&buck2_reg>;
25 cpu-supply = <&buck2_reg>;
29 cpu-supply = <&buck2_reg>;
33 operating-points-v2 = <&ddrc_opp_table>;
35 ddrc_opp_table: opp-table {
[all …]
Dimx8mn-bsh-smm-s2-common.dtsi1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
13 stdout-path = &uart4;
16 fec_supply: fec-supply-en {
17 compatible = "regulator-fixed";
18 vin-supply = <&buck4_reg>;
19 regulator-name = "tja1101_en";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
23 enable-active-high;
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Dimx8mm-emcon.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
13 stdout-path = &uart1;
17 compatible = "gpio-leds";
18 pinctrl-names = "default";
19 pinctrl-0 = <&pinctrl_gpio_led>;
21 led-green {
24 default-state = "on";
25 linux,default-trigger = "heartbeat";
28 led-red {
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Dimx8mm-innocomm-wb15.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 reg_modem: regulator-modem {
11 compatible = "regulator-fixed";
12 pinctrl-names = "default";
13 pinctrl-0 = <&pinctrl_modem_regulator>;
14 regulator-min-microvolt = <3300000>;
15 regulator-max-microvolt = <3300000>;
16 regulator-name = "epdev_on";
18 enable-active-high;
[all …]
Dimx8mn-beacon-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
14 compatible = "mmc-pwrseq-simple";
15 pinctrl-names = "default";
16 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
17 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
19 clock-names = "ext_clock";
20 post-power-on-delay-ms = <80>;
30 cpu-supply = <&buck2_reg>;
34 cpu-supply = <&buck2_reg>;
38 cpu-supply = <&buck2_reg>;
[all …]
Dimx8mm-beacon-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
13 compatible = "mmc-pwrseq-simple";
14 pinctrl-names = "default";
15 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
16 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
18 clock-names = "ext_clock";
19 post-power-on-delay-ms = <80>;
29 cpu-supply = <&buck2_reg>;
33 cpu-supply = <&buck2_reg>;
37 cpu-supply = <&buck2_reg>;
[all …]
Dimx8mm-var-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 model = "Variscite VAR-SOM-MX8MM module";
11 compatible = "variscite,var-som-mx8mm", "fsl,imx8mm";
14 stdout-path = &uart4;
22 reg_eth_phy: regulator-eth-phy {
23 compatible = "regulator-fixed";
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_reg_eth_phy>;
26 regulator-name = "eth_phy_pwr";
27 regulator-min-microvolt = <3300000>;
[all …]
Dimx8mn-var-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright 2019-2020 Variscite Ltd.
11 model = "Variscite VAR-SOM-MX8MN module";
12 compatible = "variscite,var-som-mx8mn", "fsl,imx8mn";
15 stdout-path = &uart4;
23 reg_eth_phy: regulator-eth-phy {
24 compatible = "regulator-fixed";
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_reg_eth_phy>;
27 regulator-name = "eth_phy_pwr";
[all …]
Dimx8mm-data-modul-edm-sbc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/net/qca-ar803x.h>
9 #include <dt-bindings/phy/phy-imx8-pcie.h>
14 compatible = "dmo,imx8mm-data-modul-edm-sbc", "fsl,imx8mm";
22 stdout-path = &uart3;
32 compatible = "pwm-backlight";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pinctrl_panel_backlight>;
35 brightness-levels = <0 1 10 20 30 40 50 60 70 75 80 90 100>;
[all …]
Dimx8mm-evk.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
9 #include <dt-bindings/usb/pd.h>
14 stdout-path = &uart2;
22 hdmi-connector {
23 compatible = "hdmi-connector";
29 remote-endpoint = <&adv7535_out>;
35 compatible = "gpio-leds";
36 pinctrl-names = "default";
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/kernel/linux/linux-6.6/drivers/clk/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
88 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
97 This driver supports the hi655x PMIC clock. This
98 multi-function device has one fixed-rate oscillator, clocked
129 be pre-programmed to support other configurations and features not yet
178 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
181 tristate "Clock Driver for TI TPS68470 PMIC"
186 This driver supports the clocks provided by the TPS68470 PMIC.
196 For example, the CDCE925 contains two PLLs with spread-spectrum
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/kernel/linux/linux-5.10/drivers/clk/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
76 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
85 This driver supports the hi655x PMIC clock. This
86 multi-function device has one fixed-rate oscillator, clocked
117 be pre-programmed to support other configurations and features not yet
166 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
176 For example, the CDCE925 contains two PLLs with spread-spectrum
186 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
229 clock. These multi-function devices have two (S2MPS14) or three
230 (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
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