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/arkcompiler/runtime_core/static_core/verification/util/tests/
Dbit_vector_property_test.cpp39 BitVector bits; member
43 if (bits.SetBitsCount() != indices.size()) { in IsEqual()
47 if (!bits[elem]) { in IsEqual()
70 BitVector bits {size}; in arbitrary() local
72 bits[idx] = 1; in arbitrary()
74 return BSet {set, bits}; in arbitrary()
114 ClassifySize("Bits.size() in", bitset.bits.Size(), g_statIntervals); in Stat()
127 RC_ASSERT(bit_set.bits.SetBitsCount() == bit_set.indices.size());
133 auto bits = bit_set.bits; variable
134 RC_ASSERT(bits.Size() == bit_set.bits.Size());
[all …]
/arkcompiler/ets_runtime/ecmascript/compiler/
Dinterpreter_stub-inl.h127 /* 2 : skip 8 bits of opcode and 8 bits of low bits */ in ReadInstSigned16_0()
130 GateRef currentInst2 = Int32LSL(currentInst1, Int32(8)); // 8 : set as high 8 bits in ReadInstSigned16_0()
140 /* 4 : skip 8 bits of opcode and 24 bits of low bits */ in ReadInstSigned32_0()
143 GateRef currentInst1 = Int32LSL(currentInst, Int32(8)); // 8 : set as high 8 bits in ReadInstSigned32_0()
145 GateRef currentInst3 = Int32LSL(currentInst2, Int32(8)); // 8 : set as high 8 bits in ReadInstSigned32_0()
147 GateRef currentInst5 = Int32LSL(currentInst4, Int32(8)); // 8 : set as high 8 bits in ReadInstSigned32_0()
156 /* 2 : skip 8 bits of opcode and 8 bits of low bits */ in ReadInst16_0()
158 GateRef currentInst2 = Int16LSL(currentInst1, Int16(8)); // 8 : set as high 8 bits in ReadInst16_0()
167 /* 3 : skip 8 bits of opcode, 8 bits of prefix and 8 bits of low bits */ in ReadInst16_1()
169 GateRef currentInst2 = Int16LSL(currentInst1, Int16(8)); // 8 : set as high 8 bits in ReadInst16_1()
[all …]
Dlcr_circuit_builder.cpp137 auto bits = LoadStoreAccessor::ToValue(mAttr); in Load() local
138 GateRef result = GetCircuit()->NewGate(GetCircuit()->Load(bits), type.GetMachineType(), in Load()
148 auto bits = LoadStoreAccessor::ToValue(mAttr); in Load() local
149 GateRef result = GetCircuit()->NewGate(GetCircuit()->Load(bits), type.GetMachineType(), in Load()
158 auto bits = LoadStoreAccessor::ToValue(mAttr); in Load() local
159 GateRef result = GetCircuit()->NewGate(GetCircuit()->Load(bits), type.GetMachineType(), in Load()
212 GateRef bits = Int32(base::INT32_BITS - 1); in DoubleToInt() local
214 BRANCH_CIR2(Int32LessThan(exp, bits), exit, &overflow); in DoubleToInt()
246 GateRef bits = Int32(typeBits - 1); in DoubleToInt() local
248 BRANCH_CIR2(Int32LessThan(exp, bits), &exit, &overflow); in DoubleToInt()
/arkcompiler/ets_runtime/ecmascript/
Djs_tagged_value_internals.h25 // Every double with all of its exponent bits set and its highest mantissa bit set is a quiet NaN.
26 // That leaves 51 bits unaccounted for. We’ll avoid one of those so that we don’t step on Intel’s
27 // “QNaN Floating-Point Indefinite” value, leaving us 50 bits. Those remaining bits can be anythin…
28 // so we use a special quietNaN as TaggedInt tag(highest 16bits as 0xFFFF), and need to encode dou…
33 // WeakRef: [0x0000] [47 bits direct pointer] | 1
40 // False: [56 bits 0] | 0x06 // 0110
41 // True: [56 bits 0] | 0x07 // 0111
42 // Undefined: [56 bits 0] | 0x02 // 0010
43 // Null: [56 bits 0] | 0x03 // 0011
44 // Hole: [56 bits 0] | 0x05 // 0101
[all …]
/arkcompiler/toolchain/tooling/base/
Dpt_base64.cpp62 …*dest++ = (base64Chars[0] << 2) | ((base64Chars[1] & 0x30) >> 4); // 2: shift 2bits, 4: shift 4bits in Decode()
63 …*dest++ = (base64Chars[1] << 4) | ((base64Chars[2] & 0x3c) >> 2); // 2: shift 2bits, 4: shift 4bits in Decode()
64 …*dest++ = (base64Chars[2] << 6) | base64Chars[3]; // 6: shift 6bits, 2: the second char, 3: the th… in Decode()
72 … tmp[0] = (base64Chars[0] << 2) | ((base64Chars[1] & 0x30) >> 4); // 2: shift 2bits, 4: shift 4bits in Decode()
73 … tmp[1] = (base64Chars[1] << 4) | ((base64Chars[2] & 0x3c) >> 2); // 2: shift 2bits, 4: shift 4bits in Decode()
74 …tmp[2] = (base64Chars[2] << 6) | base64Chars[3]; // 6: shift 6bits, 2: the second char, 3: the thi… in Decode()
100 *dest++ = ENCODE_TABLE[src[0] >> 2]; // 2: shift 2bits in Encode()
101 *dest++ = ENCODE_TABLE[((src[0] & 0x03) << 4) | (src[1] >> 4)]; // 4: shift 4bits in Encode()
102 … *dest++ = ENCODE_TABLE[((src[1] & 0x0f) << 2) | (src[2] >> 6)]; // 2: shift 2bits, 6: shift 6bits in Encode()
112 *dest++ = ENCODE_TABLE[src[0] >> 2]; // 2: shift 2bits in Encode()
[all …]
/arkcompiler/toolchain/build/third_party_gn/musl/
Dmusl_src.gni1857 "arch/arm/bits/fcntl.h",
1858 "arch/arm/bits/fenv.h",
1859 "arch/arm/bits/float.h",
1860 "arch/arm/bits/hwcap.h",
1861 "arch/arm/bits/ioctl_fix.h",
1862 "arch/arm/bits/ipcstat.h",
1863 "arch/arm/bits/msg.h",
1864 "arch/arm/bits/posix.h",
1865 "arch/arm/bits/ptrace.h",
1866 "arch/arm/bits/reg.h",
[all …]
/arkcompiler/runtime_core/static_core/runtime/include/coretypes/
Dtagged_value.h48 // Every double with all of its exponent bits set and its highest mantissa bit set is a quiet NaN.
49 // That leaves 51 bits unaccounted for. We’ll avoid one of those so that we don’t step on Intel’s
50 // “QNaN Floating-Point Indefinite” value, leaving us 50 bits. Those remaining bits can be anythin…
51 // so we use a special quietNaN as TaggedInt tag(highest 16bits as 0xFFFF), and need to encode dou…
56 // WeakRef: [0x0000] [47 bits direct pointer] | 1 bit 1
63 // False: [56 bits 0] | 0x06 // 0110
64 // True: [56 bits 0] | 0x07 // 0111
65 // Undefined: [56 bits 0] | 0x0a // 1010
66 // Null: [56 bits 0] | 0x02 // 0010
67 // Hole: [56 bits 0] | 0x00 // 0000
[all …]
/arkcompiler/runtime_core/static_core/runtime/tooling/sampler/
Dsample_writer.h45 * module row for 64-bits:
51 * sample row for 64-bits:
62 * 32 bits 32 bits 64 bits (128 * <stack size>) bits
66 * 64 bits 64 bits 32 bits 64 bits (8 * <name size>) bits
Dsample_reader-inl.h39 * 32 bits 32 bits 64 bits (128 * <stack size>) bits
44 * 64 bits 64 bits 32 bits 64 bits (8 * <name size>) bits
/arkcompiler/runtime_core/libpandabase/utils/
Dhash_base.h31 * \brief Create 32 bits Hash from \param key via \param seed.
35 * @return 32 bits hash
42 * \brief Create 32 bits Hash from \param key.
45 * @return 32 bits hash
52 * \brief Create 32 bits Hash from MUTF8 \param string.
54 * @return 32 bits hash
61 * \brief Create 32 bits Hash from MUTF8 \param string.
64 * @return 32 bits hash
Dhash.h36 * \brief Create 32 bits Hash from \param key via \param seed.
40 * @return 32 bits hash
48 * \brief Create 32 bits Hash from \param key.
51 * @return 32 bits hash
59 * \brief Create 32 bits Hash from MUTF8 \param string.
61 * @return 32 bits hash
69 * \brief Create 32 bits Hash from MUTF8 \param string.
72 * @return 32 bits hash
157 …// note that the numbers are for 32 bits specifically, see https://github.com/HowardHinnant/hash_a… in merge_hashes()
/arkcompiler/runtime_core/static_core/libpandabase/utils/
Dhash_base.h30 * @brief Create 32 bits Hash from @param key via @param seed.
34 * @return 32 bits hash
41 * @brief Create 32 bits Hash from @param key.
44 * @return 32 bits hash
51 * @brief Create 32 bits Hash from MUTF8 @param string.
53 * @return 32 bits hash
60 * @brief Create 32 bits Hash from MUTF8 @param string.
63 * @return 32 bits hash
Dhash.h35 * @brief Create 32 bits Hash from @param key via @param seed.
39 * @return 32 bits hash
47 * @brief Create 32 bits Hash from @param key.
50 * @return 32 bits hash
58 * @brief Create 32 bits Hash from MUTF8 @param string.
60 * @return 32 bits hash
68 * @brief Create 32 bits Hash from MUTF8 @param string.
71 * @return 32 bits hash
151 …// note that the numbers are for 32 bits specifically, see https://github.com/HowardHinnant/hash_a… in MergeHashes()
/arkcompiler/runtime_core/bytecode_optimizer/
Dtagged_value.h27 // Every double with all of its exponent bits set and its highest mantissa bit set is a quiet NaN.
28 // That leaves 51 bits unaccounted for. We’ll avoid one of those so that we don’t step on Intel’s
29 // “QNaN Floating-Point Indefinite” value, leaving us 50 bits. Those remaining bits can be anythin…
30 // so we use a special quietNaN as TaggedInt tag(highest 16bits as 0xFFFF), and need to encode dou…
35 // WeakRef: [0x0000] [47 bits direct pointer] | 1 bit 1
42 // False: [56 bits 0] | 0x06 // 0110
43 // True: [56 bits 0] | 0x07 // 0111
44 // Undefined: [56 bits 0] | 0x0a // 1010
45 // Null: [56 bits 0] | 0x02 // 0010
46 // Hole: [56 bits 0] | 0x00 // 0000
[all …]
/arkcompiler/runtime_core/static_core/runtime/
Dobject_header_config.h44 // Config for High-end devices with hash stored inside object header and 32 bits pointer
49 static constexpr Size BITS = 32U; variable
54 // Config for High-end devices with hash stored inside object header and 64 bits pointer
59 static constexpr Size BITS = 64UL; variable
64 // Config for Low-end devices with hash stored inside object header and 32 bits pointer
69 static constexpr Size BITS = 16U; variable
Dmark_word.h17 // 64 bits object header for high-end devices: (64 bits pointer)
19 // | Object Header (128 bits) | …
21 // | Mark Word (64 bits) | Class Word (64 bits) | …
34 // 64 bits object header for high-end devices: (32 bits pointer)
36 // | Object Header (64 bits) | …
38 // | Mark Word (32 bits) | Class Word (32 bits) | …
53 // | Object Header (64 bits) | …
55 // | Mark Word (32 bits) | Class Word (32 bits) | …
66 // 32 bits object header for low-end devices:
68 // | Object Header (32 bits) | …
[all …]
/arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_util/src/
Dliteralstrname.cpp29 // The upper 4 bits and lower 4 bits of bytes[i] are transformed to hex form and restored separatel…
39 … kMplDigits[(bytes[i] & 0xf0) >> k16BitShift]; // get the hex value of upper 4 bits of bytes[i] in GetHexStr()
41 kMplDigits[bytes[i] & 0x0f]; // get the hex value of lower 4 bits of bytes[i] in GetHexStr()
48 // where s[i] is the value of swapping the upper 8 bits and lower 8 bits of data[i].
/arkcompiler/ets_runtime/ecmascript/builtins/
Dbuiltins_bigint.cpp65 JSHandle<JSTaggedValue> bits = GetCallArg(argv, 0); in AsUintN() local
67 // 1. Let bits be ? ToIndex(bits). in AsUintN()
68 JSTaggedNumber index = JSTaggedValue::ToIndex(thread, bits); in AsUintN()
74 // 3. Return a BigInt representing bigint modulo 2bits. in AsUintN()
84 JSHandle<JSTaggedValue> bits = GetCallArg(argv, 0); in AsIntN() local
86 // 1. Let bits be ? ToIndex(bits). in AsIntN()
87 JSTaggedNumber index = JSTaggedValue::ToIndex(thread, bits); in AsIntN()
93 // 3. Let mod be ℝ(bigint) modulo 2bits. in AsIntN()
94 // 4. If mod ≥ 2bits - 1, return ℤ(mod - 2bits); otherwise, return ℤ(mod). in AsIntN()
/arkcompiler/ets_runtime/ecmascript/ic/
Dprofile_type_info.h105 * | 64 bits jit osr |
108 * | low 32 bits(PeriodCount) |
109 * | hight 32 bits(jit hotness) |
111 * | low 32 bits(osr hotness) |
112 * | hight 32 bits(baseline hotness)|
331 // jit hotness(16bits) + count(16bits)
342 // osr hotness(16bits) + count(16bits)
348 // baselinejit hotness(16bits)
359 // jit call threshold(8bits) + count(8bits)
/arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/include/cg/aarch64/
Daarch64_imm_valid.h24 // mask1 is a 64bits number that is all 1 shifts left size bits in IsBitSizeImmediate()
26 // mask2 is a 64 bits number that nlowerZeroBits are all 1, higher bits aro all 0 in IsBitSizeImmediate()
47 // get lower 32 bits in IsMoveWidableImmediateCopy()
49 …// If lower 32 bits are all 0, but higher 32 bits have 1, val will be 1 and return true, but it is… in IsMoveWidableImmediateCopy()
65 // When value & ffffffff00000000 is 0, all high 32-bits are 0. in IsSingleInstructionMovable32()
66 // When value & ffffffff00000000 is ffffffff00000000, all high 32-bits are 1. in IsSingleInstructionMovable32()
67 // High 32-bits should be all 0 or all 1, when it comes to mov w0, #imm. in IsSingleInstructionMovable32()
124 // aarch64 assembly takes up to 24-bits immediate, generating in Imm16BitValid()
/arkcompiler/runtime_core/static_core/plugins/ets/tests/interop_js/tests/proxies/ets_proxy/
Dcheck_access_primitives.js45 function testSInt(tname, bits) { argument
46 let msb = bits - 1;
49 function testUInt(tname, bits) { argument
50 let msb = bits - 1;
/arkcompiler/runtime_core/static_core/plugins/ets/compiler/
Dir_build_intrinsics_ets.cpp30 fraction size is 23 bits for floats and 52 bits for doubles
31 exponent mask is 0xff (8 bits) for floats and 0x7ff (11 bits) for doubles
/arkcompiler/ets_runtime/ecmascript/compiler/assembler/aarch64/
Dmacro_assembler_aarch64.cpp223 /* get lower 32 bits */ in IsMoveWidableImmediate()
306 …/* a 64 bits number is split 4 chunks, each chunk has 16 bits. check each chunk whether is all 1 o… in BetterUseMOVZ()
328 std::cout << "only support 32 and 64 bits size!" << std::endl; in CopyImm()
333 /* check lower 16 bits and higher 16 bits respectively */ in CopyImm()
342 /* create an imm opereand which represents lower 16 bits of the immediate */ in CopyImm()
345 /* create an imm opereand which represents upper 16 bits of the immediate */ in CopyImm()
362 /* get lower 32 bits of the immediate */ in CopyImmSize64()
364 /* get upper 32 bits of the immediate */ in CopyImmSize64()
369 … /* compute lower 32 bits, and then copy to higher 32 bits, so only 2 chunks need be processed */ in CopyImmSize64()
396 /* copy lower 32 bits to higher 32 bits */ in CopyImmSize64()
/arkcompiler/runtime_core/static_core/plugins/ets/stdlib/escompat/
DDataView.sts135 let bits = value;
138 let byteVal = ((bits >>> (i * 8)) & 0xff) as byte
203 let bits = value;
206 let byteVal = ((bits >>> (i * 8)) & 0xff) as byte
307 let bits = value;
310 let byteVal = ((bits >>> (i * 8)) & 0xff) as byte
340 let bits = value;
343 let byteVal = ((bits >>> (i * 8)) & 0xff) as byte
444 let bits = value;
447 let byteVal = ((bits >>> (i * 8)) & 0xff) as byte
[all …]
/arkcompiler/runtime_core/static_core/docs/
Dcode_metainfo.md42 Columns width is in a bits.
53 Column width can't be greater than 32 bits, because `BitTableBuilder` class, that aims to build bit…
73 Row size is 25 bits, that is sum of columns width: 2 + 0 + 15 + 8.
74 …e in a table, e.g. for 2th column it is zero row, that has value 31547. This value fits in 15 bits.
76 So, the size of this table's data is 25 * 5 = 125 bits = 15.625 bytes.
80 Bitmap table is a Bit table with one column, that doesn't have 32-bits limitation for the width.
86 The first four bits determine the variable length of the encoded number:
87 - Values 0..11 represent the result as-is, with no further following bits.
88 - Values 12..15 mean the result is in the next 8/16/24/32-bits respectively.

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