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Searched full:cacheable (Results 1 – 25 of 439) sorted by relevance

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/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/amdzen1/
D	cache.json	5 …transferred from IC pipe to DE instruction decoder (includes non-cacheable and cacheable fill resp… 140 …efDescription": "All L2 Cache Requests (Breakdown 2 - Rare). Data cache read sized non-cacheable.", 152 …iption": "All L2 Cache Requests (Breakdown 2 - Rare). Instruction cache read sized non-cacheable.", 206 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Data … 212 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Data … 218 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Data … 224 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Data … 230 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Data … 236 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Instr… 242 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Instr… [all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/amdzen1/
D	cache.json	5 …transferred from IC pipe to DE instruction decoder (includes non-cacheable and cacheable fill resp… 140 …efDescription": "All L2 Cache Requests (Breakdown 2 - Rare). Data cache read sized non-cacheable.", 152 …iption": "All L2 Cache Requests (Breakdown 2 - Rare). Instruction cache read sized non-cacheable.", 206 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Data … 212 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Data … 218 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Data … 224 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Data … 230 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Data … 236 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Instr… 242 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Instr… [all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/amdzen2/
D	cache.json	70 …efDescription": "All L2 Cache Requests (Breakdown 2 - Rare). Data cache read sized non-cacheable.", 82 …iption": "All L2 Cache Requests (Breakdown 2 - Rare). Instruction cache read sized non-cacheable.", 136 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Data … 142 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Data … 148 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Data … 154 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Data … 160 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Data … 166 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Instr… 172 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Instr… 178 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Instr… [all …]
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/amdzen2/
D	cache.json	70 …efDescription": "All L2 Cache Requests (Breakdown 2 - Rare). Data cache read sized non-cacheable.", 82 …iption": "All L2 Cache Requests (Breakdown 2 - Rare). Instruction cache read sized non-cacheable.", 136 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Data … 142 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Data … 148 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Data … 154 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Data … 160 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Data … 166 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Instr… 172 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Instr… 178 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Instr… [all …]
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/amdzen3/
D	cache.json	70 …efDescription": "All L2 Cache Requests (Breakdown 2 - Rare). Data cache read sized non-cacheable.", 82 …iption": "All L2 Cache Requests (Breakdown 2 - Rare). Instruction cache read sized non-cacheable.", 136 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Data … 142 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Data … 148 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Data … 154 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Data … 160 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Data … 166 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Instr… 172 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Instr… 178 …"BriefDescription": "Core to L2 cacheable request access status (not including L2 Prefetch). Instr… [all …]
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/knightslanding/
D	memory.json	64 …"BriefDescription": "Counts Demand cacheable data and L1 prefetch data read requests that account… 73 …"BriefDescription": "Counts Demand cacheable data and L1 prefetch data read requests that account… 82 …"BriefDescription": "Counts Demand cacheable data and L1 prefetch data read requests that account… 91 …"BriefDescription": "Counts Demand cacheable data and L1 prefetch data read requests that account… 100 …"BriefDescription": "Counts Demand cacheable data and L1 prefetch data read requests that account… 109 …"BriefDescription": "Counts Demand cacheable data and L1 prefetch data read requests that account… 271 …"BriefDescription": "Counts Demand cacheable data write requests that accounts for responses from… 280 …"BriefDescription": "Counts Demand cacheable data write requests that accounts for data responses… 289 …"BriefDescription": "Counts Demand cacheable data write requests that accounts for data responses… 298 …"BriefDescription": "Counts Demand cacheable data write requests that accounts for responses from… [all …]
D	cache.json	31 …ts the number of MEC requests from the L2Q that reference a cache line (cacheable requests) exclud… 210 …"BriefDescription": "Counts Demand cacheable data and L1 prefetch data read requests that account… 219 …"BriefDescription": "Counts Demand cacheable data and L1 prefetch data read requests that account… 228 …"BriefDescription": "Counts Demand cacheable data and L1 prefetch data read requests that account… 237 …"BriefDescription": "Counts Demand cacheable data and L1 prefetch data read requests that account… 246 …"BriefDescription": "Counts Demand cacheable data and L1 prefetch data read requests that account… 255 …"BriefDescription": "Counts Demand cacheable data and L1 prefetch data read requests that account… 264 …"BriefDescription": "Counts Demand cacheable data and L1 prefetch data read requests that account… 273 …"BriefDescription": "Counts Demand cacheable data and L1 prefetch data read requests that account… 282 …"BriefDescription": "Counts Demand cacheable data and L1 prefetch data read requests that account… [all …]
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/icelakex/
D	cache.json	14 …ted due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable dema… 24 …ted due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable dema… 32 … waited due to L1D due to lack of L2 resources. Demand requests include cacheable/uncacheable dema… 40 …hardware or software prefetch. Note: In the L1D, a Demand Read contains cacheable or noncacheable … 182 …"BriefDescription": "Core-originated cacheable requests that missed L3 (Except hardware prefetche… 185 …"PublicDescription": "Counts core-originated cacheable requests that miss the L3 cache (Longest La… 190 …"BriefDescription": "Core-originated cacheable requests that refer to L3 (Except hardware prefetch… 193 …"PublicDescription": "Counts core-originated cacheable requests to the L3 cache (Longest Latency c… 648 …"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demand… 657 …"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demand… [all …]
D	other.json	326 …"BriefDescription": "Counts miscellaneous requests, such as I/O and un-cacheable accesses that hav… 335 …"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demand… 344 …"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demand… 353 …"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demand… 362 …"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demand… 371 …"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demand… 380 …"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demand… 389 …"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demand… 398 …"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demand… 407 …"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demand… [all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/knightslanding/
D	memory.json	150 …"BriefDescription": "Counts Demand cacheable data write requests that accounts for data responses… 161 …"BriefDescription": "Counts Demand cacheable data write requests that accounts for data responses… 172 …"BriefDescription": "Counts Demand cacheable data write requests that accounts for data responses… 183 …"BriefDescription": "Counts Demand cacheable data write requests that accounts for data responses… 194 …"BriefDescription": "Counts Demand cacheable data and L1 prefetch data read requests that account… 205 …"BriefDescription": "Counts Demand cacheable data and L1 prefetch data read requests that account… 216 …"BriefDescription": "Counts Demand cacheable data and L1 prefetch data read requests that account… 227 …"BriefDescription": "Counts Demand cacheable data and L1 prefetch data read requests that account… 700 …"BriefDescription": "Counts Demand cacheable data writes that accounts for data responses from MCD… 711 …"BriefDescription": "Counts Demand cacheable data writes that accounts for data responses from MCD… [all …]
D	cache.json	8 …ts the number of MEC requests from the L2Q that reference a cache line (cacheable requests) exlcud… 322 …"BriefDescription": "Counts Demand cacheable data write requests that are outstanding, per weight… 333 …"BriefDescription": "Counts Demand cacheable data write requests that accounts for responses from… 344 …"BriefDescription": "Counts Demand cacheable data write requests that accounts for responses from… 355 …"BriefDescription": "Counts Demand cacheable data write requests that accounts for responses from… 366 …"BriefDescription": "Counts Demand cacheable data write requests that accounts for responses from… 377 … "BriefDescription": "Counts Demand cacheable data write requests that accounts for any response", 388 …"BriefDescription": "Counts Demand cacheable data and L1 prefetch data read requests that are out… 399 …"BriefDescription": "Counts Demand cacheable data and L1 prefetch data read requests that account… 410 …"BriefDescription": "Counts Demand cacheable data and L1 prefetch data read requests that account… [all …]
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/graniterapids/
D	cache.json	`19 …"BriefDescription": "Core-originated cacheable requests that missed L3 (Except hardware prefetche… 22 …"PublicDescription": "Counts core-originated cacheable requests that miss the L3 cache (Longest La… 27 …"BriefDescription": "Core-originated cacheable requests that refer to L3 (Except hardware prefetch… 30 …"PublicDescription": "Counts core-originated cacheable requests to the L3 cache (Longest Latency c…`
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/sapphirerapids/
D	other.json	206 …"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demand… 215 …"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demand… 224 …"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demand… 233 …"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demand… 242 …"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demand… 251 …"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demand… 260 …"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demand… 269 …"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demand… 278 …"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demand… 287 …"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demand…
D	cache.json	21 …ted due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable dema… 31 …ted due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable dema… 47 … waited due to L1D due to lack of L2 resources. Demand requests include cacheable/uncacheable dema… 55 …hardware or software prefetch. Note: In the L1D, a Demand Read contains cacheable or noncacheable … 250 …"BriefDescription": "Core-originated cacheable requests that missed L3 (Except hardware prefetche… 253 …"PublicDescription": "Counts core-originated cacheable requests that miss the L3 cache (Longest La… 258 …"BriefDescription": "Core-originated cacheable requests that refer to L3 (Except hardware prefetch… 261 …"PublicDescription": "Counts core-originated cacheable requests to the L3 cache (Longest Latency c… 698 …"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demand… 707 …"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demand… [all …]
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/broadwellde/
D	cache.json	22 …ardware or software prefetch.\nNote: In the L1D, a Demand Read contains cacheable or noncacheable … 284 "BriefDescription": "Core-originated cacheable demand requests missed L3", 287 …"PublicDescription": "This event counts core-originated cacheable demand requests that miss the la… 292 "BriefDescription": "Core-originated cacheable demand requests that refer to L3", 295 …"PublicDescription": "This event counts core-originated cacheable demand requests that refer to th… 531 … counts the demand and prefetch data reads. All Core Data Reads include cacheable Demands and L2 p… 544 "BriefDescription": "Cacheable and non-cacheable code read requests", 547 … "PublicDescription": "This event counts both cacheable and non-cacheable code read requests.", 576 …"BriefDescription": "Offcore outstanding cacheable Core Data Read transactions in SuperQueue (SQ),… 580 …"PublicDescription": "This event counts the number of offcore outstanding cacheable Core Data Read… [all …]
/kernel/linux/linux-5.10/arch/sparc/include/asm/
D	viking.h	`23 * TC: Tablewalk Cacheable -- 0 = Twalks are not cacheable in E-cache 24 * 1 = Twalks are cacheable in E-cache 31 * AC: Alternate Cacheable -- 0 = Passthru physical accesses not cacheable 32 * 1 = Passthru physical accesses cacheable 34 * This indicates whether accesses are cacheable when no cachable bit`
/kernel/linux/linux-6.6/arch/sparc/include/asm/
D	viking.h	`23 * TC: Tablewalk Cacheable -- 0 = Twalks are not cacheable in E-cache 24 * 1 = Twalks are cacheable in E-cache 31 * AC: Alternate Cacheable -- 0 = Passthru physical accesses not cacheable 32 * 1 = Passthru physical accesses cacheable 34 * This indicates whether accesses are cacheable when no cachable bit`
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/meteorlake/
D	cache.json	23 …ted due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable dema… 34 …ted due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable dema… 43 … waited due to L1D due to lack of L2 resources. Demand requests include cacheable/uncacheable dema… 52 …hardware or software prefetch. Note: In the L1D, a Demand Read contains cacheable or noncacheable … 282 …"BriefDescription": "Counts the number of cacheable memory requests that miss in the LLC. Counts o… 285 …"PublicDescription": "Counts the number of cacheable memory requests that miss in the Last Level C… 291 …"BriefDescription": "Core-originated cacheable requests that missed L3 (Except hardware prefetche… 294 …"PublicDescription": "Counts core-originated cacheable requests that miss the L3 cache (Longest La… 300 …"BriefDescription": "Counts the number of cacheable memory requests that access the LLC. Counts on… 303 …"PublicDescription": "Counts the number of cacheable memory requests that access the Last Level Ca… [all …]
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/tigerlake/
D	cache.json	14 …ted due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable dema… 24 …ted due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable dema… 32 … waited due to L1D due to lack of L2 resources. Demand requests include cacheable/uncacheable dema… 40 …hardware or software prefetch. Note: In the L1D, a Demand Read contains cacheable or noncacheable … 198 …"BriefDescription": "Core-originated cacheable requests that missed L3 (Except hardware prefetche… 201 …"PublicDescription": "Counts core-originated cacheable requests that miss the L3 cache (Longest La… 436 …"Counts the demand and prefetch data reads. All Core Data Reads include cacheable 'Demands' and L2… 465 …"BriefDescription": "Offcore outstanding cacheable Core Data Read transactions in SuperQueue (SQ),… 468 …"PublicDescription": "Counts the number of offcore outstanding cacheable Core Data Read transactio… 473 …"BriefDescription": "Cycles when offcore outstanding cacheable Core Data Read transactions are pre… [all …]
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/bonnell/
D	cache.json	`3 "BriefDescription": "L1 Data Cacheable reads and writes", 24 "BriefDescription": "L1 Cacheable Data Reads", 45 "BriefDescription": "L1 Cacheable Data Writes", 108 "BriefDescription": "L2 cacheable instruction fetch requests", 115 "BriefDescription": "L2 cacheable instruction fetch requests", 122 "BriefDescription": "L2 cacheable instruction fetch requests", 129 "BriefDescription": "L2 cacheable instruction fetch requests", 136 "BriefDescription": "L2 cacheable instruction fetch requests",`
/kernel/linux/linux-6.6/arch/m68k/include/asm/
D	m53xxacr.h	`30 #define CACR_DCM_WT 0x00000000 /* Cacheable write-through / 31 #define CACR_DCM_CB 0x00000100 / Cacheable copy-back / 46 #define ACR_CM_WT 0x00000000 / Cacheable, write-through / 47 #define ACR_CM_CB 0x00000020 / Cacheable, copy-back */`
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/arm64/arm/cortex-a76/
D	cache.json	`35 …"PublicDescription": "L2 data cache refill. This event counts any cacheable transaction from L1 wh… 62 …"PublicDescription": "This event counts for any cacheable read transaction returning datafrom the … 67 …scription": "This event counts for any cacheable read transaction returning datafrom the SCU, or f…`
/kernel/linux/linux-5.10/arch/m68k/include/asm/
D	m53xxacr.h	`30 #define CACR_DCM_WT 0x00000000 /* Cacheable write-through / 31 #define CACR_DCM_CB 0x00000100 / Cacheable copy-back / 46 #define ACR_CM_WT 0x00000000 / Cacheable, write-through / 47 #define ACR_CM_CB 0x00000020 / Cacheable, copy-back */`
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/grandridge/
D	cache.json	`3 …"BriefDescription": "Counts the number of cacheable memory requests that miss in the LLC. Counts o… 6 …"PublicDescription": "Counts the number of cacheable memory requests that miss in the Last Level C… 11 …"BriefDescription": "Counts the number of cacheable memory requests that access the LLC. Counts on… 14 …"PublicDescription": "Counts the number of cacheable memory requests that access the Last Level Ca…`
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/sierraforest/
D	cache.json	`3 …"BriefDescription": "Counts the number of cacheable memory requests that miss in the LLC. Counts o… 6 …"PublicDescription": "Counts the number of cacheable memory requests that miss in the Last Level C… 11 …"BriefDescription": "Counts the number of cacheable memory requests that access the LLC. Counts on… 14 …"PublicDescription": "Counts the number of cacheable memory requests that access the Last Level Ca…`

12 3 4 5 6 7 8 9 10 >>...18