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/kernel/linux/linux-5.10/drivers/visorbus/
Dvisorchannel.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2010 - 2015 UNISYS CORPORATION
8 * This provides s-Par channel communication primitives, which are
9 * independent of the mechanism used to access the channel data.
36 * channel creator knows if more than one thread will be inserting or
48 void visorchannel_destroy(struct visorchannel *channel) in visorchannel_destroy() argument
50 if (!channel) in visorchannel_destroy()
53 if (channel->mapped) { in visorchannel_destroy()
54 memunmap(channel->mapped); in visorchannel_destroy()
55 if (channel->requested) in visorchannel_destroy()
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/sfc/
Defx_channels.c1 // SPDX-License-Identifier: GPL-2.0-only
22 * 0 => MSI-X
28 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
32 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
47 /* This is the weight assigned to each of the (per-channel) virtual
56 int efx_channel_dummy_op_int(struct efx_channel *channel) in efx_channel_dummy_op_int() argument
61 void efx_channel_dummy_op_void(struct efx_channel *channel) in efx_channel_dummy_op_void() argument
89 netif_warn(efx, probe, efx->net_dev, in efx_wanted_parallelism()
107 netif_cond_dbg(efx, probe, efx->net_dev, !rss_cpus, warn, in efx_wanted_parallelism()
117 if (efx->type->sriov_wanted) { in efx_wanted_parallelism()
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/kernel/linux/linux-6.6/drivers/net/ethernet/sfc/
Defx_channels.c1 // SPDX-License-Identifier: GPL-2.0-only
24 * 0 => MSI-X
30 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
34 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
62 netif_warn(efx, probe, efx->net_dev, in count_online_cores()
70 cpumask_of_pcibus(efx->pci_dev->bus)); in count_online_cores()
98 netif_cond_dbg(efx, probe, efx->net_dev, !rss_cpus, warn, in efx_wanted_parallelism()
108 if (efx->type->sriov_wanted) { in efx_wanted_parallelism()
109 if (efx->type->sriov_wanted(efx) && efx_vf_size(efx) > 1 && in efx_wanted_parallelism()
111 netif_warn(efx, probe, efx->net_dev, in efx_wanted_parallelism()
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/kernel/linux/linux-6.6/drivers/net/ethernet/sfc/siena/
Defx_channels.c1 // SPDX-License-Identifier: GPL-2.0-only
24 * 0 => MSI-X
30 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
34 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
62 netif_warn(efx, probe, efx->net_dev, in count_online_cores()
70 cpumask_of_pcibus(efx->pci_dev->bus)); in count_online_cores()
98 netif_cond_dbg(efx, probe, efx->net_dev, !efx_siena_rss_cpus, in efx_wanted_parallelism()
109 if (efx->type->sriov_wanted) { in efx_wanted_parallelism()
110 if (efx->type->sriov_wanted(efx) && efx_vf_size(efx) > 1 && in efx_wanted_parallelism()
112 netif_warn(efx, probe, efx->net_dev, in efx_wanted_parallelism()
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/kernel/linux/linux-6.6/drivers/rpmsg/
Dqcom_smd.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
27 * The Qualcomm Shared Memory communication solution provides point-to-point
30 * Each channel consists of a control item (channel info) and a ring buffer
31 * pair. The channel info carry information related to channel state, flow
37 * Upon creating a new channel the remote processor allocates channel info and
39 * interrupt is sent to the other end of the channel and a scan for new
40 * channels should be done. A channel never goes away, it will only change
44 * channel by setting the state of its end of the channel to "opening" and
46 * consume the channel. Upon finding a consumer we finish the handshake and the
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Dqcom_glink_native.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2016-2017, Linaro Ltd
40 * struct glink_defer_cmd - deferred incoming control message
56 * struct glink_core_rx_intent - RX intent
59 * @data: pointer to the data (may be NULL for zero-copy)
63 * @in_use: To mark if intent is already in use for the channel
79 * struct qcom_glink - driver context, relates to one remote subsystem
88 * @lcids: idr of all channels with a known local channel id
89 * @rcids: idr of all channels with a known remote channel id
128 * struct glink_channel - internal representation of a channel
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/kernel/linux/linux-5.10/drivers/rpmsg/
Dqcom_smd.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
27 * The Qualcomm Shared Memory communication solution provides point-to-point
30 * Each channel consists of a control item (channel info) and a ring buffer
31 * pair. The channel info carry information related to channel state, flow
37 * Upon creating a new channel the remote processor allocates channel info and
39 * interrupt is sent to the other end of the channel and a scan for new
40 * channels should be done. A channel never goes away, it will only change
44 * channel by setting the state of its end of the channel to "opening" and
46 * consume the channel. Upon finding a consumer we finish the handshake and the
[all …]
Dqcom_glink_native.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2016-2017, Linaro Ltd
40 * struct glink_defer_cmd - deferred incoming control message
56 * struct glink_core_rx_intent - RX intent
59 * @data: pointer to the data (may be NULL for zero-copy)
63 * @in_use: To mark if intent is already in use for the channel
79 * struct qcom_glink - driver context, relates to one remote subsystem
82 * @mbox_chan: mailbox channel
91 * @lcids: idr of all channels with a known local channel id
92 * @rcids: idr of all channels with a known remote channel id
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/kernel/linux/linux-6.6/drivers/char/xillybus/
Dxillybus_core.c1 // SPDX-License-Identifier: GPL-2.0-only
20 #include <linux/dma-mapping.h>
75 * register_mutex is endpoint-specific, and is held when non-atomic
87 * wr_mutex -> rd_mutex -> register_mutex -> wr_spinlock -> rd_spinlock
101 dev_warn(endpoint->dev, in malformed_message()
102 "Malformed message (skipping): opcode=%d, channel=%03x, dir=%d, bufno=%03x, data=%07x\n", in malformed_message()
108 * which is the natural case MSI and several other hardware-oriented
120 struct xilly_channel *channel; in xillybus_isr() local
122 buf = ep->msgbuf_addr; in xillybus_isr()
123 buf_size = ep->msg_buf_size/sizeof(u32); in xillybus_isr()
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/kernel/linux/linux-5.10/drivers/char/xillybus/
Dxillybus_core.c1 // SPDX-License-Identifier: GPL-2.0-only
20 #include <linux/dma-mapping.h>
86 * register_mutex is endpoint-specific, and is held when non-atomic
98 * wr_mutex -> rd_mutex -> register_mutex -> wr_spinlock -> rd_spinlock
112 dev_warn(endpoint->dev, in malformed_message()
113 "Malformed message (skipping): opcode=%d, channel=%03x, dir=%d, bufno=%03x, data=%07x\n", in malformed_message()
119 * which is the natural case MSI and several other hardware-oriented
131 struct xilly_channel *channel; in xillybus_isr() local
133 buf = ep->msgbuf_addr; in xillybus_isr()
134 buf_size = ep->msg_buf_size/sizeof(u32); in xillybus_isr()
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/kernel/linux/linux-5.10/drivers/staging/greybus/
Dlight.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/led-class-flash.h>
15 #include <media/v4l2-flash-led-class.h>
69 static void gb_lights_channel_free(struct gb_channel *channel);
71 static struct gb_connection *get_conn_from_channel(struct gb_channel *channel) in get_conn_from_channel() argument
73 return channel->light->glights->connection; in get_conn_from_channel()
78 return light->glights->connection; in get_conn_from_light()
81 static bool is_channel_flash(struct gb_channel *channel) in is_channel_flash() argument
83 return !!(channel->mode & (GB_CHANNEL_MODE_FLASH | GB_CHANNEL_MODE_TORCH in is_channel_flash()
95 static struct led_classdev *get_channel_cdev(struct gb_channel *channel) in get_channel_cdev() argument
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/kernel/linux/linux-6.6/drivers/staging/greybus/
Dlight.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/led-class-flash.h>
15 #include <media/v4l2-flash-led-class.h>
69 static void gb_lights_channel_free(struct gb_channel *channel);
71 static struct gb_connection *get_conn_from_channel(struct gb_channel *channel) in get_conn_from_channel() argument
73 return channel->light->glights->connection; in get_conn_from_channel()
78 return light->glights->connection; in get_conn_from_light()
81 static bool is_channel_flash(struct gb_channel *channel) in is_channel_flash() argument
83 return !!(channel->mode & (GB_CHANNEL_MODE_FLASH | GB_CHANNEL_MODE_TORCH in is_channel_flash()
95 static struct led_classdev *get_channel_cdev(struct gb_channel *channel) in get_channel_cdev() argument
[all …]
/kernel/linux/linux-5.10/drivers/ipack/devices/
Dipoctal.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * driver for the GE IP-OCTAL boards
7 * Copyright (C) 2009-2012 CERN (www.cern.ch)
50 struct ipoctal_channel channel[NR_CHANNELS]; member
59 return container_of(chan, struct ipoctal, channel[index]); in chan_to_ipoctal()
62 static void ipoctal_reset_channel(struct ipoctal_channel *channel) in ipoctal_reset_channel() argument
64 iowrite8(CR_DISABLE_RX | CR_DISABLE_TX, &channel->regs->w.cr); in ipoctal_reset_channel()
65 channel->rx_enable = 0; in ipoctal_reset_channel()
66 iowrite8(CR_CMD_RESET_RX, &channel->regs->w.cr); in ipoctal_reset_channel()
67 iowrite8(CR_CMD_RESET_TX, &channel->regs->w.cr); in ipoctal_reset_channel()
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/kernel/linux/linux-6.6/drivers/ipack/devices/
Dipoctal.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * driver for the GE IP-OCTAL boards
5 * Copyright (C) 2009-2012 CERN (www.cern.ch)
48 struct ipoctal_channel channel[NR_CHANNELS]; member
57 return container_of(chan, struct ipoctal, channel[index]); in chan_to_ipoctal()
60 static void ipoctal_reset_channel(struct ipoctal_channel *channel) in ipoctal_reset_channel() argument
62 iowrite8(CR_DISABLE_RX | CR_DISABLE_TX, &channel->regs->w.cr); in ipoctal_reset_channel()
63 channel->rx_enable = 0; in ipoctal_reset_channel()
64 iowrite8(CR_CMD_RESET_RX, &channel->regs->w.cr); in ipoctal_reset_channel()
65 iowrite8(CR_CMD_RESET_TX, &channel->regs->w.cr); in ipoctal_reset_channel()
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/kernel/linux/linux-6.6/drivers/phy/renesas/
Dr8a779f0-ether-serdes.c1 // SPDX-License-Identifier: GPL-2.0
37 struct r8a779f0_eth_serdes_channel channel[R8A779F0_ETH_SERDES_NUM]; member
53 r8a779f0_eth_serdes_reg_wait(struct r8a779f0_eth_serdes_channel *channel, in r8a779f0_eth_serdes_reg_wait() argument
59 iowrite32(bank, channel->addr + R8A779F0_ETH_SERDES_BANK_SELECT); in r8a779f0_eth_serdes_reg_wait()
61 ret = readl_poll_timeout_atomic(channel->addr + offs, val, in r8a779f0_eth_serdes_reg_wait()
65 dev_dbg(&channel->phy->dev, in r8a779f0_eth_serdes_reg_wait()
67 __func__, channel->index, offs, bank, mask, expected); in r8a779f0_eth_serdes_reg_wait()
75 struct r8a779f0_eth_serdes_channel *channel; in r8a779f0_eth_serdes_common_init_ram() local
79 channel = &dd->channel[i]; in r8a779f0_eth_serdes_common_init_ram()
80 ret = r8a779f0_eth_serdes_reg_wait(channel, 0x026c, 0x180, BIT(0), 0x01); in r8a779f0_eth_serdes_common_init_ram()
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/kernel/linux/linux-5.10/drivers/staging/media/allegro-dvt/
Dallegro-core.c1 // SPDX-License-Identifier: GPL-2.0
23 #include <media/v4l2-ctrls.h>
24 #include <media/v4l2-device.h>
25 #include <media/v4l2-event.h>
26 #include <media/v4l2-ioctl.h>
27 #include <media/v4l2-mem2mem.h>
28 #include <media/videobuf2-dma-contig.h>
29 #include <media/videobuf2-v4l2.h>
31 #include "allegro-mail.h"
32 #include "nal-h264.h"
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/kernel/linux/linux-6.6/drivers/dma/sh/
Drz-dmac.c1 // SPDX-License-Identifier: GPL-2.0
5 * Based on imx-dma.c
9 * Copyright 2012 Javier Martin, Vista Silicon <javier.martin@vista-silicon.com>
13 #include <linux/dma-mapping.h>
29 #include "../virt-dma.h"
108 * -----------------------------------------------------------------------------
171 * -----------------------------------------------------------------------------
178 writel(val, dmac->base + offset); in rz_dmac_writel()
184 writel(val, dmac->ext_base + offset); in rz_dmac_ext_writel()
189 return readl(dmac->ext_base + offset); in rz_dmac_ext_readl()
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/powerpc/fsl/
Ddma.txt4 This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
9 - compatible : must include "fsl,elo-dma"
10 - reg : DMA General Status Register, i.e. DGSR which contains
12 - ranges : describes the mapping between the address space of the
14 - cell-index : controller index. 0 for controller @ 0x8100
15 - interrupts : interrupt specifier for DMA IRQ
17 - DMA channel nodes:
18 - compatible : must include "fsl,elo-dma-channel"
20 - reg : DMA channel specific registers
21 - cell-index : DMA channel index starts at 0.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/powerpc/fsl/
Ddma.txt4 This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
9 - compatible : must include "fsl,elo-dma"
10 - reg : DMA General Status Register, i.e. DGSR which contains
12 - ranges : describes the mapping between the address space of the
14 - cell-index : controller index. 0 for controller @ 0x8100
15 - interrupts : interrupt specifier for DMA IRQ
17 - DMA channel nodes:
18 - compatible : must include "fsl,elo-dma-channel"
20 - reg : DMA channel specific registers
21 - cell-index : DMA channel index starts at 0.
[all …]
/kernel/linux/linux-6.6/drivers/media/platform/allegro-dvt/
Dallegro-core.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/mfd/syscon/xlnx-vcu.h>
26 #include <media/v4l2-ctrls.h>
27 #include <media/v4l2-device.h>
28 #include <media/v4l2-event.h>
29 #include <media/v4l2-ioctl.h>
30 #include <media/v4l2-mem2mem.h>
31 #include <media/videobuf2-dma-contig.h>
32 #include <media/videobuf2-v4l2.h>
34 #include "allegro-mail.h"
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/kernel/linux/linux-6.6/drivers/most/
Dmost_snd.c1 // SPDX-License-Identifier: GPL-2.0
3 * sound.c - Sound component for Mostcore
28 * struct channel - private structure to keep channel specific data
30 * @pcm_hardware: low-level hardware description
31 * @iface: interface for which the channel belongs to
32 * @cfg: channel configuration
35 * @id: channel index
42 * @copy_fn: copy function for PCM-specific format and width
44 struct channel { struct
93 while (i < bytes - 2) { in swap_copy24()
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/kernel/linux/linux-5.10/drivers/staging/most/sound/
Dsound.c1 // SPDX-License-Identifier: GPL-2.0
3 * sound.c - Sound component for Mostcore
28 * struct channel - private structure to keep channel specific data
30 * @iface: interface for which the channel belongs to
31 * @cfg: channel configuration
34 * @id: channel index
42 struct channel { struct
101 while (i < bytes - 2) { in swap_copy24()
160 * get_channel - get pointer to channel
162 * @channel_id: channel ID
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/kernel/linux/linux-6.6/drivers/ptp/
Dptp_clockmatrix.c1 // SPDX-License-Identifier: GPL-2.0+
27 MODULE_AUTHOR("IDT support-1588 <IDT-support-1588@lm.renesas.com>");
33 * over-rides any automatic selection
41 static int _idtcm_adjfine(struct idtcm_channel *channel, long scaled_ppm);
49 return regmap_bulk_read(idtcm->regmap, module + regaddr, buf, count); in idtcm_read()
58 return regmap_bulk_write(idtcm->regmap, module + regaddr, buf, count); in idtcm_write()
64 struct idtcm_fwrc *rec = (struct idtcm_fwrc *)fw->data; in contains_full_configuration()
65 u16 scratch = IDTCM_FW_REG(idtcm->fw_ver, V520, SCRATCH); in contains_full_configuration()
73 full_count = (scratch - GPIO_USER_CONTROL) - in contains_full_configuration()
74 ((scratch >> 7) - (GPIO_USER_CONTROL >> 7)) * 4; in contains_full_configuration()
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/kernel/linux/linux-5.10/drivers/net/ipa/
Dgsi.c1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2018-2020 Linaro Ltd.
29 * providing a well-defined communication layer between the AP subsystem
32 * -------- ---------
34 * | AP +<---. .----+ Modem |
35 * | +--. | | .->+ |
37 * -------- | | | | ---------
39 * --+-+---+-+--
41 * |-----------|
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/kernel/linux/linux-5.10/sound/xen/
Dxen_snd_front_evtchnl.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
4 * Xen para-virtual sound device
6 * Copyright (C) 2016-2018 EPAM Systems Inc.
23 struct xen_snd_front_evtchnl *channel = dev_id; in evtchnl_interrupt_req() local
24 struct xen_snd_front_info *front_info = channel->front_info; in evtchnl_interrupt_req()
28 if (unlikely(channel->state != EVTCHNL_STATE_CONNECTED)) in evtchnl_interrupt_req()
31 mutex_lock(&channel->ring_io_lock); in evtchnl_interrupt_req()
34 rp = channel->u.req.ring.sring->rsp_prod; in evtchnl_interrupt_req()
43 for (i = channel->u.req.ring.rsp_cons; i != rp; i++) { in evtchnl_interrupt_req()
44 resp = RING_GET_RESPONSE(&channel->u.req.ring, i); in evtchnl_interrupt_req()
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