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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/opp/
Dopp-v2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viresh Kumar <viresh.kumar@linaro.org>
13 - $ref: opp-v2-base.yaml#
17 const: operating-points-v2
22 - |
24 * Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states
28 #address-cells = <1>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/opp/
Dopp.txt2 ----------------------------------------------------
4 Devices work at voltage-current-frequency combinations and some implementations
8 uses CPU as a device.
13 Binding 1: operating-points
16 This binding only supports voltage-frequency pairs.
19 - operating-points: An array of 2-tuples items, and each item consists
20 of frequency and voltage like <freq-kHz vol-uV>.
26 cpu@0 {
27 compatible = "arm,cortex-a9";
29 next-level-cache = <&L2>;
[all …]
Dti-omap5-opp-supply.txt1 Texas Instruments OMAP compatible OPP supply description
9 Also, some supplies may have an associated vbb-supply which is an Adaptive Body
11 to the vdd-supply and clk when making an OPP transition. By supplying two
19 - vdd-supply: phandle to regulator controlling VDD supply
20 - vbb-supply: phandle to regulator controlling Body Bias supply
23 Required Properties for opp-supply node:
24 - compatible: Should be one of:
25 "ti,omap-opp-supply" - basic OPP supply controlling VDD and VBB
26 "ti,omap5-opp-supply" - OMAP5+ optimized voltages in efuse(class0)VDD
28 "ti,omap5-core-opp-supply" - OMAP5+ optimized voltages in efuse(class0) VDD
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/rockchip/
Drk3368-lion.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
15 stdout-path = "serial0:115200n8";
18 ext_gmac: gmac-clk {
19 compatible = "fixed-clock";
20 clock-frequency = <125000000>;
21 clock-output-names = "ext_gmac";
22 #clock-cells = <0>;
26 compatible = "i2c-mux-gpio";
27 #address-cells = <1>;
[all …]
Dpx30-engicam-px30-core.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
13 compatible = "engicam,px30-core", "rockchip,px30";
21 cpu-supply = <&vdd_arm>;
25 cpu-supply = <&vdd_arm>;
29 cpu-supply = <&vdd_arm>;
33 cpu-supply = <&vdd_arm>;
37 cap-mmc-highspeed;
38 mmc-hs200-1_8v;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/
Dmsm8998-clamshell.dtsi1 // SPDX-License-Identifier: GPL-2.0
18 vph_pwr: vph-pwr-regulator {
19 compatible = "regulator-fixed";
20 regulator-name = "vph_pwr";
21 regulator-always-on;
22 regulator-boot-on;
30 compatible = "qcom,wcn3990-bt";
32 vddio-supply = <&vreg_s4a_1p8>;
33 vddxo-supply = <&vreg_l7a_1p8>;
34 vddrf-supply = <&vreg_l17a_1p3>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dmsm8998-clamshell.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 vph_pwr: vph-pwr-regulator {
16 compatible = "regulator-fixed";
17 regulator-name = "vph_pwr";
18 regulator-always-on;
19 regulator-boot-on;
27 compatible = "qcom,wcn3990-bt";
29 vddio-supply = <&vreg_s4a_1p8>;
30 vddxo-supply = <&vreg_l7a_1p8>;
31 vddrf-supply = <&vreg_l17a_1p3>;
[all …]
Dmsm8996-oneplus-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
12 #include <dt-bindings/sound/qcom,q6afe.h>
13 #include <dt-bindings/sound/qcom,q6asm.h>
14 #include <dt-bindings/sound/qcom,wcd9335.h>
23 compatible = "simple-battery";
25 constant-charge-current-max-microamp = <3000000>;
26 voltage-min-design-microvolt = <3400000>;
30 stdout-path = "serial1:115200n8";
[all …]
Dsdm845-oneplus-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/input/linux-event-codes.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include <dt-bindings/sound/qcom,q6afe.h>
13 #include <dt-bindings/sound/qcom,q6asm.h>
16 #include "sdm845-wcd9340.dtsi"
20 /delete-node/ &rmtfs_mem;
29 stdout-path = "serial0:115200n8";
32 gpio-hall-sensor {
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/rockchip/
Drk3368-lion.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
11 stdout-path = "serial0:115200n8";
14 ext_gmac: gmac-clk {
15 compatible = "fixed-clock";
16 clock-frequency = <125000000>;
17 clock-output-names = "ext_gmac";
18 #clock-cells = <0>;
22 compatible = "i2c-mux-gpio";
23 #address-cells = <1>;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/cpufreq/
Dcpufreq-mediatek.txt5 - clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock names.
6 - clock-names: Should contain the following:
7 "cpu" - The multiplexer for clock input of CPU cluster.
8 "intermediate" - A parent of "cpu" clock which is used as "intermediate" clock
9 source (usually MAINPLL) when the original CPU PLL is under
11 Please refer to Documentation/devicetree/bindings/clock/clock-bindings.txt for
13 - operating-points-v2: Please refer to Documentation/devicetree/bindings/opp/opp-v2.yaml
15 - proc-supply: Regulator for Vproc of CPU cluster.
18 - sram-supply: Regulator for Vsram of CPU cluster. When present, the cpufreq driver
23 - mediatek,cci:
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/cpufreq/
Dcpufreq-mediatek.txt5 - clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock names.
6 - clock-names: Should contain the following:
7 "cpu" - The multiplexer for clock input of CPU cluster.
8 "intermediate" - A parent of "cpu" clock which is used as "intermediate" clock
9 source (usually MAINPLL) when the original CPU PLL is under
11 Please refer to Documentation/devicetree/bindings/clock/clock-bindings.txt for
13 - operating-points-v2: Please refer to Documentation/devicetree/bindings/opp/opp.txt
15 - proc-supply: Regulator for Vproc of CPU cluster.
18 - sram-supply: Regulator for Vsram of CPU cluster. When present, the cpufreq driver
23 - #cooling-cells:
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/amlogic/
Dmeson-g12b-khadas-vim3.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 vddcpu_a: regulator-vddcpu-a {
15 compatible = "pwm-regulator";
17 regulator-name = "VDDCPU_A";
18 regulator-min-microvolt = <690000>;
19 regulator-max-microvolt = <1050000>;
21 pwm-supply = <&dc_in>;
24 pwm-dutycycle-range = <100 0>;
26 regulator-boot-on;
27 regulator-always-on;
[all …]
Dmeson-g12b-odroid.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/gpio/meson-g12a-gpio.h>
9 #include <dt-bindings/sound/meson-g12a-toacodec.h>
10 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
20 stdout-path = "serial0:115200n8";
28 emmc_pwrseq: emmc-pwrseq {
29 compatible = "mmc-pwrseq-emmc";
30 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
33 fan: gpio-fan {
[all …]
Dmeson-g12b-w400.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "meson-g12b.dtsi"
11 #include "meson-g12b-s922x.dtsi"
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/gpio/meson-g12a-gpio.h>
22 stdout-path = "serial0:115200n8";
30 emmc_pwrseq: emmc-pwrseq {
31 compatible = "mmc-pwrseq-emmc";
32 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/
Dmeson-g12b-khadas-vim3.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 vddcpu_a: regulator-vddcpu-a {
15 compatible = "pwm-regulator";
17 regulator-name = "VDDCPU_A";
18 regulator-min-microvolt = <690000>;
19 regulator-max-microvolt = <1050000>;
21 pwm-supply = <&dc_in>;
24 pwm-dutycycle-range = <100 0>;
26 regulator-boot-on;
27 regulator-always-on;
[all …]
Dmeson-g12b-w400.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "meson-g12b.dtsi"
11 #include "meson-g12b-s922x.dtsi"
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/gpio/meson-g12a-gpio.h>
22 stdout-path = "serial0:115200n8";
30 emmc_pwrseq: emmc-pwrseq {
31 compatible = "mmc-pwrseq-emmc";
32 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/nvidia/
Dtegra30-cardhu.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/thermal/thermal.h>
5 #include "tegra30-cpu-opp.dtsi"
6 #include "tegra30-cpu-opp-microvolt.dtsi"
16 * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
17 * tegra30-cardhu-a04.dts.
20 * The sticker will have number like 600-81291-1000-002 C.3. In this 4th
22 * The (downstream internal) U-Boot of Cardhu display the board-id as
43 stdout-path = "serial0:115200n8";
[all …]
Dtegra124-nyan.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/thermal/thermal.h>
14 stdout-path = "serial0:115200n8";
20 * missing a unit-address. However, the bootloader on these Chromebook
22 * Adding the unit-address causes the bootloader to create a /memory
34 /delete-node/ memory@80000000;
40 vdd-supply = <&vdd_3v3_hdmi>;
41 pll-supply = <&vdd_hdmi_pll>;
42 hdmi-supply = <&vdd_5v0_hdmi>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/allwinner/
Dsunxi-libretech-all-h3-it.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 // Copyright (C) 2019 Chen-Yu Tsai <wens@csie.org>
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
14 stdout-path = "serial0:115200n8";
18 compatible = "hdmi-connector";
23 remote-endpoint = <&hdmi_out_con>;
29 compatible = "gpio-leds";
38 compatible = "regulator-fixed";
39 regulator-name = "vcc3v3";
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dsunxi-libretech-all-h3-it.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 // Copyright (C) 2019 Chen-Yu Tsai <wens@csie.org>
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
14 stdout-path = "serial0:115200n8";
18 compatible = "hdmi-connector";
23 remote-endpoint = <&hdmi_out_con>;
29 compatible = "gpio-leds";
38 compatible = "regulator-fixed";
39 regulator-name = "vcc3v3";
[all …]
Dtegra30-cardhu-a04.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra30-cardhu.dtsi"
5 #include "tegra30-cpu-opp.dtsi"
6 #include "tegra30-cpu-opp-microvolt.dtsi"
12 compatible = "nvidia,cardhu-a04", "nvidia,cardhu", "nvidia,tegra30";
16 power-gpios = <&gpio TEGRA_GPIO(D, 3) GPIO_ACTIVE_HIGH>;
17 bus-width = <4>;
18 keep-power-in-suspend;
22 compatible = "regulator-fixed";
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/nvidia/
Dtegra210-p3450-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/input/linux-event-codes.h>
6 #include <dt-bindings/mfd/max77620.h>
12 compatible = "nvidia,p3450-0000", "nvidia,tegra210";
22 stdout-path = "serial0:115200n8";
33 avdd-pll-uerefe-supply = <&vdd_pex_1v05>;
34 hvddio-pex-supply = <&vdd_1v8>;
35 dvddio-pex-supply = <&vdd_pex_1v05>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/allwinner/
Dsun50i-h6-tanix.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 /dts-v1/;
6 #include "sun50i-h6.dtsi"
7 #include "sun50i-h6-cpu-opp.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
17 stdout-path = "serial0:115200n8";
21 compatible = "hdmi-connector";
22 ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
27 remote-endpoint = <&hdmi_out_con>;
34 compatible = "i2c-gpio";
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/allwinner/
Dsun50i-a64-olinuxino.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 /dts-v1/;
6 #include "sun50i-a64.dtsi"
7 #include "sun50i-a64-cpu-opp.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
12 model = "Olimex A64-Olinuxino";
13 compatible = "olimex,a64-olinuxino", "allwinner,sun50i-a64";
21 stdout-path = "serial0:115200n8";
24 hdmi-connector {
25 compatible = "hdmi-connector";
[all …]

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