| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/hisilicon/controller/ |
| D | cpuctrl.yaml | 4 $id: http://devicetree.org/schemas/arm/hisilicon/controller/cpuctrl.yaml#
19 - const: hisilicon,cpuctrl
41 cpuctrl@a22000 {
42 compatible = "hisilicon,cpuctrl";
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/hisilicon/controller/ |
| D | cpuctrl.yaml | 4 $id: http://devicetree.org/schemas/arm/hisilicon/controller/cpuctrl.yaml#
19 - const: hisilicon,cpuctrl
61 cpuctrl@a22000 {
62 compatible = "hisilicon,cpuctrl";
|
| /kernel/linux/linux-6.6/arch/m68k/apollo/ |
| D | config.c | 161 cpuctrl=0xaa00; in config_apollo()
260 cpuctrl=dn_cpuctrl; in dn_heartbeat()
265 cpuctrl=dn_cpuctrl; in dn_heartbeat()
|
| /kernel/linux/linux-5.10/arch/m68k/apollo/ |
| D | config.c | 161 cpuctrl=0xaa00; in config_apollo()
261 cpuctrl=dn_cpuctrl; in dn_heartbeat()
266 cpuctrl=dn_cpuctrl; in dn_heartbeat()
|
| /kernel/linux/linux-5.10/arch/m68k/include/asm/ |
| D | apollohw.h | 80 #define cpuctrl (*(volatile unsigned int *)(IO_BASE + cpuctrl_physaddr)) macro
|
| /kernel/linux/linux-6.6/arch/m68k/include/asm/ |
| D | apollohw.h | 80 #define cpuctrl (*(volatile unsigned int *)(IO_BASE + cpuctrl_physaddr)) macro
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/alteon/ |
| D | acenic.c | 616 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl); in acenic_remove_one()
624 readl(®s->CpuCtrl); /* flush */ in acenic_remove_one()
906 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl); in ace_init()
907 readl(®s->CpuCtrl); /* PCI write posting */ in ace_init()
1443 writel(readl(®s->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), ®s->CpuCtrl); in ace_init()
1444 readl(®s->CpuCtrl); in ace_init()
1457 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl); in ace_init()
1458 readl(®s->CpuCtrl); in ace_init()
2874 if (!(readl(®s->CpuCtrl) & CPU_HALTED)) { in ace_load_firmware()
|
| D | acenic.h | 62 u32 CpuCtrl; /* 0x140 */ member
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/alteon/ |
| D | acenic.c | 615 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl); in acenic_remove_one()
623 readl(®s->CpuCtrl); /* flush */ in acenic_remove_one()
906 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl); in ace_init()
907 readl(®s->CpuCtrl); /* PCI write posting */ in ace_init()
1440 writel(readl(®s->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), ®s->CpuCtrl); in ace_init()
1441 readl(®s->CpuCtrl); in ace_init()
1454 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl); in ace_init()
1455 readl(®s->CpuCtrl); in ace_init()
2870 if (!(readl(®s->CpuCtrl) & CPU_HALTED)) { in ace_load_firmware()
|
| D | acenic.h | 62 u32 CpuCtrl; /* 0x140 */ member
|
| /kernel/linux/linux-6.6/drivers/usb/gadget/udc/cdns2/ |
| D | cdns2-gadget.h | 229 * @cpuctrl: microprocessor control register.
245 __u8 cpuctrl; member
294 /* CPUCTRL- bitmasks. */
|
| D | cdns2-gadget.c | 2264 set_reg_bit_8(&pdev->usb_regs->cpuctrl, CPUCTRL_SW_RST); in cdns2_gadget_start()
2266 ret = readl_poll_timeout_atomic(&pdev->usb_regs->cpuctrl, val, in cdns2_gadget_start()
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/hisilicon/ |
| D | hisi-x5hd2.dtsi | 405 cpuctrl@a22000 {
406 compatible = "hisilicon,cpuctrl";
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | hisi-x5hd2.dtsi | 405 cpuctrl@a22000 {
406 compatible = "hisilicon,cpuctrl";
|
| /kernel/linux/linux-5.10/arch/arm/mach-hisi/ |
| D | hotplug.c | 179 np = of_find_compatible_node(NULL, NULL, "hisilicon,cpuctrl"); in hix5hd2_hotplug_init()
|
| /kernel/linux/linux-6.6/arch/arm/mach-hisi/ |
| D | hotplug.c | 178 np = of_find_compatible_node(NULL, NULL, "hisilicon,cpuctrl"); in hix5hd2_hotplug_init()
|
| /kernel/linux/linux-6.6/arch/arc/boot/dts/ |
| D | abilis_tb10x.dtsi | 211 "cpuctrl",
|
| /kernel/linux/linux-5.10/arch/arc/boot/dts/ |
| D | abilis_tb10x.dtsi | 211 "cpuctrl",
|