| /kernel/linux/linux-6.6/include/linux/dma/ |
| D | imx-dma.h | 42 IMX_DMATYPE_MULTI_SAI, /* MULTI FIFOs For Audio */ 72 * @n_fifos_src: Number of FIFOs for recording 73 * @n_fifos_dst: Number of FIFOs for playback 74 * @stride_fifos_src: FIFO address stride for recording, 0 means all FIFOs are 75 * continuous, 1 means 1 word stride between FIFOs. All stride 76 * between FIFOs should be same.
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mailbox/ |
| D | ti,omap-mailbox.yaml | 149 ti,mbox-num-fifos: 175 - ti,mbox-num-fifos 188 ti,mbox-num-fifos: 203 ti,mbox-num-fifos: 218 ti,mbox-num-fifos: 233 ti,mbox-num-fifos: 251 ti,mbox-num-fifos = <8>; 275 ti,mbox-num-fifos = <8>; 291 ti,mbox-num-fifos = <16>;
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| D | apple,mailbox.yaml | 14 The Apple mailbox consists of two FIFOs used to exchange 64+32 bit 17 One of the two FIFOs is used to send data to a co-processor while the other
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| /kernel/linux/linux-5.10/drivers/isdn/hardware/mISDN/ |
| D | hfcsusb.c | 433 if (hw->fifos[HFCUSB_PCM_RX].pipe) { in open_dchannel() 552 if (hw->fifos[HFCUSB_PCM_RX].pipe) in hfc_dctrl() 961 /* receive completion routine for all ISO tx fifos */ 1082 /* receive completion routine for all interrupt rx fifos */ 1155 /* transmit completion routine for all ISO tx fifos */ 1571 /* init the fifos */ in reset_hfcsusb() 1575 fifo = hw->fifos; in reset_hfcsusb() 1585 /* enable all fifos */ in reset_hfcsusb() 1603 if ((channel == HFC_CHAN_D) && (hw->fifos[HFCUSB_D_RX].active)) in hfcsusb_start_endpoint() 1605 if ((channel == HFC_CHAN_B1) && (hw->fifos[HFCUSB_B1_RX].active)) in hfcsusb_start_endpoint() [all …]
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| D | hfcpci.c | 100 void *fifos; /* FIFO memory */ member 161 dma_free_coherent(&hc->pdev->dev, 0x8000, hc->hw.fifos, in release_io_hfcpci() 190 * and fifos is done. 226 hc->hw.fifo_en = 0x30; /* only D fifos enabled */ in reset_hfcpci() 329 bzr = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b2; in hfcpci_clear_fifo_rx() 332 bzr = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b1; in hfcpci_clear_fifo_rx() 358 bzt = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b2; in hfcpci_clear_fifo_tx() 361 bzt = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b1; in hfcpci_clear_fifo_tx() 462 df = &((union fifo_area *)(hc->hw.fifos))->d_chan.d_rx; in receive_dmsg() 608 rxbz = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b2; in main_rec_hfcpci() [all …]
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| /kernel/linux/linux-6.6/drivers/isdn/hardware/mISDN/ |
| D | hfcsusb.c | 433 if (hw->fifos[HFCUSB_PCM_RX].pipe) { in open_dchannel() 552 if (hw->fifos[HFCUSB_PCM_RX].pipe) in hfc_dctrl() 961 /* receive completion routine for all ISO tx fifos */ 1082 /* receive completion routine for all interrupt rx fifos */ 1155 /* transmit completion routine for all ISO tx fifos */ 1571 /* init the fifos */ in reset_hfcsusb() 1575 fifo = hw->fifos; in reset_hfcsusb() 1585 /* enable all fifos */ in reset_hfcsusb() 1603 if ((channel == HFC_CHAN_D) && (hw->fifos[HFCUSB_D_RX].active)) in hfcsusb_start_endpoint() 1605 if ((channel == HFC_CHAN_B1) && (hw->fifos[HFCUSB_B1_RX].active)) in hfcsusb_start_endpoint() [all …]
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| D | hfcpci.c | 100 void *fifos; /* FIFO memory */ member 161 dma_free_coherent(&hc->pdev->dev, 0x8000, hc->hw.fifos, in release_io_hfcpci() 190 * and fifos is done. 226 hc->hw.fifo_en = 0x30; /* only D fifos enabled */ in reset_hfcpci() 329 bzr = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b2; in hfcpci_clear_fifo_rx() 332 bzr = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b1; in hfcpci_clear_fifo_rx() 358 bzt = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b2; in hfcpci_clear_fifo_tx() 361 bzt = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b1; in hfcpci_clear_fifo_tx() 462 df = &((union fifo_area *)(hc->hw.fifos))->d_chan.d_rx; in receive_dmsg() 608 rxbz = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b2; in main_rec_hfcpci() [all …]
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| /kernel/linux/linux-6.6/include/uapi/linux/ |
| D | serial_core.h | 43 #define PORT_ALTR_16550_F32 26 /* Altera 16550 UART with 32 FIFOs */ 44 #define PORT_ALTR_16550_F64 27 /* Altera 16550 UART with 64 FIFOs */ 45 #define PORT_ALTR_16550_F128 28 /* Altera 16550 UART with 128 FIFOs */ 47 #define PORT_16550A_FSL64 30 /* Freescale 16550 UART with 64 FIFOs */ 182 /* MCHP 16550A UART with 256 byte FIFOs */
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| /kernel/linux/linux-6.6/drivers/net/can/spi/mcp251xfd/ |
| D | mcp251xfd-chip-fifo.c | 25 /* Enable RXOVIE on _all_ RX FIFOs, not just the last one. in mcp251xfd_chip_rx_fifo_init_one() 27 * FIFOs hit by a RX MAB overflow and RXOVIE enabled will in mcp251xfd_chip_rx_fifo_init_one() 107 /* RX FIFOs */ in mcp251xfd_chip_fifo_init()
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| /kernel/linux/linux-5.10/drivers/net/wireless/intel/iwlwifi/fw/api/ |
| D | dbg-tlv.h | 108 * struct iwl_fw_ini_region_fifos - Configuration to read Tx/Rx fifos 110 * @fid: fifos ids array. Used to determine what fifos to collect 185 * @fifos: fifos configuration. Used by &IWL_FW_INI_REGION_TXF and 204 struct iwl_fw_ini_region_fifos fifos; member 339 * @IWL_FW_INI_REGION_TXF: TX fifos
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| /kernel/linux/linux-6.6/drivers/net/wireless/intel/iwlwifi/fw/api/ |
| D | dbg-tlv.h | 57 * struct iwl_fw_ini_region_fifos - Configuration to read Tx/Rx fifos 59 * @fid: fifos ids array. Used to determine what fifos to collect 138 * @fifos: fifos configuration. Used by &IWL_FW_INI_REGION_TXF and 160 struct iwl_fw_ini_region_fifos fifos; member 350 * @IWL_FW_INI_REGION_TXF: TX fifos
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/ti/ |
| D | k3-ringacc.yaml | 40 - description: fifos registers regions 49 - const: fifos 89 reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/ti/ |
| D | k3-ringacc.yaml | 36 - description: fifos registers regions 43 - const: fifos 89 reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/ti/ |
| D | k3-j784s4-main.dtsi | 731 ti,mbox-num-fifos = <16>; 741 ti,mbox-num-fifos = <16>; 751 ti,mbox-num-fifos = <16>; 761 ti,mbox-num-fifos = <16>; 771 ti,mbox-num-fifos = <16>; 781 ti,mbox-num-fifos = <16>; 791 ti,mbox-num-fifos = <16>; 801 ti,mbox-num-fifos = <16>; 811 ti,mbox-num-fifos = <16>; 821 ti,mbox-num-fifos = <16>; [all …]
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| D | k3-j721s2-main.dtsi | 834 ti,mbox-num-fifos = <16>; 844 ti,mbox-num-fifos = <16>; 854 ti,mbox-num-fifos = <16>; 864 ti,mbox-num-fifos = <16>; 874 ti,mbox-num-fifos = <16>; 884 ti,mbox-num-fifos = <16>; 894 ti,mbox-num-fifos = <16>; 904 ti,mbox-num-fifos = <16>; 914 ti,mbox-num-fifos = <16>; 924 ti,mbox-num-fifos = <16>; [all …]
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| D | k3-j7200-main.dtsi | 150 ti,mbox-num-fifos = <16>; 160 ti,mbox-num-fifos = <16>; 170 ti,mbox-num-fifos = <16>; 180 ti,mbox-num-fifos = <16>; 190 ti,mbox-num-fifos = <16>; 200 ti,mbox-num-fifos = <16>; 210 ti,mbox-num-fifos = <16>; 220 ti,mbox-num-fifos = <16>; 230 ti,mbox-num-fifos = <16>; 240 ti,mbox-num-fifos = <16>; [all …]
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| /kernel/linux/linux-5.10/include/uapi/linux/ |
| D | serial_core.h | 41 #define PORT_ALTR_16550_F32 26 /* Altera 16550 UART with 32 FIFOs */ 42 #define PORT_ALTR_16550_F64 27 /* Altera 16550 UART with 64 FIFOs */ 43 #define PORT_ALTR_16550_F128 28 /* Altera 16550 UART with 128 FIFOs */ 45 #define PORT_16550A_FSL64 30 /* Freescale 16550 UART with 64 FIFOs */
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mailbox/ |
| D | omap-mailbox.txt | 55 - ti,mbox-num-fifos: Number of h/w fifo queues within the mailbox IP block 130 ti,mbox-num-fifos = <8>; 155 ti,mbox-num-fifos = <8>; 170 ti,mbox-num-fifos = <16>;
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/ti/ |
| D | k3-am65-main.dtsi | 505 ti,mbox-num-fifos = <16>; 514 ti,mbox-num-fifos = <16>; 523 ti,mbox-num-fifos = <16>; 532 ti,mbox-num-fifos = <16>; 541 ti,mbox-num-fifos = <16>; 550 ti,mbox-num-fifos = <16>; 559 ti,mbox-num-fifos = <16>; 568 ti,mbox-num-fifos = <16>; 577 ti,mbox-num-fifos = <16>; 586 ti,mbox-num-fifos = <16>; [all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/tehuti/ |
| D | tehuti.h | 156 struct fifo m; /* minimal set of variables used by all fifos */ 160 struct fifo m; /* minimal set of variables used by all fifos */ 164 struct fifo m; /* minimal set of variables used by all fifos */ 168 struct fifo m; /* minimal set of variables used by all fifos */ 247 /* RX FIFOs: 1 for data (full) descs, and 2 for free descs */ 253 /* Tx FIFOs: 1 for data desc, 1 for empty (acks) desc */
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| /kernel/linux/linux-6.6/drivers/net/ethernet/tehuti/ |
| D | tehuti.h | 156 struct fifo m; /* minimal set of variables used by all fifos */ 160 struct fifo m; /* minimal set of variables used by all fifos */ 164 struct fifo m; /* minimal set of variables used by all fifos */ 168 struct fifo m; /* minimal set of variables used by all fifos */ 247 /* RX FIFOs: 1 for data (full) descs, and 2 for free descs */ 253 /* Tx FIFOs: 1 for data desc, 1 for empty (acks) desc */
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| /kernel/linux/linux-5.10/sound/soc/samsung/ |
| D | s3c24xx-i2s.c | 67 /* note, we have to disable the FIFOs otherwise bad things in s3c24xx_snd_txctrl() 70 * engine and FIFOs to reset. If this isn't allowed, the in s3c24xx_snd_txctrl() 110 /* note, we have to disable the FIFOs otherwise bad things in s3c24xx_snd_rxctrl() 113 * engine and FIFOs to reset. If this isn't allowed, the in s3c24xx_snd_rxctrl()
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| /kernel/linux/linux-6.6/arch/arm/mach-lpc32xx/ |
| D | serial.c | 113 * Force a flush of the RX FIFOs to work around a in lpc32xx_serial_init() 129 /* Force a flush of the RX FIFOs to work around a HW bug */ in lpc32xx_serial_init()
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| /kernel/linux/linux-5.10/arch/arm/mach-lpc32xx/ |
| D | serial.c | 112 * Force a flush of the RX FIFOs to work around a in lpc32xx_serial_init() 128 /* Force a flush of the RX FIFOs to work around a HW bug */ in lpc32xx_serial_init()
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| /kernel/linux/linux-6.6/Documentation/accel/qaic/ |
| D | aic100.rst | 93 channels, each consisting of a set of request/response FIFOs. Each active 95 hardware registers to manage the FIFOs (head/tail pointers), but requires host 96 memory to store the FIFOs. 240 Each DBC is a pair of FIFOs that manage data in and out of the workload. One 261 The actual FIFOs are backed by host memory. When sending a request to the QSM 262 to activate a network, the host must donate memory to be used for the FIFOs. 264 memory must be provided per DBC, which hosts both FIFOs. The request FIFO will
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