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/third_party/mesa3d/src/intel/ci/
Dtraces-iris.yml7 # - device: gl-intel-apl
9 # - device: gl-intel-glk
11 # - device: gl-intel-amly
13 # - device: gl-intel-kbl
15 # - device: gl-intel-whl
17 # - device: gl-intel-cml
21 - device: gl-intel-apl
23 - device: gl-intel-glk
25 - device: gl-intel-amly
27 - device: gl-intel-kbl
[all …]
Dgitlab-ci.yml1 .intel-common-test:
8 FLAKES_CHANNEL: "#intel-ci"
13 - .intel-common-test
20 - .intel-common-test
25 .intel-test:
27 - .intel-common-test
28 - .intel-rules
47 VK_DRIVER: intel
196 GPU_VERSION: intel-apl
203 GPU_VERSION: intel-glk
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/third_party/mesa3d/include/pci_ids/
Diris_pci_ids.h1 CHIPSET(0x1602, bdw_gt1, "BDW GT1", "Intel(R) HD Graphics")
2 CHIPSET(0x1606, bdw_gt1, "BDW GT1", "Intel(R) HD Graphics")
3 CHIPSET(0x160A, bdw_gt1, "BDW GT1", "Intel(R) HD Graphics")
4 CHIPSET(0x160B, bdw_gt1, "BDW GT1", "Intel(R) HD Graphics")
5 CHIPSET(0x160D, bdw_gt1, "BDW GT1", "Intel(R) HD Graphics")
6 CHIPSET(0x160E, bdw_gt1, "BDW GT1", "Intel(R) HD Graphics")
7 CHIPSET(0x1612, bdw_gt2, "BDW GT2", "Intel(R) HD Graphics 5600")
8 CHIPSET(0x1616, bdw_gt2, "BDW GT2", "Intel(R) HD Graphics 5500")
9 CHIPSET(0x161A, bdw_gt2, "BDW GT2", "Intel(R) HD Graphics P5700")
10 CHIPSET(0x161B, bdw_gt2, "BDW GT2", "Intel(R) HD Graphics")
[all …]
Dcrocus_pci_ids.h1 CHIPSET(0x29A2, i965, "BW", "Intel(R) 965G")
2 CHIPSET(0x2992, i965, "BW", "Intel(R) 965Q")
3 CHIPSET(0x2982, i965, "BW", "Intel(R) 965G")
4 CHIPSET(0x2972, i965, "BW", "Intel(R) 946GZ")
5 CHIPSET(0x2A02, i965, "CL", "Intel(R) 965GM")
6 CHIPSET(0x2A12, i965, "CL", "Intel(R) 965GME/GLE")
8 CHIPSET(0x2A42, g4x, "CTG", "Mobile Intel® GM45 Express Chipset")
9 CHIPSET(0x2E02, g4x, "ELK", "Intel(R) Integrated Graphics Device")
10 CHIPSET(0x2E12, g4x, "ELK", "Intel(R) Q45/Q43")
11 CHIPSET(0x2E22, g4x, "ELK", "Intel(R) G45/G43")
[all …]
Di915_pci_ids.h1 CHIPSET(0x2582, I915_G, "Intel(R) 915G")
2 CHIPSET(0x258A, E7221_G, "Intel(R) E7221G (i915)")
3 CHIPSET(0x2592, I915_GM, "Intel(R) 915GM")
4 CHIPSET(0x2772, I945_G, "Intel(R) 945G")
5 CHIPSET(0x27A2, I945_GM, "Intel(R) 945GM")
6 CHIPSET(0x27AE, I945_GME, "Intel(R) 945GME")
7 CHIPSET(0x29B2, Q35_G, "Intel(R) Q35")
8 CHIPSET(0x29C2, G33_G, "Intel(R) G33")
9 CHIPSET(0x29D2, Q33_G, "Intel(R) Q33")
10 CHIPSET(0xA011, PNV_GM, "Intel(R) Pineview M")
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/third_party/alsa-utils/topology/nhlt/
DMakefile.am9 intel/intel-nhlt.c \
10 intel/dmic-nhlt.c \
11 intel/dmic/dmic-debug.c intel/dmic/dmic-process.c \
12 intel/ssp-nhlt.c \
13 intel/ssp/ssp-debug.c intel/ssp/ssp-process.c
16 intel/intel-nhlt.h \
17 intel/dmic-nhlt.h \
18 intel/dmic/dmic-intel.h \
19 intel/dmic/dmic-process.h \
20 intel/dmic/dmic-debug.h \
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/third_party/alsa-lib/src/conf/cards/
DHDA-Intel.conf2 # Configuration for the Intel HD audio (ICH6/ICH7)
7 HDA-Intel.pcm.front.0 {
32 HDA-Intel.pcm.default {
81 HDA-Intel.pcm.surround40.0 cards.HDA-Intel.pcm.front.0
82 HDA-Intel.pcm.surround51.0 cards.HDA-Intel.pcm.front.0
83 HDA-Intel.pcm.surround71.0 cards.HDA-Intel.pcm.front.0
87 HDA-Intel.pcm.iec958.0 {
168 HDA-Intel.pcm.hdmi.common {
217 HDA-Intel.pcm.hdmi.0 {
228 "cards.HDA-Intel.pcm.hdmi.common:"
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/third_party/mesa3d/src/gallium/targets/d3dadapter9/
Ddescription.c189 {"Haswell Mobile", "Intel(R) Haswell Mobile"},
190 {"Ivybridge Server", "Intel(R) Ivybridge Server"},
191 {"Ivybridge Mobile", "Intel(R) Ivybridge Mobile"},
192 {"Ivybridge Desktop", "Intel(R) Ivybridge Desktop"},
193 {"Sandybridge Server", "Intel(R) Sandybridge Server"},
194 {"Sandybridge Mobile", "Intel(R) Sandybridge Mobile"},
195 {"Sandybridge Desktop", "Intel(R) Sandybridge Desktop"},
196 {"Ironlake Mobile", "Intel(R) Ironlake Mobile"},
197 {"Ironlake Desktop", "Intel(R) Ironlake Desktop"},
198 {"B43", "Intel(R) B43"},
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/third_party/skia/third_party/externals/angle2/src/tests/
Dangle_end2end_tests_expectations.txt16 6153 VULKAN WIN INTEL : GLSLTest_ES31.StructAndArrayEqualOperator/* = SKIP
49 6101 WIN OPENGL INTEL : BlitFramebufferTest.OOBWrite/* = SKIP
52 6173 WIN INTEL OPENGL : GLSLTest_ES31.BoolInInterfaceBlocks/* = SKIP
53 6217 WIN INTEL OPENGL : GLSLTest_ES31.StorageBufferBoolVectorPassedToFunctions/* = SKIP
56 6065 LINUX INTEL VULKAN : SimpleStateChangeTestES31.DrawThenUpdateUBOThenDrawThenDrawIndexed/* = SK…
58 6109 LINUX INTEL : GLSLTestLoops.*While*/* = SKIP
60 6173 LINUX INTEL OPENGL : GLSLTest_ES31.TypesUsedInDifferentBlockStorages/* = SKIP
66 6367 LINUX INTEL OPENGL : ComputeShaderTest.DispatchGenerateMipmapDispatch/* = SKIP
84 // Intel Vulkan
86 // On Intel/Vulkan/Linux, The following image is produced, failing the test on the corner of the
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/third_party/ltp/testcases/open_posix_testsuite/
DChangeLog21 07-05-2004 adam.li@intel.com
25 07-01-2004 adam.li@intel.com
30 06-29-2004 adam.li@intel.com
34 06-28-2004 adam.li@intel.com
37 06-22-2004 adam.li@intel.com
41 06-15-2004 adam.li@intel.com
46 06-11-2004 adam.li@intel.com
48 06-07-2004 adam.li@intel.com
54 06-04-2004 adam.li@intel.com
58 06-02-2004 adam.li@intel.com
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DAUTHORS1 geoffrey.r.gustafson REMOVE-THIS AT intel DOT com
2 inaky.perez-gonzalez REMOVE-THIS AT intel DOT com
3 julie.n.fleischer REMOVE-THIS AT intel DOT com
4 majid.awad REMOVE-THIS AT intel DOT com
5 rolla.n.selbak REMOVE-THIS AT intel DOT com
6 rusty.lynch REMOVE-THIS AT intel DOT com
7 salwan.searty REMOVE-THIS AT intel DOT com
/third_party/mesa3d/
D.mailmap6 Adrian Marius Negreanu <adrian.m.negreanu@intel.com> Adrian Negreanu <adrian.m.negreanu@intel.com>
7 Adrian Marius Negreanu <adrian.m.negreanu@intel.com> Negreanu Marius Adrian <adrian.m.negreanu@inte…
64 Anuj Phogat <anuj.phogat@gmail.com> <anuj.phogat@intel.com>
82 Ben Widawsky <benjamin.widawsky@intel.com> Ben Widawsky <ben@bwidawsk.net>
106 Bruce Cherniak <bruce.cherniak@intel.com>
110 Caio Oliveira <caio.oliveira@intel.com>
120 Chad Versace <chadversary@chromium.org> <chad.versace@intel.com>
121 Chad Versace <chadversary@chromium.org> <chad.versace@linux.intel.com>
127 Chenglei Ren <chenglei.ren@intel.com>
161 Connor Abbott <cwabbott0@gmail.com> <connor.w.abbott@intel.com>
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/third_party/mesa3d/docs/relnotes/
D19.3.0.rst36 - VK_KHR_shader_clock on Intel, RADV.
37 - VK_KHR_shader_float_controls on Intel, RADV.
38 - VK_KHR_spirv_1_4 on Intel, RADV.
40 - VK_KHR_vulkan_memory_model on Intel.
41 - VK_EXT_shader_subgroup_ballot on Intel.
42 - VK_EXT_shader_subgroup_vote on Intel.
44 - VK_INTEL_performance_query on Intel.
47 - Initial Intel gen12 (Tigerlake) support on anvil and iris
178 - intel/common: include unistd.h for ioctl() prototype on Solaris
463 - intel/gen12: Add L3 configurations
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D22.0.0.rst62 - intel: env vars doc out of date
64 - Flickering Intel Uhd 620 Graphics
73 - [vulkan][intel] Implement VK_VALVE_mutable_descriptor_type
79 - FrontFacing input is broken on Intel/Vulkan
113 - intel/vec4: Rework texture handling to not use \`ir_texture_opcode`
559 - intel/fs: Consider nir_var_mem_image for TGM fences
562 - intel/compiler: Rename vec4 test fixtures
563 - intel/compiler: Build all tests in a single binary
575 - intel/compiler: Add helpers to select SIMD for compute shaders
576 - intel/compiler: Use SIMD selection helpers for CS
[all …]
D17.2.6.rst66 - cherry-ignore: intel/fs: Use a pure vertical stride for large
68 - cherry-ignore: intel/nir: Use the correct indirect lowering masks in
70 - cherry-ignore: intel/fs: Use the original destination region for int
72 - cherry-ignore: intel/fs: refactors
82 - cherry-ignore: Revert "intel/fs: Use a pure vertical stride for large
106 - autotools: Set C++ visibility flags on Intel
121 - intel/fs: Use ANY/ALL32 predicates in SIMD32
122 - intel/fs: Use an explicit D type for vote any/all/eq intrinsics
123 - intel/fs: Use a pair of 1-wide MOVs instead of SEL for any/all
124 - intel/eu/reg: Add a subscript() helper
[all …]
D21.3.9.rst49 - intel/perf: use a function to do common allocations
54 - intel/perf: Move some static blocks of C code out of the python script.
72 - intel/fs: Force destination types on DP4A instructions
96 - intel/perf: Don't print leading space from desc_units()
97 - intel/perf: Deduplicate perf counters
98 - intel/perf: Use a function to initialize perf counters
99 - intel/perf: Use slimmer intel_perf_query_counter_data struct
100 - intel/perf: Store indices to strings rather than pointers
101 - intel/perf: Mark intel_perf_counter_* enums as PACKED
102 - intel/perf: Fix mistake in description string
[all …]
D19.0.0.rst40 - VK_ANDROID_external_memory_android_hardware_buffer on Intel
41 - Fixed and re-exposed VK_EXT_pci_bus_info on Intel and RADV
42 - VK_EXT_scalar_block_layout on Intel and RADV
43 - VK_KHR_depth_stencil_resolve on Intel
44 - VK_KHR_draw_indirect_count on Intel
45 - VK_EXT_conditional_rendering on Intel
222 - totem assert failure: totem: src/intel/genxml/gen9_pack.h:72:
312 - intel/tools: avoid 'unused variable' warnings
316 - intel/tools: make sure the binary file is properly read
318 - intel/batch-decoder: fix vertex buffer size calculation for gen<8
[all …]
D19.1.0.rst34 - VK_EXT_buffer_device_address on Intel and RADV.
35 - VK_EXT_depth_clip_enable on Intel and RADV.
36 - VK_KHR_ycbcr_image_arrays on Intel.
37 - VK_EXT_inline_uniform_block on Intel and RADV.
38 - VK_EXT_external_memory_host on Intel.
39 - VK_EXT_host_query_reset on Intel and RADV.
40 - VK_KHR_surface_protected_capabilities on Intel and RADV.
41 - VK_EXT_pipeline_creation_feedback on Intel and RADV.
45 - VK_NV_compute_shader_derivatives on Intel.
46 - VK_KHR_shader_float16_int8 on Intel and RADV (RADV only supports
[all …]
D20.1.0.rst39 - VK_KHR_shader_non_semantic_info on Intel, RADV.
47 - VK_EXT_robustness2 on Intel, RADV.
53 - Reproduceable i915 gpu hang Intel Iris Plus Graphics (Ice Lake 8x8
86 - intel/compiler: Register coalesce doesn't move conditional modifiers
120 - Graphic artifacts with Mesa 20.0.4 on intel HD 510 GPU
126 - Graphical glitches on Intel Graphics when Xorg started on Iris driver
167 - src/intel/tools/aubinator_viewer.cpp:383:52: error: format ‘%lx’
845 - intel/gen12+: Reserve 4KB of URB space per bank for Compute Engine
846 - intel/gen12+: Set way_size_per_bank to 4
857 - intel/compiler: fix alignment assert in nir_emit_intrinsic
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/third_party/mesa3d/src/compiler/spirv/
Dspir-v.xml64 <id value="11" vendor="Intel" comment="Contact Alexey, alexey.bader@intel.com"/>
129 …<ids type="opcode" start="5568" end="5631" vendor="Intel" comment="Contact ben.ashbaugh@intel.com"…
131 …<ids type="opcode" start="5696" end="5823" vendor="Intel" comment="Contact ben.ashbaugh@intel.com"…
132 …<ids type="opcode" start="5824" end="5951" vendor="Intel" comment="Contact michael.kinsner@intel.c…
135 …<ids type="opcode" start="6080" end="6143" vendor="Intel" comment="Contact mariusz.merecki@intel.c…
136 …<ids type="opcode" start="6144" end="6271" vendor="Intel" comment="Contact michael.kinsner@intel.c…
138 …<ids type="opcode" start="6400" end="6463" vendor="Intel" comment="Contact ben.ashbaugh@intel.com"…
158 …<ids type="enumerant" start="5568" end="5631" vendor="Intel" comment="Contact ben.ashbaugh@intel.c…
160 …<ids type="enumerant" start="5696" end="5823" vendor="Intel" comment="Contact ben.ashbaugh@intel.c…
161 …<ids type="enumerant" start="5824" end="5951" vendor="Intel" comment="Contact michael.kinsner@inte…
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/third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Headers/include/spirv/
Dspir-v.xml64 <id value="11" vendor="Intel" comment="Contact Alexey, alexey.bader@intel.com"/>
128 …<ids type="opcode" start="5568" end="5631" vendor="Intel" comment="Contact ben.ashbaugh@intel.com"…
130 …<ids type="opcode" start="5696" end="5823" vendor="Intel" comment="Contact ben.ashbaugh@intel.com"…
131 …<ids type="opcode" start="5824" end="5951" vendor="Intel" comment="Contact michael.kinsner@intel.c…
134 …<ids type="opcode" start="6080" end="6143" vendor="Intel" comment="Contact mariusz.merecki@intel.c…
135 …<ids type="opcode" start="6144" end="6271" vendor="Intel" comment="Contact michael.kinsner@intel.c…
137 …<ids type="opcode" start="6400" end="6463" vendor="Intel" comment="Contact ben.ashbaugh@intel.com"…
157 …<ids type="enumerant" start="5568" end="5631" vendor="Intel" comment="Contact ben.ashbaugh@intel.c…
159 …<ids type="enumerant" start="5696" end="5823" vendor="Intel" comment="Contact ben.ashbaugh@intel.c…
160 …<ids type="enumerant" start="5824" end="5951" vendor="Intel" comment="Contact michael.kinsner@inte…
[all …]
/third_party/skia/third_party/externals/spirv-headers/include/spirv/
Dspir-v.xml64 <id value="11" vendor="Intel" comment="Contact Alexey, alexey.bader@intel.com"/>
128 …<ids type="opcode" start="5568" end="5631" vendor="Intel" comment="Contact ben.ashbaugh@intel.com"…
130 …<ids type="opcode" start="5696" end="5823" vendor="Intel" comment="Contact ben.ashbaugh@intel.com"…
131 …<ids type="opcode" start="5824" end="5951" vendor="Intel" comment="Contact michael.kinsner@intel.c…
134 …<ids type="opcode" start="6080" end="6143" vendor="Intel" comment="Contact mariusz.merecki@intel.c…
135 …<ids type="opcode" start="6144" end="6271" vendor="Intel" comment="Contact michael.kinsner@intel.c…
137 …<ids type="opcode" start="6400" end="6463" vendor="Intel" comment="Contact ben.ashbaugh@intel.com"…
157 …<ids type="enumerant" start="5568" end="5631" vendor="Intel" comment="Contact ben.ashbaugh@intel.c…
159 …<ids type="enumerant" start="5696" end="5823" vendor="Intel" comment="Contact ben.ashbaugh@intel.c…
160 …<ids type="enumerant" start="5824" end="5951" vendor="Intel" comment="Contact michael.kinsner@inte…
[all …]
/third_party/spirv-headers/include/spirv/
Dspir-v.xml64 <id value="11" vendor="Intel" comment="Contact Alexey, alexey.bader@intel.com"/>
137 …<ids type="opcode" start="5568" end="5631" vendor="Intel" comment="Contact ben.ashbaugh@intel.com"…
139 …<ids type="opcode" start="5696" end="5823" vendor="Intel" comment="Contact ben.ashbaugh@intel.com"…
140 …<ids type="opcode" start="5824" end="5951" vendor="Intel" comment="Contact michael.kinsner@intel.c…
143 …<ids type="opcode" start="6080" end="6143" vendor="Intel" comment="Contact mariusz.merecki@intel.c…
144 …<ids type="opcode" start="6144" end="6271" vendor="Intel" comment="Contact michael.kinsner@intel.c…
146 …<ids type="opcode" start="6400" end="6463" vendor="Intel" comment="Contact ben.ashbaugh@intel.com"…
170 …<ids type="enumerant" start="5568" end="5631" vendor="Intel" comment="Contact ben.ashbaugh@intel.c…
172 …<ids type="enumerant" start="5696" end="5823" vendor="Intel" comment="Contact ben.ashbaugh@intel.c…
173 …<ids type="enumerant" start="5824" end="5951" vendor="Intel" comment="Contact michael.kinsner@inte…
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/third_party/skia/third_party/externals/angle2/src/tests/deqp_support/
Ddeqp_gles2_test_expectations.txt118 // Linux OpenGL Intel
119 3302 OPENGL INTEL LINUX : dEQP-GLES2.functional.rasterization.interpolation.basic.lines_wide = FAIL
120 3302 OPENGL INTEL LINUX : dEQP-GLES2.functional.rasterization.interpolation.basic.line_strip_wide =…
121 3302 OPENGL INTEL LINUX : dEQP-GLES2.functional.rasterization.interpolation.basic.line_loop_wide = …
122 3302 OPENGL INTEL LINUX : dEQP-GLES2.functional.rasterization.interpolation.projected.lines_wide = …
123 3302 OPENGL INTEL LINUX : dEQP-GLES2.functional.rasterization.interpolation.projected.line_strip_wi…
124 3302 OPENGL INTEL LINUX : dEQP-GLES2.functional.rasterization.interpolation.projected.line_loop_wid…
125 3302 OPENGL INTEL LINUX : dEQP-GLES2.functional.shaders.texture_functions.vertex.texturecubelod = F…
126 3302 OPENGL INTEL LINUX : dEQP-GLES2.functional.texture.vertex.cube.filtering.linear_mipmap_linear_…
127 3302 OPENGL INTEL LINUX : dEQP-GLES2.functional.texture.vertex.cube.filtering.linear_mipmap_linear_…
[all …]
/third_party/ltp/testcases/kernel/tracing/pt_test/
Dpt_test.c4 * Copyright (C) 2018 Intel Corporation
5 * Author: Ammy Yi (ammy.yi@intel.com)
9 * This test will check if Intel PT(Intel Processer Trace) is working.
11 * Intel CPU of 5th-generation Core (Broadwell) or newer is required for the test.
38 //Intel PT event handle
67 tst_res(TINFO, "Open Intel PT event failed"); in create_map()
136 tst_res(TINFO, "Intel FAM6 model %d", model); in is_affected_by_erratum_BDM106()
161 "Requires Intel Core 5th+ generation (Broadwell and newer) and CONFIG_PERF_EVENTS enabled"); in setup()
164 /* set attr for Intel PT trace */ in setup()
179 tst_res(TINFO, "Intel PT will disable branch trace"); in setup()
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