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Searched +full:jh7110 +full:- +full:pmu (Results 1 – 7 of 7) sorted by relevance

/kernel/linux/linux-6.6/Documentation/devicetree/bindings/power/
Dstarfive,jh7110-pmu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/starfive,jh7110-pmu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: StarFive JH7110 Power Management Unit
10 - Walker Chen <walker.chen@starfivetech.com>
13 StarFive JH7110 SoC includes support for multiple power domains which can be
19 - starfive,jh7110-pmu
27 "#power-domain-cells":
31 - compatible
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Dstarfive,jh7110-voutcrg.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/starfive,jh7110-voutcrg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: StarFive JH7110 Video-Output Clock and Reset Generator
10 - Xingyu Wu <xingyu.wu@starfivetech.com>
14 const: starfive,jh7110-voutcrg
21 - description: Vout Top core
22 - description: Vout Top Ahb
23 - description: Vout Top Axi
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Dstarfive,jh7110-ispcrg.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/starfive,jh7110-ispcrg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: StarFive JH7110 Image-Signal-Process Clock and Reset Generator
10 - Xingyu Wu <xingyu.wu@starfivetech.com>
14 const: starfive,jh7110-ispcrg
21 - description: ISP Top core
22 - description: ISP Top Axi
23 - description: NOC ISP Bus
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/kernel/linux/linux-6.6/drivers/pmdomain/starfive/
Djh71xx-pmu.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * StarFive JH71XX PMU (Power Management Unit) Controller Driver
16 #include <dt-bindings/power/starfive,jh7110-pmu.h>
34 /* pmu int status */
66 spinlock_t lock; /* protects pmu reg */
71 struct jh71xx_pmu *pmu; member
77 struct jh71xx_pmu *pmu = pmd->pmu; in jh71xx_pmu_get_state() local
80 return -EINVAL; in jh71xx_pmu_get_state()
82 *is_on = readl(pmu->base + JH71XX_PMU_CURR_POWER_MODE) & mask; in jh71xx_pmu_get_state()
89 struct jh71xx_pmu *pmu = pmd->pmu; in jh71xx_pmu_set_state() local
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/kernel/linux/linux-6.6/arch/riscv/boot/dts/starfive/
Djh7110.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include <dt-bindings/clock/starfive,jh7110-crg.h>
9 #include <dt-bindings/power/starfive,jh7110-pmu.h>
10 #include <dt-bindings/reset/starfive,jh7110-crg.h>
11 #include <dt-bindings/thermal/thermal.h>
14 compatible = "starfive,jh7110";
15 #address-cells = <2>;
16 #size-cells = <2>;
19 #address-cells = <1>;
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/kernel/linux/linux-6.6/drivers/watchdog/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
16 on-line as fast as possible after a lock-up. There's both a watchdog
21 <file:Documentation/watchdog/watchdog-api.rst> in the kernel source.
51 bool "Update boot-enabled watchdog until userspace takes over"
77 bool "Enable watchdog hrtimer-based pretimeouts"
228 tristate "Watchdog device controlled through GPIO-line"
233 controlled through GPIO-line.
358 module will be called mlx-wdt.
392 More details: ARM DEN0029B - Server Base System Architecture (SBSA)
461 The Intel Footbridge chip contains a built-in watchdog circuit. Say Y
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/kernel/linux/linux-6.6/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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