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/kernel/linux/linux-5.10/arch/mips/cavium-octeon/executive/
Dcvmx-helper-jtag.c36 #include <asm/octeon/cvmx-helper-jtag.h>
40 * Initialize the internal QLM JTAG logic to allow programming
41 * of the JTAG chain by the cvmx_helper_qlm_jtag_*() functions.
43 * Networks. Programming incorrect values into the JTAG chain
59 * Clock divider for QLM JTAG operations. eclk is divided by in cvmx_helper_qlm_jtag_init()
74 * Write up to 32bits into the QLM jtag chain. Bits are shifted
76 * order bits followed by the high order bits. The JTAG chain is
84 * Returns The low order bits of the JTAG chain that shifted out of the
104 * Shift long sequences of zeros into the QLM JTAG chain. It is
125 * Program the QLM JTAG chain into all lanes of the QLM. You must
[all …]
/kernel/linux/linux-6.6/arch/mips/cavium-octeon/executive/
Dcvmx-helper-jtag.c36 #include <asm/octeon/cvmx-helper-jtag.h>
40 * Initialize the internal QLM JTAG logic to allow programming
41 * of the JTAG chain by the cvmx_helper_qlm_jtag_*() functions.
43 * Networks. Programming incorrect values into the JTAG chain
59 * Clock divider for QLM JTAG operations. eclk is divided by in cvmx_helper_qlm_jtag_init()
74 * Write up to 32bits into the QLM jtag chain. Bits are shifted
76 * order bits followed by the high order bits. The JTAG chain is
84 * Returns The low order bits of the JTAG chain that shifted out of the
104 * Shift long sequences of zeros into the QLM JTAG chain. It is
125 * Program the QLM JTAG chain into all lanes of the QLM. You must
[all …]
/kernel/linux/linux-6.6/drivers/soc/rockchip/
Dgrf.c32 * Disable auto jtag/sdmmc switching that causes issues with the
35 { "jtag switching", RK3036_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 11) },
46 { "jtag switching", RK3128_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 8) },
57 { "jtag switching", RK3228_GRF_SOC_CON6, HIWORD_UPDATE(0, 1, 8) },
69 { "jtag switching", RK3288_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 12) },
81 { "jtag switching", RK3328_GRF_SOC_CON4, HIWORD_UPDATE(0, 1, 12) },
92 { "jtag switching", RK3368_GRF_SOC_CON15, HIWORD_UPDATE(0, 1, 13) },
103 { "jtag switching", RK3399_GRF_SOC_CON7, HIWORD_UPDATE(0, 1, 12) },
127 { "jtag switching", RK3588_GRF_SOC_CON6, HIWORD_UPDATE(0, 1, 14) },
/kernel/linux/linux-5.10/drivers/soc/rockchip/
Dgrf.c32 * Disable auto jtag/sdmmc switching that causes issues with the
35 { "jtag switching", RK3036_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 11) },
46 { "jtag switching", RK3128_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 8) },
57 { "jtag switching", RK3228_GRF_SOC_CON6, HIWORD_UPDATE(0, 1, 8) },
69 { "jtag switching", RK3288_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 12) },
81 { "jtag switching", RK3328_GRF_SOC_CON4, HIWORD_UPDATE(0, 1, 12) },
92 { "jtag switching", RK3368_GRF_SOC_CON15, HIWORD_UPDATE(0, 1, 13) },
103 { "jtag switching", RK3399_GRF_SOC_CON7, HIWORD_UPDATE(0, 1, 12) },
/kernel/linux/linux-6.6/drivers/pinctrl/mediatek/
Dpinctrl-mt76x8.c79 FUNC("jtag", 3, 22, 8),
121 FUNC("jtag", 3, 30, 1),
128 FUNC("jtag", 3, 31, 1),
135 FUNC("jtag", 3, 32, 1),
142 FUNC("jtag", 3, 33, 1),
149 FUNC("jtag", 3, 34, 1),
163 FUNC("jtag", 3, 39, 1),
170 FUNC("jtag", 3, 40, 1),
177 FUNC("jtag", 3, 41, 1),
184 FUNC("jtag", 3, 42, 1),
[all …]
Dpinctrl-rt305x.c46 static struct mtmips_pmx_func jtag_grp[] = { FUNC("jtag", 0, 17, 5) };
72 GRP("jtag", jtag_grp, 1, RT305X_GPIO_MODE_JTAG),
85 GRP("jtag", jtag_grp, 1, RT305X_GPIO_MODE_JTAG),
101 GRP("jtag", jtag_grp, 1, RT305X_GPIO_MODE_JTAG),
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dlantiq,pinctrl-xway.txt50 exin0, exin1, exin2, jtag, ebu a23, ebu a24, ebu a25, ebu clk, ebu cs1,
57 spi, asc, cgu, jtag, exin, stp, gpt, nmi, pci, ebu
61 exin0, exin1, exin2, exin3, exin4, jtag, ebu a23, ebu a24, ebu a25,
69 spi, asc, cgu, jtag, exin, stp, gpt, nmi, pci, ebu, mdio, gphy
73 exin0, exin1, exin2, jtag, spi_di, spi_do, spi_clk, spi_cs1, spi_cs2,
78 spi, asc, cgu, jtag, exin, stp, gpt, mdio, ephy, dfe
82 exin0, exin1, exin2, jtag, ebu a23, ebu a24, ebu a25, ebu clk, ebu cs1,
89 spi, asc, cgu, jtag, exin, stp, gpt, nmi, pci, ebu, dfe
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/
Dralink,rt2880-pinctrl.yaml38 enum: [gpio, i2c, spi, uartlite, jtag, mdio, sdram, pci]
57 enum: [i2c, spi, uartlite, jtag, mdio, sdram, pci]
89 const: jtag
93 enum: [jtag]
Dmediatek,mt7981-pinctrl.yaml91 "jtag" "jtag" 4, 5, 6, 7, 8
92 "wm_jtag_0" "jtag" 4, 5, 6, 7, 8
93 "wo0_jtag_0" "jtag" 9, 10, 11, 12, 13
129 "wm_jtag_1" "jtag" 20, 21, 22, 23, 24
130 "wo0_jtag_1" "jtag" 25, 26, 27, 28, 29
161 enum: [wa_aice, dfd, jtag, pta, pcm, udi, usb, ant, eth, i2c, led,
191 const: jtag
195 enum: [jtag, wm_jtag_0, wo0_jtag_0, wo0_jtag_1, wm_jtag_1]
Dralink,rt5350-pinctrl.yaml38 enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, led,
59 enum: [i2c, jtag, led, spi, spi_cs1, uartf, uartlite]
100 const: jtag
104 enum: [jtag]
Dralink,rt305x-pinctrl.yaml38 enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, mdio,
59 enum: [i2c, jtag, mdio, rgmii, sdram, spi, uartf, uartlite]
100 const: jtag
104 enum: [jtag]
Dralink,rt3352-pinctrl.yaml38 enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, led, lna,
59 enum: [i2c, jtag, led, lna, mdio, pa, rgmii, spi, spi_cs1,
101 const: jtag
105 enum: [jtag]
Dmediatek,mt7621-pinctrl.yaml38 enum: [gpio, i2c, i2s, jtag, mdio, nand1, nand2, pcie refclk,
59 enum: [i2c, jtag, mdio, pcie, rgmii1, rgmii2, sdhci, spi,
83 const: jtag
87 enum: [jtag]
Dralink,rt3883-pinctrl.yaml38 enum: [ge1, ge2, gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag,
77 enum: [ge1, ge2, i2c, jtag, lna a, lna g, mdio, pci, spi,
119 const: jtag
123 enum: [jtag]
/kernel/linux/linux-5.10/drivers/tty/hvc/
DKconfig81 bool "ARM JTAG DCC console"
86 This console uses the JTAG DCC on ARM to create a console under the HVC
87 driver. This console is used through a JTAG only on ARM. If you don't have
88 a JTAG then you probably don't want this option.
/kernel/linux/linux-6.6/arch/arm/mach-davinci/
Dcputype.h20 u8 variant; /* JTAG ID bits 31:28 */
21 u16 part_no; /* JTAG ID bits 27:12 */
22 u16 manufacturer; /* JTAG ID bits 11:1 */
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Drenesas,r9a06g032-sysctrl.txt12 - external (optional) jtag input
15 clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext";
30 clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext";
/kernel/linux/linux-6.6/drivers/tty/hvc/
DKconfig81 bool "ARM JTAG DCC console"
86 This console uses the JTAG DCC on ARM to create a console under the HVC
87 driver. This console is used through a JTAG only on ARM. If you don't have
88 a JTAG then you probably don't want this option.
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Drenesas,r9a06g032-sysctrl.yaml25 - description: Optional external JTAG input
33 - const: jtag
70 clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext";
/kernel/linux/linux-6.6/drivers/net/wireless/broadcom/b43/
Dphy_lp.h618 #define B2063_PLL_JTAG_CALNRST B43_LP_RADIO(0x064) /* PLL JTAG CALNRST */
619 #define B2063_PLL_JTAG_IN_PLL1 B43_LP_RADIO(0x065) /* PLL JTAG IN PLL 1 */
620 #define B2063_PLL_JTAG_IN_PLL2 B43_LP_RADIO(0x066) /* PLL JTAG IN PLL 2 */
621 #define B2063_PLL_JTAG_PLL_CP1 B43_LP_RADIO(0x067) /* PLL JTAG PLL CP 1 */
622 #define B2063_PLL_JTAG_PLL_CP2 B43_LP_RADIO(0x068) /* PLL JTAG PLL CP 2 */
623 #define B2063_PLL_JTAG_PLL_CP3 B43_LP_RADIO(0x069) /* PLL JTAG PLL CP 3 */
624 #define B2063_PLL_JTAG_PLL_CP4 B43_LP_RADIO(0x06A) /* PLL JTAG PLL CP 4 */
625 #define B2063_PLL_JTAG_PLL_CTL1 B43_LP_RADIO(0x06B) /* PLL JTAG PLL Control 1 */
626 #define B2063_PLL_JTAG_PLL_LF1 B43_LP_RADIO(0x06C) /* PLL JTAG PLL LF 1 */
627 #define B2063_PLL_JTAG_PLL_LF2 B43_LP_RADIO(0x06D) /* PLL JTAG PLL LF 2 */
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/broadcom/b43/
Dphy_lp.h618 #define B2063_PLL_JTAG_CALNRST B43_LP_RADIO(0x064) /* PLL JTAG CALNRST */
619 #define B2063_PLL_JTAG_IN_PLL1 B43_LP_RADIO(0x065) /* PLL JTAG IN PLL 1 */
620 #define B2063_PLL_JTAG_IN_PLL2 B43_LP_RADIO(0x066) /* PLL JTAG IN PLL 2 */
621 #define B2063_PLL_JTAG_PLL_CP1 B43_LP_RADIO(0x067) /* PLL JTAG PLL CP 1 */
622 #define B2063_PLL_JTAG_PLL_CP2 B43_LP_RADIO(0x068) /* PLL JTAG PLL CP 2 */
623 #define B2063_PLL_JTAG_PLL_CP3 B43_LP_RADIO(0x069) /* PLL JTAG PLL CP 3 */
624 #define B2063_PLL_JTAG_PLL_CP4 B43_LP_RADIO(0x06A) /* PLL JTAG PLL CP 4 */
625 #define B2063_PLL_JTAG_PLL_CTL1 B43_LP_RADIO(0x06B) /* PLL JTAG PLL Control 1 */
626 #define B2063_PLL_JTAG_PLL_LF1 B43_LP_RADIO(0x06C) /* PLL JTAG PLL LF 1 */
627 #define B2063_PLL_JTAG_PLL_LF2 B43_LP_RADIO(0x06D) /* PLL JTAG PLL LF 2 */
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-davinci/include/mach/
Dcputype.h22 u8 variant; /* JTAG ID bits 31:28 */
23 u16 part_no; /* JTAG ID bits 27:12 */
24 u16 manufacturer; /* JTAG ID bits 11:1 */
/kernel/linux/linux-5.10/arch/mips/ralink/
Dmt7620.c152 FUNC("jtag", 3, 22, 8),
194 FUNC("jtag", 3, 30, 1),
201 FUNC("jtag", 3, 31, 1),
208 FUNC("jtag", 3, 32, 1),
215 FUNC("jtag", 3, 33, 1),
222 FUNC("jtag", 3, 34, 1),
236 FUNC("jtag", 3, 39, 1),
243 FUNC("jtag", 3, 40, 1),
250 FUNC("jtag", 3, 41, 1),
257 FUNC("jtag", 3, 42, 1),
[all …]
/kernel/linux/linux-6.6/arch/sparc/include/asm/
Dfhc.h67 #define FHC_PREGS_JCTRL 0xf0UL /* FHC JTAG Control Register */
68 #define FHC_JTAG_CTRL_MENAB 0x80000000 /* Indicates this is JTAG Master */
69 #define FHC_JTAG_CTRL_MNONE 0x40000000 /* Indicates no JTAG Master present */
70 #define FHC_PREGS_JCMD 0x100UL /* FHC JTAG Command Register */
/kernel/linux/linux-5.10/arch/sparc/include/asm/
Dfhc.h67 #define FHC_PREGS_JCTRL 0xf0UL /* FHC JTAG Control Register */
68 #define FHC_JTAG_CTRL_MENAB 0x80000000 /* Indicates this is JTAG Master */
69 #define FHC_JTAG_CTRL_MNONE 0x40000000 /* Indicates no JTAG Master present */
70 #define FHC_PREGS_JCMD 0x100UL /* FHC JTAG Command Register */

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