| /kernel/linux/linux-5.10/arch/arm/mach-davinci/ |
| D | mux.h | 18 #define MUX_CFG(soc, desc, muxreg, mode_offset, mode_mask, mux_mode, dbg)\ argument
26 .mode = mux_mode, \
29 #define INT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \ argument
37 .mode = mux_mode, \
40 #define EVT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \ argument
48 .mode = mux_mode, \
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| D | board-da830-evm.c | 388 static inline void da830_evm_init_nand(int mux_mode) in da830_evm_init_nand() argument
406 gpio_direction_output(mux_mode, 1); in da830_evm_init_nand()
409 static inline void da830_evm_init_nand(int mux_mode) { } in da830_evm_init_nand() argument
413 static inline void da830_evm_init_lcdc(int mux_mode) in da830_evm_init_lcdc() argument
425 gpio_direction_output(mux_mode, 0); in da830_evm_init_lcdc()
428 static inline void da830_evm_init_lcdc(int mux_mode) { } in da830_evm_init_lcdc() argument
460 gpio_request(gpio + 6, "UI MUX_MODE"); in da830_evm_ui_expander_setup()
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| D | board-dm646x-evm.c | 475 static int set_vpif_clock(int mux_mode, int hd) in set_vpif_clock() argument
496 if (mux_mode == 1) in set_vpif_clock()
626 * @mux_mode: mux mode. 0 - 1 channel or (1) - 2 channel
630 static int setup_vpif_input_channel_mode(int mux_mode) in setup_vpif_input_channel_mode() argument
646 if (mux_mode) { in setup_vpif_input_channel_mode()
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| /kernel/linux/linux-6.6/drivers/pinctrl/freescale/ |
| D | pinctrl-imx.h | 23 * @mux_mode: the mux mode for this pin.
30 unsigned int mux_mode; member
42 unsigned int mux_mode; member
90 /* MUX_MODE shift and mask in case SHARE_MUX_CONF_REG */
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| D | pinctrl-imx.c | 187 reg |= (pin_mmio->mux_mode << info->mux_shift); in imx_pmx_set_one_pin_mmio()
192 writel(pin_mmio->mux_mode, ipctl->base + pin_reg->mux_reg); in imx_pmx_set_one_pin_mmio()
194 pin_reg->mux_reg, pin_mmio->mux_mode); in imx_pmx_set_one_pin_mmio()
450 * <mux_reg conf_reg input_reg mux_mode input_val>
452 * <mux_conf_reg input_reg mux_mode input_val>
454 * <pin_id mux_mode>
491 pin_mmio->mux_mode = be32_to_cpu(*list++); in imx_pinctrl_parse_pin_mmio()
498 pin_mmio->mux_mode |= IOMUXC_CONFIG_SION; in imx_pinctrl_parse_pin_mmio()
504 pin_mmio->mux_mode, pin_mmio->config); in imx_pinctrl_parse_pin_mmio()
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| D | pinctrl-scu.c | 150 pin_scu->mux_mode = be32_to_cpu(*list++); in imx_pinctrl_parse_pin_scu()
155 pin_scu->mux_mode, pin_scu->config); in imx_pinctrl_parse_pin_scu()
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| /kernel/linux/linux-6.6/arch/arm/mach-davinci/ |
| D | mux.h | 668 #define MUX_CFG(soc, desc, muxreg, mode_offset, mode_mask, mux_mode, dbg)\ argument
676 .mode = mux_mode, \
679 #define INT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \ argument
687 .mode = mux_mode, \
690 #define EVT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \ argument
698 .mode = mux_mode, \
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| /kernel/linux/linux-5.10/drivers/pinctrl/freescale/ |
| D | pinctrl-imx.h | 24 * @mux_mode: the mux mode for this pin.
31 unsigned int mux_mode; member
43 unsigned int mux_mode; member
99 /* MUX_MODE shift and mask in case SHARE_MUX_CONF_REG */
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| D | pinctrl-imx.c | 185 reg |= (pin_mmio->mux_mode << info->mux_shift); in imx_pmx_set_one_pin_mmio()
190 writel(pin_mmio->mux_mode, ipctl->base + pin_reg->mux_reg); in imx_pmx_set_one_pin_mmio()
192 pin_reg->mux_reg, pin_mmio->mux_mode); in imx_pmx_set_one_pin_mmio()
505 * <mux_reg conf_reg input_reg mux_mode input_val>
507 * <mux_conf_reg input_reg mux_mode input_val>
509 * <pin_id mux_mode>
546 pin_mmio->mux_mode = be32_to_cpu(*list++); in imx_pinctrl_parse_pin_mmio()
558 pin_mmio->mux_mode |= IOMUXC_CONFIG_SION; in imx_pinctrl_parse_pin_mmio()
565 pin_mmio->mux_mode, pin_mmio->config); in imx_pinctrl_parse_pin_mmio()
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| D | pinctrl-scu.c | 119 pin_scu->mux_mode = be32_to_cpu(*list++); in imx_pinctrl_parse_pin_scu()
124 pin_scu->mux_mode, pin_scu->config); in imx_pinctrl_parse_pin_scu()
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/ |
| D | fsl,imx8ulp-pinctrl.yaml | 36 mux_mode input_val> are specified using a PIN_FUNC_ID macro, which can
48 "mux_mode" indicates the mux value to be applied.
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| D | fsl,imx7ulp-pinctrl.txt | 17 <mux_conf_reg input_reg mux_mode input_val> are specified
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| D | fsl,imx-pinctrl.txt | 36 Force the selected mux mode input path no matter of MUX_MODE functionality.
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | imx6ull-pinfunc-snvs.h | 11 * <mux_reg conf_reg input_reg mux_mode input_val>
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| D | imx6ull-pinfunc.h | 12 * <mux_reg conf_reg input_reg mux_mode input_val>
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/imx/ |
| D | imx6ull-pinfunc-snvs.h | 11 * <mux_reg conf_reg input_reg mux_mode input_val>
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| D | imx6ull-pinfunc.h | 12 * <mux_reg conf_reg input_reg mux_mode input_val>
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | fsl,imx7ulp-pinctrl.txt | 17 <mux_conf_reg input_reg mux_mode input_val> are specified
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| D | fsl,imx-pinctrl.txt | 36 Force the selected mux mode input path no matter of MUX_MODE functionality.
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/freescale/ |
| D | fsl,scu.txt | 117 integers <pin_id mux_mode> are specified using a
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| /kernel/linux/linux-6.6/include/dt-bindings/pinctrl/ |
| D | pads-imx8dxl.h | 147 /* format: <pin_id mux_mode> */
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| D | pads-imx8qxp.h | 187 * format: <pin_id mux_mode>
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| D | pads-imx8qm.h | 282 * format: <pin_id mux_mode>
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| /kernel/linux/linux-5.10/include/dt-bindings/pinctrl/ |
| D | pads-imx8dxl.h | 147 /* format: <pin_id mux_mode> */
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| D | pads-imx8qxp.h | 187 * format: <pin_id mux_mode>
|