| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | rockchip,px30-cru.txt | 16 - "xin24m" for both PMUCRU and CRU
17 - "gpll" for CRU (sourced from PMUCRU)
44 pmucru: clock-controller@ff2bc000 {
45 compatible = "rockchip,px30-pmucru";
66 clocks = <&pmucru SCLK_UART0_PMU>, <&pmucru PCLK_UART0_PMU>;
|
| D | rockchip,rk3399-cru.txt | 9 - compatible: PMU for CRU should be "rockchip,rk3399-pmucru"
43 pmucru: pmu-clock-controller@ff750000 {
44 compatible = "rockchip,rk3399-pmucru";
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ |
| D | rockchip,px30-cru.yaml | 34 - rockchip,px30-pmucru
48 - description: Clock for both PMUCRU and CRU
49 - description: Clock for CRU (sourced from PMUCRU)
101 pmucru: clock-controller@ff2bc000 {
102 compatible = "rockchip,px30-pmucru";
114 clocks = <&xin24m>, <&pmucru PLL_GPLL>;
|
| D | rockchip,rk3568-cru.yaml | 26 - rockchip,rk3568-pmucru
61 pmucru: clock-controller@fdd00000 {
62 compatible = "rockchip,rk3568-pmucru";
|
| D | rockchip,rk3399-cru.yaml | 36 - rockchip,rk3399-pmucru
71 pmucru: clock-controller@ff750000 {
72 compatible = "rockchip,rk3399-pmucru";
|
| D | rockchip,rv1126-cru.yaml | 22 - rockchip,rv1126-pmucru
|
| /kernel/linux/linux-6.6/arch/arm64/boot/dts/rockchip/ |
| D | rk356x.dtsi | 411 pmucru: clock-controller@fdd00000 { label
412 compatible = "rockchip,rk3568-pmucru";
425 assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>, <&pmucru PLL_PPLL>;
427 assigned-clock-parents = <&pmucru CLK_RTC32K_FRAC>;
435 clocks = <&pmucru CLK_I2C0>, <&pmucru PCLK_I2C0>;
448 clocks = <&pmucru SCLK_UART0>, <&pmucru PCLK_UART0>;
461 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
472 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
483 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
494 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
[all …]
|
| D | rk3568.dtsi | 54 clocks = <&pmucru CLK_PCIE30PHY_REF_M>, <&pmucru CLK_PCIE30PHY_REF_N>,
219 clocks = <&pmucru CLK_PCIEPHY0_REF>,
223 assigned-clocks = <&pmucru CLK_PCIEPHY0_REF>;
|
| D | rk3566-anbernic-rg353x.dtsi | 19 assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
20 <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
|
| D | rk3399.dtsi | 1248 clocks = <&pmucru SCLK_SPI3_PMU>, <&pmucru PCLK_SPI3_PMU>;
1261 clocks = <&pmucru SCLK_UART4_PMU>, <&pmucru PCLK_UART4_PMU>;
1274 assigned-clocks = <&pmucru SCLK_I2C0_PMU>;
1276 clocks = <&pmucru SCLK_I2C0_PMU>, <&pmucru PCLK_I2C0_PMU>;
1289 assigned-clocks = <&pmucru SCLK_I2C4_PMU>;
1291 clocks = <&pmucru SCLK_I2C4_PMU>, <&pmucru PCLK_I2C4_PMU>;
1304 assigned-clocks = <&pmucru SCLK_I2C8_PMU>;
1306 clocks = <&pmucru SCLK_I2C8_PMU>, <&pmucru PCLK_I2C8_PMU>;
1322 clocks = <&pmucru PCLK_RKPWM_PMU>;
1332 clocks = <&pmucru PCLK_RKPWM_PMU>;
[all …]
|
| D | rk3566-anbernic-rg503.dts | 108 assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
109 <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
|
| D | rk3566-box-demo.dts | 73 clocks = <&pmucru CLK_RTC_32K>;
451 clocks = <&pmucru CLK_RTC_32K>;
469 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| D | px30.dtsi | 378 clocks = <&pmucru SCLK_UART0_PMU>, <&pmucru PCLK_UART0_PMU>;
833 clocks = <&xin24m>, <&pmucru PLL_GPLL>;
850 pmucru: clock-controller@ff2bc000 { label
851 compatible = "rockchip,px30-pmucru";
860 <&pmucru PLL_GPLL>, <&pmucru PCLK_PMU_PRE>,
861 <&pmucru SCLK_WIFI_PMU>;
877 clocks = <&pmucru SCLK_USBPHY_REF>;
907 clocks = <&pmucru SCLK_MIPIDSIPHY_REF>, <&cru PCLK_MIPIDSIPHY>;
1398 clocks = <&pmucru PCLK_GPIO0_PMU>;
|
| D | rk3566-radxa-cm3-io.dts | 267 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| D | rk3568-fastrhino-r66s.dtsi | 474 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| D | rk3566-lubancat-1.dts | 579 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/rockchip/ |
| D | rv1126.dtsi | 225 clocks = <&pmucru CLK_I2C0>, <&pmucru PCLK_I2C0>;
239 clocks = <&pmucru SCLK_UART1>, <&pmucru PCLK_UART1>;
250 pmucru: clock-controller@ff480000 { label
251 compatible = "rockchip,rv1126-pmucru";
527 clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>;
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/ |
| D | rockchip,pcie3-phy.yaml | 96 clocks = <&pmucru CLK_PCIE30PHY_REF_M>,
97 <&pmucru CLK_PCIE30PHY_REF_N>,
|
| D | phy-rockchip-naneng-combphy.yaml | 132 clocks = <&pmucru CLK_PCIEPHY0_REF>,
136 assigned-clocks = <&pmucru CLK_PCIEPHY0_REF>;
|
| D | rockchip,px30-dsi-dphy.yaml | 65 clocks = <&pmucru 13>, <&cru 12>;
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/rockchip/ |
| D | rk3399.dtsi | 1144 clocks = <&pmucru SCLK_SPI3_PMU>, <&pmucru PCLK_SPI3_PMU>;
1157 clocks = <&pmucru SCLK_UART4_PMU>, <&pmucru PCLK_UART4_PMU>;
1170 assigned-clocks = <&pmucru SCLK_I2C0_PMU>;
1172 clocks = <&pmucru SCLK_I2C0_PMU>, <&pmucru PCLK_I2C0_PMU>;
1185 assigned-clocks = <&pmucru SCLK_I2C4_PMU>;
1187 clocks = <&pmucru SCLK_I2C4_PMU>, <&pmucru PCLK_I2C4_PMU>;
1200 assigned-clocks = <&pmucru SCLK_I2C8_PMU>;
1202 clocks = <&pmucru SCLK_I2C8_PMU>, <&pmucru PCLK_I2C8_PMU>;
1218 clocks = <&pmucru PCLK_RKPWM_PMU>;
1229 clocks = <&pmucru PCLK_RKPWM_PMU>;
[all …]
|
| D | px30.dtsi | 349 clocks = <&pmucru SCLK_UART0_PMU>, <&pmucru PCLK_UART0_PMU>;
783 clocks = <&xin24m>, <&pmucru PLL_GPLL>;
800 pmucru: clock-controller@ff2bc000 { label
801 compatible = "rockchip,px30-pmucru";
810 <&pmucru PLL_GPLL>, <&pmucru PCLK_PMU_PRE>,
811 <&pmucru SCLK_WIFI_PMU>;
827 clocks = <&pmucru SCLK_USBPHY_REF>;
857 clocks = <&pmucru SCLK_MIPIDSIPHY_REF>, <&cru PCLK_MIPIDSIPHY>;
1221 clocks = <&pmucru PCLK_GPIO0_PMU>;
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/ |
| D | rockchip,px30-dsi-dphy.yaml | 63 clocks = <&pmucru 13>, <&cru 12>;
|
| /kernel/linux/linux-6.6/include/dt-bindings/clock/ |
| D | rk3568-cru.h | 10 /* pmucru-clocks indices */
12 /* pmucru plls */
16 /* pmucru clocks */
|
| D | rockchip,rv1126-cru.h | 10 /* pmucru-clocks indices */
|