Home
last modified time | relevance | path

Searched +full:pre +full:- +full:optimization (Results 1 – 25 of 26) sorted by relevance

12

/arkcompiler/runtime_core/static_core/libllvmbackend/
Dllvmbackend.yaml1 # Copyright (c) 2023-2024 Huawei Device Co., Ltd.
6 # http://www.apache.org/licenses/LICENSE-2.0
20 - name: llvm-allow-breakage
24 - name: llvm-fallback
28 - name: llvm-inlining
32 Enable inlining optimization. Default value is overridden by explicit
33 --compiler-inlining which in turn can be overridden by passing this
35 - name: llvm-pre-opt
39 Level of pre-optimization that LLVMAOT does.
43 - name: llvm-recursive-inlining
[all …]
/arkcompiler/runtime_core/static_core/compiler/docs/
Dloop_peeling.md4 `Loop peeling` optimization modifies the loops with exit-point at loop-header to the loops with exi…
19 - loop is not irreducible;
20 - loop-header is not OSR-entry;
21 - there is only 1 back-edge;
22 - loop-header is a single loop-exit point;
23 - there are no inner loops;
26 [pre-header]
29 /---->[header]--------\
32 \----[back-edge] [outer]
37 ### 1. Insert pre-loop
[all …]
Dredundant_loop_elimination_doc.md3 **Redundant Loop Elimination(RLE)** - optimization which find and remove useless loops.
16 1. Loop pre-header connect with loop outer block.
21 for (auto inner_loop : loop->GetInnerLoops()) {
34 …0.i64 Constant 0x0 -> (v4p) …
35 …1.i64 Constant 0x1 -> (v10) …
36 …2.i64 Constant 0xa -> (v5) …
41 …4p.i32 Phi v0(bb8), v10(bb4) -> (v5, v10) …
42 …5.b Compare LT i32 v4p, v2 -> (v6) …
55 …10.i32 Add v4p, v1 -> (v4p) …
Descape_analysis.md4 …nformation about object's scope. Currently there is only one such an optimization - **Scalar repla…
17 …ate to each basic block (BasicBlockState) that binds an object state to each ref-typed instruction.
22 - avoid materialization on StoreObject/LoadObject instructions;
23 - correctly initialize the object if materialization is required;
24 - replace LoadObject from virtual object with the instruction that was stored in the field.
28 …pre-header and then the loop blocks get processed like any other blocks until back edge states are…
33 * alias mapping - a map from an instruction in the original method to an in instruction that should…
66 for each ref-typed instruction inst from block's live ins:
76 vstate(inst) <- field
79 vstate(inst) <- phi(field values from predecessors)
[all …]
Dcleanup_doc.md1 # Cleanup optimization pass
22 After any optimization which deletes instructions some basic blocks may become empty or may contain…
25 First case is loop pre-header, which may legally be an empty basic block.
27 Second case is a so-called "special triangle" situation, when there are actually two edges between …
52 On first step redundant `Phi` instructions are removed - in short, if `phi` has only one real input…
58 instructions and is not an loop pre-header we still have to check each predecessor block for "speci…
67 During second pass we remove all not `live`-marked instructions.
92 for (auto bb : GetGraph()->GetVectorBlocks()) {
93 if (!SkipBasicBlock(bb) && bb->IsEmpty()) {
94 empty_blocks->insert(bb);
[all …]
/arkcompiler/runtime_core/static_core/plugins/ets/tests/checked/
Dets_catch_assert3.sts7 * http://www.apache.org/licenses/LICENSE-2.0
16 …ER Try Catch Resolving JIT Optimize with false assert to check correctness of LSE optimization
18 …--compiler-enable-jit=true --compiler-check-final=true --gc-type=g1-gc --heap-verifier=fail_on_ver…
Dets_catch_assert1.sts7 * http://www.apache.org/licenses/LICENSE-2.0
16 …ER Try Catch Resolving JIT Optimize with false assert to check correctness of LSE optimization
18 …--compiler-enable-jit=true --compiler-check-final=true --gc-type=g1-gc --heap-verifier=fail_on_ver…
Dets_catch_assert2.sts7 * http://www.apache.org/licenses/LICENSE-2.0
16 …ER Try Catch Resolving JIT Optimize with false assert to check correctness of LSE optimization
18 …--compiler-enable-jit=true --compiler-check-final=true --gc-type=g1-gc --heap-verifier=fail_on_ver…
Dets_catch_assert.sts7 * http://www.apache.org/licenses/LICENSE-2.0
16 …ER Try Catch Resolving JIT Optimize with false assert to check correctness of LSE optimization
18 …--compiler-enable-jit=true --compiler-check-final=true --gc-type=g1-gc --heap-verifier=fail_on_ver…
/arkcompiler/runtime_core/static_core/compiler/optimizer/optimizations/
Dloop_peeling.cpp2 * Copyright (c) 2021-2024 Huawei Device Co., Ltd.
7 * http://www.apache.org/licenses/LICENSE-2.0
26 * Loop-peeling optimization works with a loops with the following requirements:
27 * - loop is not irreducible;
28 * - there is only 1 back-edge;
29 * - loop-header is a single loop-exit point;
31 * [pre-header]
34 * /---->[header]--------\
37 * \----[back-edge] [outer]
40 * 1 stage - insert pre-loop which is an if-block:
[all …]
Dchecks_elimination.h2 * Copyright (c) 2021-2024 Huawei Device Co., Ltd.
7 * http://www.apache.org/licenses/LICENSE-2.0
34 // loop->len_array->GroupedBoundsChecks
38 …o; savestate; lower value; upper value; cond code for Deoptimize; head is loop exit; has pre-header
42 // NOLINTNEXTLINE(fuchsia-multiple-inheritance)
43 class ChecksElimination : public Optimization, public GraphVisitor {
44 using Optimization::Optimization;
48 : Optimization(graph), in ChecksElimination()
49 boundsChecks_(graph->GetLocalAllocator()->Adapter()), in ChecksElimination()
50 checksForMoveOutOfLoop_(graph->GetLocalAllocator()->Adapter()), in ChecksElimination()
[all …]
Dlicm.cpp2 * Copyright (c) 2021-2024 Huawei Device Co., Ltd.
7 * http://www.apache.org/licenses/LICENSE-2.0
28 …: Optimization(graph), hoistLimit_(hoistLimit), hoistableInstructions_(graph->GetLocalAllocator()-… in Licm()
35 if (!GetGraph()->GetAnalysis<LoopAnalyzer>().IsValid()) { in RunImpl()
36 GetGraph()->GetAnalysis<LoopAnalyzer>().Run(); in RunImpl()
39 ASSERT(GetGraph()->GetRootLoop() != nullptr); in RunImpl()
40 if (!GetGraph()->GetRootLoop()->GetInnerLoops().empty()) { in RunImpl()
41 markerLoopExit_ = GetGraph()->NewMarker(); in RunImpl()
43 for (auto loop : GetGraph()->GetRootLoop()->GetInnerLoops()) { in RunImpl()
46 GetGraph()->EraseMarker(markerLoopExit_); in RunImpl()
[all …]
/arkcompiler/runtime_core/compiler/optimizer/optimizations/regalloc/
Dreg_alloc_base.cpp2 * Copyright (c) 2021-2022 Huawei Device Co., Ltd.
7 * http://www.apache.org/licenses/LICENSE-2.0
31 : Optimization(graph), in RegAllocBase()
32 regs_mask_(graph->GetLocalAllocator()), in RegAllocBase()
33 vregs_mask_(graph->GetLocalAllocator()), in RegAllocBase()
34 stack_mask_(graph->GetLocalAllocator()), in RegAllocBase()
35 stack_use_last_positions_(graph->GetLocalAllocator()->Adapter()) in RegAllocBase()
43 : Optimization(graph), in RegAllocBase()
44 regs_mask_(graph->GetLocalAllocator()), in RegAllocBase()
45 vregs_mask_(graph->GetLocalAllocator()), in RegAllocBase()
[all …]
/arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/src/cg/
Dcg_options.cpp7 * http://www.apache.org/licenses/LICENSE-2.0
23 maplecl::Option<bool> pie({"-fPIE", "--pie", "-pie"},
24 … " --pie \tGenerate position-independent executable\n"
25 " --no-pie\n",
26 … {cgCategory, driverCategory, ldCategory}, maplecl::DisableWith("--no-pie"));
28 maplecl::Option<bool> fpic({"-fPIC", "--fpic", "-fpic"},
29 … " --fpic \tGenerate position-independent shared library\n"
30 " --no-fpic\n",
31 … {cgCategory, driverCategory, ldCategory}, maplecl::DisableWith("--no-fpic"));
33 maplecl::Option<bool> verboseAsm({"--verbose-asm"},
[all …]
Dreg_alloc_lsra.cpp7 * http://www.apache.org/licenses/LICENSE-2.0
25 /* Here, kLoopWeight is a fine-tuned empirical parameter */
76 LogInfo::MapleLogger() << "(assigned " << regType << (li.GetAssignedReg() - base) << ")"; in PrintLiveRanges()
97 LogInfo::MapleLogger() << "func: " << cgFunc->GetName() << "\n"; in PrintAllLiveRanges()
99 if (li == nullptr || li->GetRegNO() == 0) { in PrintAllLiveRanges()
102 LogInfo::MapleLogger() << "vreg" << li->GetRegNO() << ": "; in PrintAllLiveRanges()
103 if (li->GetSplitParent() != nullptr) { in PrintAllLiveRanges()
104 PrintLiveRanges(*li->GetSplitParent()); in PrintAllLiveRanges()
137 if (li == nullptr || li->GetRegNO() == 0) { in PrintLiveRangesGraph()
140 uint32 regNO = li->GetRegNO(); in PrintLiveRangesGraph()
[all …]
/arkcompiler/runtime_core/compiler/docs/
Dcleanup_doc.md1 # Cleanup optimization pass
22 After any optimization which deletes instructions some basic blocks may become empty or may contain…
25 First case is loop pre-header, which may legally be an empty basic block.
27 Second case is a so-called "special triangle" situation, when there are actually two edges between …
52 On first step redundant `Phi` instructions are removed - in short, if `phi` has only one real input…
58 instructions and is not an loop pre-header we still have to check each predecessor block for "speci…
67 During second pass we remove all not `live`-marked instructions.
92 for (auto bb : GetGraph()->GetVectorBlocks()) {
93 if (!SkipBasicBlock(bb) && bb->IsEmpty()) {
94 empty_blocks->insert(bb);
[all …]
/arkcompiler/runtime_core/static_core/compiler/optimizer/optimizations/regalloc/
Dreg_alloc_base.cpp2 * Copyright (c) 2021-2024 Huawei Device Co., Ltd.
7 * http://www.apache.org/licenses/LICENSE-2.0
31 : RegAllocBase(graph, graph->GetArchUsedRegs(), graph->GetArchUsedVRegs(), MAX_NUM_STACK_SLOTS) in RegAllocBase()
36 : Optimization(graph), in RegAllocBase()
37 regsMask_(graph->GetLocalAllocator()), in RegAllocBase()
38 vregsMask_(graph->GetLocalAllocator()), in RegAllocBase()
39 stackMask_(graph->GetLocalAllocator()), in RegAllocBase()
40 stackUseLastPositions_(graph->GetLocalAllocator()->Adapter()) in RegAllocBase()
48 : Optimization(graph), in RegAllocBase()
49 regsMask_(graph->GetLocalAllocator()), in RegAllocBase()
[all …]
/arkcompiler/runtime_core/compiler/optimizer/ir/
Dgraph.h2 * Copyright (c) 2021-2022 Huawei Device Co., Ltd.
7 * http://www.apache.org/licenses/LICENSE-2.0
50 // NOLINTNEXTLINE(cppcoreguidelines-macro-usage)
150 vector_bb_(allocator->Adapter()), in Graph()
151 throwable_insts_(allocator->Adapter()), in Graph()
154 pass_manager_(this, parent != nullptr ? parent->GetPassManager() : nullptr), in Graph()
155 event_writer_(runtime->GetClassNameFromMethod(method), runtime->GetMethodName(method)), in Graph()
157 single_implementation_list_(allocator->Adapter()), in Graph()
158 try_begin_blocks_(allocator->Adapter()), in Graph()
159 spilled_constants_(allocator->Adapter()), in Graph()
[all …]
/arkcompiler/runtime_core/static_core/compiler/optimizer/ir/
Dgraph.h2 * Copyright (c) 2021-2024 Huawei Device Co., Ltd.
7 * http://www.apache.org/licenses/LICENSE-2.0
59 // NOLINTNEXTLINE(cppcoreguidelines-macro-usage)
70 // NOLINTNEXTLINE(cppcoreguidelines-macro-usage)
165 vectorBb_(allocator->Adapter()), in Graph()
166 throwableInsts_(allocator->Adapter()), in Graph()
169 passManager_(this, parent != nullptr ? parent->GetPassManager() : nullptr), in Graph()
170 eventWriter_(runtime->GetClassNameFromMethod(method), runtime->GetMethodName(method)), in Graph()
172 singleImplementationList_(allocator->Adapter()), in Graph()
173 tryBeginBlocks_(allocator->Adapter()), in Graph()
[all …]
/arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/src/cg/aarch64/
Daarch64_insn.cpp7 * http://www.apache.org/licenses/LICENSE-2.0
41 DEBUG_ASSERT(opndProp == nullptr || opndProp->IsRegister(), "operand type doesn't match"); in Visit()
42 uint32 size = v->GetSize(); in Visit()
43 regno_t regNO = v->GetRegisterNumber(); in Visit()
44 uint8 opndSize = (opndProp != nullptr) ? opndProp->GetSize() : size; in Visit()
45 switch (v->GetRegisterType()) { in Visit()
54 if (opndProp->IsVectorOperand() && v->GetVecLaneSize() != 0) { in Visit()
58 … uint32 regSet = static_cast<uint32>(__builtin_ctz(static_cast<uint32>(opndSize)) - 3); in Visit()
71 if (v->IsOfstImmediate()) { in Visit()
75 if (v->IsStImmediate()) { in Visit()
[all …]
Daarch64_regsaves.cpp7 * http://www.apache.org/licenses/LICENSE-2.0
37 calleeBitsDef = cgFunc->GetMemoryPool()->NewArray<CalleeBitsType>(cgFunc->NumBBs()); in InitData()
38 errno_t retDef = memset_s(calleeBitsDef, cgFunc->NumBBs() * sizeof(CalleeBitsType), 0, in InitData()
39 cgFunc->NumBBs() * sizeof(CalleeBitsType)); in InitData()
40 calleeBitsUse = cgFunc->GetMemoryPool()->NewArray<CalleeBitsType>(cgFunc->NumBBs()); in InitData()
41 errno_t retUse = memset_s(calleeBitsUse, cgFunc->NumBBs() * sizeof(CalleeBitsType), 0, in InitData()
42 cgFunc->NumBBs() * sizeof(CalleeBitsType)); in InitData()
46 const MapleVector<AArch64reg> &sp = aarchCGFunc->GetCalleeSavedRegs(); in InitData()
49 aarchCGFunc->GetProEpilogSavedRegs().push_back(RFP); in InitData()
52 aarchCGFunc->GetProEpilogSavedRegs().push_back(RLR); in InitData()
[all …]
Daarch64_prop.cpp7 * http://www.apache.org/licenses/LICENSE-2.0
38 auto rightShiftNumToGetSignFlag = (is64Bit ? 64 : 32) - 1; in MayOverflow()
48 int64 res = static_cast<int64>(static_cast<uint64>(cstA) - static_cast<uint64>(cstB)); in MayOverflow()
49 auto rightShiftNumToGetSignFlag = (is64Bit ? 64 : 32) - 1; in MayOverflow()
59 uint32 baseID = toBeReplaced->GetDefInsnInfo()->GetInsn()->GetId(); in IsInLimitCopyRange()
60 MapleUnorderedMap<uint32, DUInsnInfo *> &useList = toBeReplaced->GetAllUseInsns(); in IsInLimitCopyRange()
62 if (it.second->GetInsn()->GetId() - baseID > k16BitSize) { in IsInLimitCopyRange()
87 … if (curInsn->GetMachineOpcode() == MOP_wmovri32 || curInsn->GetMachineOpcode() == MOP_xmovri64) { in DoOpt()
88 Operand &destOpnd = curInsn->GetOperand(kInsnFirstOpnd); in DoOpt()
92 VRegVersion *destVersion = ssaInfo->FindSSAVersion(destReg.GetRegisterNumber()); in DoOpt()
[all …]
Daarch64_peep.cpp7 * http://www.apache.org/licenses/LICENSE-2.0
74 return regOpnd->GetRegisterNumber() == RZR; in IsZeroRegister()
124 if (!insn->IsMachineInstruction()) { in Run()
142 manager = peepMemPool->New<PeepOptimizeManager>(*cgFunc, bb, insn, *ssaInfo); in DoSSAOptimize()
143 manager->SetOptSuccess(false); in DoSSAOptimize()
147 manager->Optimize<MvnAndToBicPattern>(true); in DoSSAOptimize()
152 manager->Optimize<OrrToMovPattern>(true); in DoSSAOptimize()
159 manager->Optimize<AndCbzToTbzPattern>(true); in DoSSAOptimize()
160 manager->Optimize<CsetCbzToBeqPattern>(true); in DoSSAOptimize()
161 manager->Optimize<OneHoleBranchPattern>(true); in DoSSAOptimize()
[all …]
Daarch64_cgfunc.cpp7 * http://www.apache.org/licenses/LICENSE-2.0
112 /* __builtin_ffs(x) returns: 0 -> 0, 1 -> 1, 2 -> 2, 4 -> 3, 8 -> 4 */ in PickLdStInsn()
125 DEBUG_ASSERT((bitSize & (bitSize - 1)) == 0, "bitlen error"); in PickLdStInsn()
128 /* __builtin_ffs(x) returns: 8 -> 4, 16 -> 5, 32 -> 6, 64 -> 7 */ in PickLdStInsn()
132 uint32 size = static_cast<uint32>(__builtin_ffs(static_cast<int32>(bitSize))) - k4BitSize; in PickLdStInsn()
143 /* __builtin_ffs(x) returns: 32 -> 6, 64 -> 7, 128 -> 8 */ in PickLdStInsn()
144 uint32 size = static_cast<uint32>(__builtin_ffs(static_cast<int32>(bitSize))) - k6BitSize; in PickLdStInsn()
155 if (dest->GetOpCode() == OP_regread) { in IsBlkassignForPush()
157 if (-node.GetRegIdx() == kSregSp) { in IsBlkassignForPush()
175 MemDefUsePart &memDefUsePart = memRefTable->GetMemDefUsePart(); in SetMemReferenceOfInsn()
[all …]
/arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/
Dcodegen.cpp2 * Copyright (c) 2021-2024 Huawei Device Co., Ltd.
7 * http://www.apache.org/licenses/LICENSE-2.0
17 Codegen Hi-Level implementation
25 #include "ir-dyn-base-types.h"
42 auto &la = codegen->GetGraph()->GetAnalysis<LivenessAnalyzer>(); in FixIntervals()
44 auto inst = li->GetInst(); in FixIntervals()
45 auto location = li->GetLocation(); in FixIntervals()
47 const auto &ssInputs = saveState_->GetInputs(); in FixIntervals()
53 switch (inst->GetOpcode()) { in FixIntervals()
55 … auto klass = reinterpret_cast<uintptr_t>(inst->CastToLoadAndInitClass()->GetClass()); in FixIntervals()
[all …]

12