Home
last modified time | relevance | path

Searched +full:rcar +full:- +full:gen3 +full:- +full:drif (Results 1 – 15 of 15) sorted by relevance

/kernel/linux/linux-6.6/Documentation/devicetree/bindings/media/
Drenesas,drif.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/media/renesas,drif.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car Gen3 Digital Radio Interface Controller (DRIF)
10 - Ramesh Shanmugasundaram <rashanmu@gmail.com>
11 - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
14 R-Car Gen3 DRIF is a SPI like receive only slave device. A general
15 representation of DRIF interfacing with a master device is shown below.
17 +---------------------+ +---------------------+
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/
Drenesas,drif.txt1 Renesas R-Car Gen3 Digital Radio Interface controller (DRIF)
2 ------------------------------------------------------------
4 R-Car Gen3 DRIF is a SPI like receive only slave device. A general
5 representation of DRIF interfacing with a master device is shown below.
7 +---------------------+ +---------------------+
8 | |-----SCK------->|CLK |
9 | Master |-----SS-------->|SYNC DRIFn (slave) |
10 | |-----SD0------->|D0 |
11 | |-----SD1------->|D1 |
12 +---------------------+ +---------------------+
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/renesas/
Dr8a77990.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a77990-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
34 compatible = "fixed-clock";
35 #clock-cells = <0>;
[all …]
Dr8a77960.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
8 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a7796-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
[all …]
Dr8a77951.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car H3 (R8A77951) SoC
8 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a7795-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
38 clock-frequency = <0>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/renesas/
Dr8a77990.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a77990-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
23 compatible = "fixed-clock";
24 #clock-cells = <0>;
[all …]
Dr8a77965.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC
11 #include <dt-bindings/clock/r8a77965-cpg-mssr.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/r8a77965-sysc.h>
21 #address-cells = <2>;
22 #size-cells = <2>;
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <0>;
[all …]
Dr8a77960.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
8 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a7796-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
[all …]
Dr8a77951.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car H3 (R8A77951) SoC
8 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a7795-sysc.h>
21 #address-cells = <2>;
22 #size-cells = <2>;
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <0>;
[all …]
/kernel/linux/linux-6.6/drivers/media/platform/renesas/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
18 tristate "R-Car Image Signal Processor (ISP)"
27 Support for Renesas R-Car Image Signal Processor (ISP).
28 Enable this to support the Renesas R-Car Image Signal
32 module will be called rcar-isp.
43 source "drivers/media/platform/renesas/rcar-vin/Kconfig"
44 source "drivers/media/platform/renesas/rzg2l-cru/Kconfig"
56 Renesas R-Car Gen3 and RZ/G2 SoCs. It handles memory access for
60 will be called rcar-fcp.
72 providing colour space conversion, and de-interlacing features.
[all …]
Drcar_drif.c1 // SPDX-License-Identifier: GPL-2.0+
3 * R-Car Gen3 Digital Radio Interface (DRIF) driver
9 * The R-Car DRIF is a receive only MSIOF like controller with an
11 * then this driver uses the SYS-DMAC engine to move the data from
14 * Each DRIF channel DRIFx (as per datasheet) contains two internal
21 * Depending on the master device, a DRIF channel can use
29 * framework. This driver expects a tuner driver (sub-device) to bind
31 * a V4L2 compliant SDR device. The DRIF driver is independent of the
34 * The DRIF h/w can support I2S mode and Frame start synchronization pulse mode.
36 * suitable master devices. Hence, not all configurable options of DRIF h/w
[all …]
/kernel/linux/linux-5.10/drivers/media/platform/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
9 Say Y here to enable support for platform-specific V4L drivers.
13 source "drivers/media/platform/marvell-ccic/Kconfig"
22 Chrome9 chipsets. Currently only tested on OLPC xo-1.5 systems
125 will be called s3c-camif.
139 will be called stm32-dcmi.
150 source "drivers/media/platform/exynos4-is/Kconfig"
153 source "drivers/media/platform/rcar-vin/Kconfig"
174 bool "Memory-to-memory multimedia devices"
185 tristate "Chips&Media Coda multi-standard codec IP"
[all …]
Drcar_drif.c1 // SPDX-License-Identifier: GPL-2.0+
3 * R-Car Gen3 Digital Radio Interface (DRIF) driver
14 * The R-Car DRIF is a receive only MSIOF like controller with an
16 * then this driver uses the SYS-DMAC engine to move the data from
19 * Each DRIF channel DRIFx (as per datasheet) contains two internal
26 * Depending on the master device, a DRIF channel can use
34 * framework. This driver expects a tuner driver (sub-device) to bind
36 * a V4L2 compliant SDR device. The DRIF driver is independent of the
39 * The DRIF h/w can support I2S mode and Frame start synchronization pulse mode.
41 * suitable master devices. Hence, not all configurable options of DRIF h/w
[all …]
/kernel/linux/linux-5.10/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
[all …]
/kernel/linux/linux-6.6/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
[all …]