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7 2: Wake to enter hibernation when the battery reaches a12 either the wakeup timer expires or the battery reaches a
21 * timer reaches 0. When @coalescing_init=057 * microseconds. When this value reaches 061 * reaches 0 the pending interrupt will be
43 * The pages are put when the count reaches zero.96 * The address are un-mapped when the count reaches zero.
44 * refcount reaches 0.71 * refcount reaches 0.
128 * UART1_TX_TRESHOLD: UART1 TX reaches threshold.129 * UART1_RX_TRESHOLD: UART1 RX reaches threshold.133 * UART2_TX_TRESHOLD: UART2 TX reaches threshold.134 * UART2_RX_TRESHOLD: UART2 RX reaches threshold.175 * UART1_TX_TRESHOLD: UART1 TX reaches threshold.176 * UART1_RX_TRESHOLD: UART1 RX reaches threshold.180 * UART2_TX_TRESHOLD: UART2 TX reaches threshold.181 * UART2_RX_TRESHOLD: UART2 RX reaches threshold.
99 * tree is immutable until @usage reaches zero.111 * landlock_put_ruleset_deferred() when @usage reaches zero.
115 stop parsing as soon as it reaches IPv6 flow label; used by118 parsing as soon as it reaches encapsulated headers; used by routing
10 when the counter reaches preset counter values.
10 counter reaches preset counter values.
20 #define ARC_TIMER_CTRL_IE (1 << 0) /* Interrupt when Count reaches limit */
20 #define TIMER_CTRL_IE (1 << 0) /* Interrupt when Count reaches limit */
38 * The pages are put when the count reaches zero.72 * The address are un-mapped when the count reaches zero.
26 * When a counter reaches the value in the corresponding limit register,
283 "BriefDescription": "At least one entry in read queue reaches the visible window limit.",290 "BriefDescription": "At least one entry in write queue reaches the visible window limit.",
31 * Increment ptr by 1. If it reaches the number of completion queue47 * Increment ptr by 1. If it reaches the number of event queue
16 * ceph_put_snap_context(). When the reference count reaches zero
25 Generates a signal to the PMC when the temperature reaches dangerously high