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/arkcompiler/ets_frontend/es2panda/test/compiler/debugInfo/
Dtest-for-loop-expected.txt16 "regs": [
32 "regs": [
48 "regs": [
64 "regs": [],
79 "regs": [
94 "regs": [],
107 "regs": [
122 "regs": [
137 "regs": [],
152 "regs": [
[all …]
Dtest-local-variable-expected.txt16 "regs": [
32 "regs": [
48 "regs": [
64 "regs": [],
79 "regs": [],
96 "regs": [],
111 "regs": [
126 "regs": [],
141 "regs": [],
156 "regs": [
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/arkcompiler/runtime_core/static_core/runtime/interpreter/
Dstate.h109 return BytecodeInstruction(arch::regs::GetPc()); in GetInst()
114 arch::regs::SetPc(inst.GetAddress()); in SetInst()
119 return arch::regs::GetFrame(); in GetFrame()
124 arch::regs::SetFrame(frame); in SetFrame()
125 arch::regs::SetMirrorFp( in SetFrame()
131 return arch::regs::GetDispatchTable(); in GetDispatchTable()
136 return arch::regs::SetDispatchTable(dispatchTable); in SetDispatchTable()
141 return arch::regs::GetThread(); in GetThread()
146 arch::regs::SetThread(thread); in SetThread()
153 fpSpill_ = arch::regs::GetFp(); in SaveState()
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/arkcompiler/runtime_core/static_core/runtime/tests/
Ddebugger_test.cpp86 static void SetVRegs(Frame *frame, std::vector<VRegValue> &regs) in SetVRegs() argument
89 for (size_t i = 0; i < regs.size(); i++) { in SetVRegs()
90 if (regs[i].isRef) { in SetVRegs()
91 frameHandler.GetVReg(i).SetReference(ToPtr(regs[i].value)); in SetVRegs()
93 frameHandler.GetVReg(i).SetPrimitive(static_cast<int64_t>(regs[i].value)); in SetVRegs()
106 static void CheckFrame(Frame *frame, std::vector<VRegValue> &regs, const MethodInfo &methodInfo) in CheckFrame() argument
108 SetVRegs(frame, regs); in CheckFrame()
127 EXPECT_EQ(debugFrame.GetVReg(i), regs[i].value); in CheckFrame()
128 … EXPECT_EQ(debugFrame.GetVRegKind(i), regs[i].isRef ? tooling::PtFrame::RegisterKind::REFERENCE in CheckFrame()
133 EXPECT_EQ(debugFrame.GetArgument(i), regs[i + nregs].value); in CheckFrame()
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/arkcompiler/ets_frontend/es2panda/compiler/core/
DregAllocator.cpp78 std::array<VReg *, IRNode::MAX_REG_OPERAND> regs {}; in Run() local
79 auto regCnt = ins->Registers(&regs); in Run()
84 auto registers = Span<VReg *>(regs.data(), regs.data() + regCnt); in Run()
97 std::array<VReg *, IRNode::MAX_REG_OPERAND> regs {}; in Run() local
98 auto regCnt = ins->Registers(&regs); in Run()
100 auto registers = Span<VReg *>(regs.data(), regs.data() + regCnt); in Run()
118 throw Error(ErrorType::GENERIC, "Can't adjust spill insns when regs run out"); in AdjustInsRegWhenHasSpill()
126 std::array<VReg *, IRNode::MAX_REG_OPERAND> regs {}; in AdjustInsRegWhenHasSpill() local
127 auto regCnt = ins->Registers(&regs); in AdjustInsRegWhenHasSpill()
133 auto registers = Span<VReg *>(regs.data(), regs.data() + regCnt); in AdjustInsRegWhenHasSpill()
/arkcompiler/runtime_core/static_core/compiler/tests/aarch64/
Dregister64_test.cpp64 std::vector<Reg> regs; in TEST_F() local
66 regs.push_back(encoder.AcquireScratchRegister(INT64_TYPE)); in TEST_F()
70 for (auto reg : regs) { in TEST_F()
75 regs.clear(); in TEST_F()
77 regs.push_back(encoder.AcquireScratchRegister(floatType)); in TEST_F()
82 for (auto reg : regs) { in TEST_F()
/arkcompiler/runtime_core/compiler/tests/aarch64/
Dregister64_test.cpp67 std::vector<Reg> regs; in TEST_F() local
69 regs.push_back(encoder.AcquireScratchRegister(INT64_TYPE)); in TEST_F()
73 for (auto reg : regs) { in TEST_F()
78 regs.clear(); in TEST_F()
80 regs.push_back(encoder.AcquireScratchRegister(FloatType)); in TEST_F()
85 for (auto reg : regs) { in TEST_F()
/arkcompiler/runtime_core/compiler/tests/amd64/
Dregister64_test.cpp70 std::vector<Reg> regs; in TEST_F() local
72 regs.push_back(encoder.AcquireScratchRegister(INT64_TYPE)); in TEST_F()
76 for (auto reg : regs) { in TEST_F()
81 regs.clear(); in TEST_F()
83 regs.push_back(encoder.AcquireScratchRegister(FloatType)); in TEST_F()
88 for (auto reg : regs) { in TEST_F()
/arkcompiler/runtime_core/static_core/compiler/tests/aarch32/
Dregister32_test.cpp67 std::vector<Reg> regs; in TEST_F() local
69 regs.push_back(encoder.AcquireScratchRegister(INT64_TYPE)); in TEST_F()
73 for (auto reg : regs) { in TEST_F()
78 regs.clear(); in TEST_F()
80 regs.push_back(encoder.AcquireScratchRegister(floatType)); in TEST_F()
85 for (auto reg : regs) { in TEST_F()
/arkcompiler/runtime_core/static_core/compiler/tests/amd64/
Dregister64_test.cpp67 std::vector<Reg> regs; in TEST_F() local
69 regs.push_back(encoder.AcquireScratchRegister(INT64_TYPE)); in TEST_F()
73 for (auto reg : regs) { in TEST_F()
78 regs.clear(); in TEST_F()
80 regs.push_back(encoder.AcquireScratchRegister(floatType)); in TEST_F()
85 for (auto reg : regs) { in TEST_F()
/arkcompiler/ets_frontend/ets2panda/compiler/templates/
Disa.h.erb49 size_t Registers([[maybe_unused]] std::array<VReg*, MAX_REG_OPERAND>* regs) override
54 size_t Registers([[maybe_unused]] std::array<const VReg*, MAX_REG_OPERAND>* regs) const override
59 size_t OutRegisters([[maybe_unused]] std::array<OutVReg, MAX_REG_OPERAND>* regs) const override
143 size_t Registers([[maybe_unused]] std::array<VReg*, MAX_REG_OPERAND>* regs) override
147 (*regs)[<%= reg_cnt %>] = &<%= reg %>;
153 size_t Registers([[maybe_unused]] std::array<const VReg*, MAX_REG_OPERAND>* regs) const override
157 (*regs)[<%= reg_cnt %>] = &<%= reg %>;
163 size_t OutRegisters([[maybe_unused]] std::array<OutVReg, MAX_REG_OPERAND>* regs) const override
175 (*regs)[<%= reg_cnt %>] = {&<%= reg %>, OperandType::<%= type_to_enum(type) %>};
177 (*regs)[<%= reg_cnt %>] = {nullptr, OperandType::NONE};
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/arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/target/aarch32/
Dcallconv.cpp119 uint8_t Aarch32CallingConvention::PushRegs(RegMask regs, VRegMask vregs, bool isCallee) in PushRegs() argument
123 if (regs.test(fp)) { in PushRegs()
124 regs.reset(fp); in PushRegs()
127 if (regs.test(lr)) { in PushRegs()
128 regs.reset(lr); in PushRegs()
134 for (size_t i = 0; i < regs.size(); ++i) { in PushRegs()
135 if (regs.test(i)) { in PushRegs()
141 if (((regs.count() + vregs.count()) & 1U) == 1) { in PushRegs()
157 uint8_t Aarch32CallingConvention::PopRegs(RegMask regs, VRegMask vregs, bool isCallee) in PopRegs() argument
162 if (regs.test(fp)) { in PopRegs()
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/arkcompiler/runtime_core/compiler/tests/aarch32/
Dregister32_test.cpp70 std::vector<Reg> regs; in TEST_F() local
72 regs.push_back(encoder.AcquireScratchRegister(INT64_TYPE)); in TEST_F()
76 for (auto reg : regs) { in TEST_F()
81 regs.clear(); in TEST_F()
83 regs.push_back(encoder.AcquireScratchRegister(FloatType)); in TEST_F()
88 for (auto reg : regs) { in TEST_F()
/arkcompiler/ets_runtime/ecmascript/platform/unix/ohos/
Dbacktrace.cpp51 static inline ARK_INLINE void GetPcFpRegs([[maybe_unused]] void *regs) in GetPcFpRegs() argument
57 : [base] "+r"(regs) in GetPcFpRegs()
66 uintptr_t regs[2] = {0}; // 2: pc and fp reg in GetPcs() local
67 GetPcFpRegs(regs); in GetPcs()
68 uintptr_t pc = regs[0]; in GetPcs()
69 uintptr_t fp = regs[1]; in GetPcs()
/arkcompiler/ets_frontend/ets2panda/compiler/core/
DregAllocator.cpp148 std::array<VReg *, IRNode::MAX_REG_OPERAND> regs {}; in Run() local
149 const auto regCnt = ins->Registers(&regs); in Run()
151 …Span<VReg *>(regs.data(), regs.data() + (spillMax == std::numeric_limits<int32_t>::max() ? regCnt … in Run()
217 std::array<VReg *, IRNode::MAX_REG_OPERAND> regs {}; in Run() local
218 const auto regCnt = ins->Registers(&regs); in Run()
219 const auto registers = Span<VReg *>(regs.data(), regs.data() + regCnt); in Run()
/arkcompiler/runtime_core/disassembler/templates/
Dbc_ins_to_pandasm_ins.cpp.erb49 ins.regs.push_back(bc_ins.GetVReg(<%=reg_count%>));
80 overhead = ins.regs.size() - pda.GetNumArgs();
82 overhead = ins.regs.size() - pda.GetNumArgs() - 1;
84 if (overhead < 0 || overhead > static_cast<int>(ins.regs.size())) {
95 ins.regs.pop_back();
/arkcompiler/runtime_core/abc2program/common/
Dabc_inst_convert.cpp.erb52 ins.regs.push_back(bc_ins.GetVReg(<%=reg_count%>));
83 overhead = ins.regs.size() - pda.GetNumArgs();
85 overhead = ins.regs.size() - pda.GetNumArgs() - 1;
87 if (overhead < 0 || overhead > static_cast<int>(ins.regs.size())) {
98 ins.regs.pop_back();
/arkcompiler/runtime_core/assembler/
Dassembly-ins.cpp24 for (const auto &reg : this->regs) { in RegsToString()
89 if (idx >= regs.size()) { in RegToString()
101 if (print_args && regs[idx] >= first_arg_idx) { in RegToString()
102 translator << "a" << regs[idx] - first_arg_idx; in RegToString()
104 translator << "v" << regs[idx]; in RegToString()
/arkcompiler/runtime_core/static_core/assembler/
Dassembly-ins.cpp24 for (const auto &reg : this->regs) { in RegsToString()
88 if (idx >= regs.size()) { in RegToString()
100 if (printArgs && regs[idx] >= firstArgIdx) { in RegToString()
101 translator << "a" << regs[idx] - firstArgIdx; in RegToString()
103 translator << "v" << regs[idx]; in RegToString()
/arkcompiler/runtime_core/static_core/disassembler/templates/
Dbc_ins_to_pandasm_ins.cpp.erb46 ins.regs.emplace_back(bcIns.GetVReg(<%=reg_count%>));
86 overhead = ins.regs.size() - pda.GetNumArgs();
88 overhead = ins.regs.size() - pda.GetNumArgs() - 1;
94 if (overhead < 0 || overhead > static_cast<int>(ins.regs.size())) {
105 ins.regs.pop_back();
/arkcompiler/ets_frontend/merge_abc/src/
DassemblyInsProto.cpp22 for (const auto &reg : insn.regs) { in Serialize()
50 insn.regs.reserve(protoInsn.regs_size()); in Deserialize()
51 for (const auto &protoReg : protoInsn.regs()) { in Deserialize()
52 insn.regs.push_back(static_cast<uint16_t>(protoReg)); in Deserialize()
/arkcompiler/runtime_core/static_core/assembler/templates/
Dins_emit.h.erb50 % def operands(insn, regs = "regs")
56 % ops << "#{regs}[#{nr}]"
135 if (regs.size() < <%= regs_num %>) {
141 if (regs.size() < <%= regs_num %> || imms.size() < <%= imms_num %>) {
145 if (regs.size() < <%= regs_num %>) {
155 auto registers = regs;
/arkcompiler/runtime_core/assembler/templates/
Dins_emit.h.erb46 % def operands(insn, regs = "regs")
54 % ops << "#{regs}[#{nr}]"
140 if (regs.size() < <%= regs_num %>) {
146 if (regs.size() < <%= regs_num %> || imms.size() < <%= imms_num %>) {
150 if (regs.size() < <%= regs_num %>) {
160 auto registers = regs;
Disa.h.erb45 % regs = insn.operands.select(&:reg?)
46 % dst_idx = regs.index(&:dst?) || 'INVALID_REG_IDX'
47 % use_idxs = regs.size.times.select { |idx| regs[idx].src? } || []
/arkcompiler/runtime_core/static_core/runtime/bridge/arch/aarch64/
Dinterpreter_to_compiled_code_bridge_aarch64.S75 // determine whether there are free float regs
79 // there are free float regs
83 2: // there are no free regs. It is a stack arg
140 // As long as we always reserve space for all GP regs we can skip
144 // To speed up bridge execution we always reserve space for all 8 GP regs (and 8 FP regs).
155 cinc w4, w4, ls // inc FP regs counter if it's float
156 cinc w3, w3, hi // inc GP regs counter if it's not float
172 // reserve stack space for GP regs
213 // setup regs as follow
239 // setup regs as follow
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