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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/rockchip/
Drockchip-vop.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip SoC display controller (VOP)
10 VOP (Video Output Processor) is the display controller for the Rockchip
15 - Sandy Huang <hjc@rock-chips.com>
16 - Heiko Stuebner <heiko@sntech.de>
21 - rockchip,px30-vop-big
22 - rockchip,px30-vop-lit
[all …]
Drockchip-drm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only)
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-drm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip DRM master device
10 - Sandy Huang <hjc@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
14 The Rockchip DRM master device is a virtual device needed to list all
15 vop devices or other display interface nodes that comprise the
20 const: rockchip,display-subsystem
[all …]
Drockchip-lvds.txt1 Rockchip RK3288 LVDS interface
5 - compatible: matching the soc type, one of
6 - "rockchip,rk3288-lvds";
7 - "rockchip,px30-lvds";
9 - reg: physical base address of the controller and length
11 - clocks: must include clock specifiers corresponding to entries in the
12 clock-names property.
13 - clock-names: must contain "pclk_lvds"
15 - avdd1v0-supply: regulator phandle for 1.0V analog power
16 - avdd1v8-supply: regulator phandle for 1.8V analog power
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/rockchip/
Drockchip-vop.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip SoC display controller (VOP)
10 VOP (Video Output Processor) is the display controller for the Rockchip
15 - Sandy Huang <hjc@rock-chips.com>
16 - Heiko Stuebner <heiko@sntech.de>
21 - rockchip,px30-vop-big
22 - rockchip,px30-vop-lit
[all …]
Drockchip-vop2.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip SoC display controller (VOP2)
10 VOP2 (Video Output Processor v2) is the display controller for the Rockchip
15 - Sandy Huang <hjc@rock-chips.com>
16 - Heiko Stuebner <heiko@sntech.de>
21 - rockchip,rk3566-vop
22 - rockchip,rk3568-vop
[all …]
Drockchip-drm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only)
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-drm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip DRM master device
10 - Sandy Huang <hjc@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
14 The Rockchip DRM master device is a virtual device needed to list all
15 vop devices or other display interface nodes that comprise the
20 const: rockchip,display-subsystem
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pwm/
Dpwm-rockchip.txt1 Rockchip PWM controller
4 - compatible: should be "rockchip,<name>-pwm"
5 "rockchip,rk2928-pwm": found on RK29XX,RK3066 and RK3188 SoCs
6 "rockchip,rk3288-pwm": found on RK3288 SOC
7 "rockchip,rv1108-pwm", "rockchip,rk3288-pwm": found on RV1108 SoC
8 "rockchip,vop-pwm": found integrated in VOP on RK3288 SoC
9 - reg: physical base address and length of the controller's registers
10 - clocks: See ../clock/clock-bindings.txt
11 - For older hardware (rk2928, rk3066, rk3188, rk3228, rk3288, rk3399):
12 - There is one clock that's used both to derive the functional clock
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/rockchip/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "DRM Support for Rockchip"
16 Choose this option if you have a Rockchip soc chipset.
25 bool "Rockchip VOP driver"
28 This selects support for the VOP driver. You should enable it
32 bool "Rockchip VOP2 driver"
38 bool "Rockchip specific extensions for Analogix DP driver"
43 This selects support for Rockchip SoC specific extensions
48 bool "Rockchip cdn DP"
53 This selects support for Rockchip SoC specific extensions
[all …]
Danalogix_dp-rockchip.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Rockchip SoC DP (Display Port) interface driver.
5 * Copyright (C) Fuzhou Rockchip Electronics Co., Ltd.
6 * Author: Andy Yan <andy.yan@rock-chips.com>
7 * Yakir Yang <ykk@rock-chips.com>
8 * Jeff Chen <jeff.chen@rock-chips.com>
45 * struct rockchip_dp_chip_data - splite the grf setting of kind of chips
47 * @lcdsel_big: reg value of selecting vop big for eDP
48 * @lcdsel_lit: reg value of selecting vop little for eDP
89 reset_control_assert(dp->rst); in rockchip_dp_pre_init()
[all …]
Drockchip_vop_reg.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
4 * Author:Mark Yao <mark.yao@rock-chips.com>
460 * hs_start interrupt fires at frame-start, so serves
567 * hs_start interrupt fires at frame-start, so serves
963 * rk3399 vop big windows register layout is same as rk3288, but we
1124 { .compatible = "rockchip,rk3036-vop",
1126 { .compatible = "rockchip,rk3126-vop",
1128 { .compatible = "rockchip,px30-vop-big",
1130 { .compatible = "rockchip,px30-vop-lit",
[all …]
Drockchip_vop2_reg.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) Rockchip Electronics Co.Ltd
4 * Author: Andy Yan <andy.yan@rock-chips.com>
126 * rk3568 vop with 2 cluster, 2 esmart win, 2 smart win.
130 * Every esmart win and smart win support 4 Multi-region.
136 * * nearest-neighbor/bilinear/bicubic for scale up
137 * * nearest-neighbor/bilinear/average for scale down
140 * @TODO describe the wind like cpu-map dt nodes;
144 .name = "Smart0-win0",
157 .name = "Smart1-win0",
[all …]
Drockchip_lvds.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
5 * Mark Yao <mark.yao@rock-chips.com>
6 * Sandy Huang <hjc@rock-chips.com>
40 * struct rockchip_lvds_soc_data - rockchip lvds Soc private data
81 writel_relaxed(val, lvds->regs + offset); in rk3288_writel()
82 if (lvds->output == DISPLAY_OUTPUT_LVDS) in rk3288_writel()
84 writel_relaxed(val, lvds->regs + offset + RK3288_LVDS_CH1_OFFSET); in rk3288_writel()
89 if (strncmp(s, "jeida-18", 8) == 0) in rockchip_lvds_name_to_format()
91 else if (strncmp(s, "jeida-24", 8) == 0) in rockchip_lvds_name_to_format()
[all …]
Drockchip_drm_drv.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
4 * Author:Mark Yao <mark.yao@rock-chips.com>
9 #include <linux/dma-mapping.h>
28 #include <asm/dma-iommu.h>
39 #define DRIVER_NAME "rockchip"
40 #define DRIVER_DESC "RockChip Soc DRM"
55 struct rockchip_drm_private *private = drm_dev->dev_private; in rockchip_drm_dma_attach_device()
58 if (!private->domain) in rockchip_drm_dma_attach_device()
70 ret = iommu_attach_device(private->domain, dev); in rockchip_drm_dma_attach_device()
[all …]
/kernel/linux/patches/linux-5.10/yangfan_patch/
Ddrivers.patch1 diff --git a/drivers/Makefile b/drivers/Makefile
3 --- a/drivers/Makefile
5 @@ -6,6 +6,8 @@
6 # Rewritten to use lists instead of if-statements.
11 obj-y += irqchip/
12 obj-y += bus/
14 diff --git a/drivers/block/nbd.c b/drivers/block/nbd.c
16 --- a/drivers/block/nbd.c
18 @@ -2398,12 +2398,6 @@ static int nbd_genl_status(struct sk_buff *skb, struct genl_info *info)
22 - if (!dev_list) {
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/rockchip/
Drk3566.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 compatible = "rockchip,rk3566";
10 compatible = "rockchip,rk3566-pipe-grf", "syscon";
14 power-domain@RK3568_PD_PIPE {
22 #power-domain-cells = <0>;
28 phy-names = "usb2-phy";
30 maximum-speed = "high-speed";
33 &vop {
34 compatible = "rockchip,rk3566-vop";
Drk3568.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
9 compatible = "rockchip,rk3568";
12 compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
16 clock-names = "sata", "pmalive", "rxoob";
19 phy-names = "sata-phy";
20 ports-implemented = <0x1>;
21 power-domains = <&power RK3568_PD_PIPE>;
26 compatible = "rockchip,rk3568-pipe-phy-grf", "syscon";
31 compatible = "rockchip,rk3568-qos", "syscon";
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/rockchip/
Danalogix_dp-rockchip.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Rockchip SoC DP (Display Port) interface driver.
5 * Copyright (C) Fuzhou Rockchip Electronics Co., Ltd.
6 * Author: Andy Yan <andy.yan@rock-chips.com>
7 * Yakir Yang <ykk@rock-chips.com>
8 * Jeff Chen <jeff.chen@rock-chips.com>
46 * struct rockchip_dp_chip_data - splite the grf setting of kind of chips
48 * @lcdsel_big: reg value of selecting vop big for eDP
49 * @lcdsel_lit: reg value of selecting vop little for eDP
78 reset_control_assert(dp->rst); in rockchip_dp_pre_init()
[all …]
Drockchip_vop_reg.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
4 * Author:Mark Yao <mark.yao@rock-chips.com>
426 * hs_start interrupt fires at frame-start, so serves
525 * hs_start interrupt fires at frame-start, so serves
891 * rk3399 vop big windows register layout is same as rk3288, but we
1046 { .compatible = "rockchip,rk3036-vop",
1048 { .compatible = "rockchip,rk3126-vop",
1050 { .compatible = "rockchip,px30-vop-big",
1052 { .compatible = "rockchip,px30-vop-lit",
[all …]
Drockchip_lvds.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
5 * Mark Yao <mark.yao@rock-chips.com>
6 * Sandy Huang <hjc@rock-chips.com>
45 * rockchip_lvds_soc_data - rockchip lvds Soc private data
74 writel_relaxed(val, lvds->regs + offset); in rk3288_writel()
75 if (lvds->output == DISPLAY_OUTPUT_LVDS) in rk3288_writel()
77 writel_relaxed(val, lvds->regs + offset + RK3288_LVDS_CH1_OFFSET); in rk3288_writel()
82 if (strncmp(s, "jeida-18", 8) == 0) in rockchip_lvds_name_to_format()
84 else if (strncmp(s, "jeida-24", 8) == 0) in rockchip_lvds_name_to_format()
[all …]
Drockchip_drm_drv.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
4 * Author:Mark Yao <mark.yao@rock-chips.com>
9 #include <linux/dma-mapping.h>
10 #include <linux/dma-iommu.h>
31 #define DRIVER_NAME "rockchip"
32 #define DRIVER_DESC "RockChip Soc DRM"
48 struct rockchip_drm_private *private = drm_dev->dev_private; in rockchip_drm_dma_attach_device()
54 ret = iommu_attach_device(private->domain, dev); in rockchip_drm_dma_attach_device()
66 struct rockchip_drm_private *private = drm_dev->dev_private; in rockchip_drm_dma_detach_device()
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Drk3188.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
9 #include <dt-bindings/clock/rk3188-cru.h>
10 #include <dt-bindings/power/rk3188-power.h>
14 compatible = "rockchip,rk3188";
17 #address-cells = <1>;
18 #size-cells = <0>;
19 enable-method = "rockchip,rk3066-smp";
23 compatible = "arm,cortex-a9";
[all …]
Drk3066a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
9 #include <dt-bindings/clock/rk3066a-cru.h>
10 #include <dt-bindings/power/rk3066-power.h>
14 compatible = "rockchip,rk3066a";
17 #address-cells = <1>;
18 #size-cells = <0>;
19 enable-method = "rockchip,rk3066-smp";
23 compatible = "arm,cortex-a9";
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pwm/
Dpwm-rockchip.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pwm/pwm-rockchip.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip PWM controller
10 - Heiko Stuebner <heiko@sntech.de>
15 - const: rockchip,rk2928-pwm
16 - const: rockchip,rk3288-pwm
17 - const: rockchip,rk3328-pwm
18 - const: rockchip,vop-pwm
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/rockchip/
Drk3188.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
9 #include <dt-bindings/clock/rk3188-cru.h>
10 #include <dt-bindings/power/rk3188-power.h>
14 compatible = "rockchip,rk3188";
17 #address-cells = <1>;
18 #size-cells = <0>;
19 enable-method = "rockchip,rk3066-smp";
23 compatible = "arm,cortex-a9";
[all …]
Drk3066a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
9 #include <dt-bindings/clock/rk3066a-cru.h>
10 #include <dt-bindings/power/rk3066-power.h>
14 compatible = "rockchip,rk3066a";
17 #address-cells = <1>;
18 #size-cells = <0>;
19 enable-method = "rockchip,rk3066-smp";
23 compatible = "arm,cortex-a9";
[all …]

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