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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/msm/
Dqcom,sdm845-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sdm845-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SDM845 Display MDSS
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
13 Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
15 bindings of MDSS are mentioned for SDM845 target.
17 $ref: /schemas/display/msm/mdss-common.yaml#
[all …]
Ddsi-controller-main.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
15 - items:
16 - enum:
17 - qcom,apq8064-dsi-ctrl
18 - qcom,msm8226-dsi-ctrl
19 - qcom,msm8916-dsi-ctrl
[all …]
Dqcom,sdm845-dpu.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sdm845-dpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DPU on SDM845
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
12 $ref: /schemas/display/msm/dpu-common.yaml#
16 const: qcom,sdm845-dpu
20 - description: Address offset and size for mdp register set
21 - description: Address offset and size for vbif register set
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Dqcom,sc7180-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sc7180-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SC7180 Display MDSS
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
13 Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
15 bindings of MDSS are mentioned for SC7180 target.
17 $ref: /schemas/display/msm/mdss-common.yaml#
[all …]
Ddp-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dp-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kuogee Hsieh <quic_khsieh@quicinc.com>
19 - enum:
20 - qcom,sc7180-dp
21 - qcom,sc7280-dp
22 - qcom,sc7280-edp
23 - qcom,sc8180x-dp
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/msm/
Ddpu.txt5 Device tree bindings for MSM Mobile Display Subsytem(MDSS) that encapsulates
6 sub-blocks like DPU display controller, DSI and DP interfaces etc.
7 The DPU display controller is found in SDM845 SoC.
9 MDSS:
11 - compatible: "qcom,sdm845-mdss", "qcom,sc7180-mdss"
12 - reg: physical base address and length of contoller's registers.
13 - reg-names: register region names. The following region is required:
14 * "mdss"
15 - power-domains: a power domain consumer specifier according to
17 - clocks: list of clock specifiers for clocks needed by the device.
[all …]
/kernel/linux/linux-6.6/drivers/iommu/arm/arm-smmu/
Darm-smmu-qcom.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/adreno-smmu-priv.h>
12 #include "arm-smmu.h"
13 #include "arm-smmu-qcom.h"
15 #define QCOM_DUMMY_VAL -1
30 for (spin_cnt = TLB_SPIN_COUNT; spin_cnt > 0; spin_cnt--) { in qcom_smmu_tlb_sync()
53 if (qsmmu->stall_enabled & BIT(idx)) in qcom_adreno_smmu_write_sctlr()
63 struct arm_smmu_cfg *cfg = &smmu_domain->cfg; in qcom_adreno_smmu_get_fault_info()
64 struct arm_smmu_device *smmu = smmu_domain->smmu; in qcom_adreno_smmu_get_fault_info()
66 info->fsr = arm_smmu_cb_read(smmu, cfg->cbndx, ARM_SMMU_CB_FSR); in qcom_adreno_smmu_get_fault_info()
[all …]
/kernel/linux/linux-5.10/drivers/iommu/arm/arm-smmu/
Darm-smmu-qcom.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include "arm-smmu.h"
25 { .compatible = "qcom,mdss" },
26 { .compatible = "qcom,sc7180-mdss" },
27 { .compatible = "qcom,sc7180-mss-pil" },
28 { .compatible = "qcom,sdm845-mdss" },
29 { .compatible = "qcom,sdm845-mss-pil" },
48 if (smmu->num_mapping_groups > 128) { in qcom_smmu_cfg_probe()
49 dev_notice(smmu->dev, "\tLimiting the stream matching groups to 128\n"); in qcom_smmu_cfg_probe()
50 smmu->num_mapping_groups = 128; in qcom_smmu_cfg_probe()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/
Dmsm_mdss.c2 * SPDX-License-Identifier: GPL-2.0
53 path0 = of_icc_get(dev, "mdp0-mem"); in msm_mdss_parse_data_bus_icc_path()
57 msm_mdss->path[0] = path0; in msm_mdss_parse_data_bus_icc_path()
58 msm_mdss->num_paths = 1; in msm_mdss_parse_data_bus_icc_path()
60 path1 = of_icc_get(dev, "mdp1-mem"); in msm_mdss_parse_data_bus_icc_path()
62 msm_mdss->path[1] = path1; in msm_mdss_parse_data_bus_icc_path()
63 msm_mdss->num_paths++; in msm_mdss_parse_data_bus_icc_path()
74 for (i = 0; i < msm_mdss->num_paths; i++) in msm_mdss_put_icc_path()
75 icc_put(msm_mdss->path[i]); in msm_mdss_put_icc_path()
82 for (i = 0; i < msm_mdss->num_paths; i++) in msm_mdss_icc_request_bw()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/
Dmsm_drv.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
8 #include <linux/dma-mapping.h>
32 * - 1.0.0 - initial interface
33 * - 1.1.0 - adds madvise, and support for submits with > 4 cmd buffers
34 * - 1.2.0 - adds explicit fence support for submit ioctl
35 * - 1.3.0 - adds GMEM_BASE + NR_RINGS params, SUBMITQUEUE_NEW +
38 * - 1.4.0 - softpin, MSM_RELOC_BO_DUMP, and GEM_INFO support to set/get
40 * - 1.5.0 - Add SUBMITQUERY_QUERY ioctl
41 * - 1.6.0 - Syncobj support
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_catalog.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
37 #define DPU_HW_VER_400 DPU_HW_VER(4, 0, 0) /* sdm845 v1.0 */
38 #define DPU_HW_VER_401 DPU_HW_VER(4, 0, 1) /* sdm845 v2.0 */
77 * @DPU_MDP_BWC, MDSS HW supports Bandwidth compression.
94 * SSPP sub-blocks/features
101 * @DPU_SSPP_CSC_10BIT, Support of 10-bit Color space conversion
104 * @DPU_SSPP_QOS_8LVL, SSPP support 8-level QoS control
134 * MIXER sub-blocks/features
136 * @DPU_MIXER_SOURCESPLIT Layer mixer supports source-split configuration
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/
Dsdm845.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * SDM845 SoC device tree source
8 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
12 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sdm845.h>
15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
[all …]
Dsdm845-mtp.dts1 // SPDX-License-Identifier: GPL-2.0
3 * SDM845 MTP board device tree source
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include "sdm845.dtsi"
15 model = "Qualcomm Technologies, Inc. SDM845 MTP";
16 compatible = "qcom,sdm845-mtp", "qcom,sdm845";
23 stdout-path = "serial0:115200n8";
26 vph_pwr: vph-pwr-regulator {
[all …]
Dsdm845-db845c.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h>
13 #include "sdm845.dtsi"
19 compatible = "thundercomm,db845c", "qcom,sdm845";
27 stdout-path = "serial0:115200n8";
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dsdm845-xiaomi-beryllium-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
7 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
8 #include <dt-bindings/sound/qcom,q6afe.h>
9 #include <dt-bindings/sound/qcom,q6asm.h>
10 #include "sdm845.dtsi"
11 #include "sdm845-wcd9340.dtsi"
16 * Delete following upstream (sdm845.dtsi) reserved
[all …]
Dsdm845.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * SDM845 SoC device tree source
8 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
12 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sdm845.h>
15 #include <dt-bindings/dma/qcom-gpi.h>
[all …]
Dsdm845-mtp.dts1 // SPDX-License-Identifier: GPL-2.0
3 * SDM845 MTP board device tree source
8 /dts-v1/;
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include "sdm845.dtsi"
16 model = "Qualcomm Technologies, Inc. SDM845 MTP";
17 compatible = "qcom,sdm845-mtp", "qcom,sdm845";
18 chassis-type = "handset";
25 stdout-path = "serial0:115200n8";
28 vph_pwr: vph-pwr-regulator {
[all …]
Dsdm845-oneplus-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * SDM845 OnePlus 6(T) (enchilada / fajita) common device tree source
8 /dts-v1/;
10 #include <dt-bindings/input/linux-event-codes.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include <dt-bindings/sound/qcom,q6afe.h>
13 #include <dt-bindings/sound/qcom,q6asm.h>
15 #include "sdm845.dtsi"
16 #include "sdm845-wcd9340.dtsi"
20 /delete-node/ &rmtfs_mem;
[all …]
Dsdm845-shift-axolotl.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "sdm845.dtsi"
19 compatible = "shift,axolotl", "qcom,sdm845";
20 qcom,msm-id = <321 0x20001>;
21 qcom,board-id = <11 0>;
30 #address-cells = <2>;
[all …]
Dsdm845-xiaomi-polaris.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include <dt-bindings/input/linux-event-codes.h>
13 #include <dt-bindings/sound/qcom,q6afe.h>
14 #include <dt-bindings/sound/qcom,q6asm.h>
15 #include "sdm845.dtsi"
16 #include "sdm845-wcd9340.dtsi"
[all …]
Dsdm845-sony-xperia-tama.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9 #include "sdm845.dtsi"
15 qcom,msm-id = <321 0x20001>; /* SDM845 v2.1 */
16 qcom,board-id = <8 0>;
24 stdout-path = "serial0:115200n8";
27 gpio-keys {
28 compatible = "gpio-keys";
[all …]
Dsdm850-lenovo-yoga-c630.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include <dt-bindings/input/gpio-keys.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include <dt-bindings/sound/qcom,q6afe.h>
14 #include <dt-bindings/sound/qcom,q6asm.h>
16 #include "sdm845-wcd9340.dtsi"
20 * Update following upstream (sdm845.dtsi) reserved
24 /delete-node/ &ipa_fw_mem;
[all …]
Dsdm845-db845c.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h>
13 #include "sdm845.dtsi"
14 #include "sdm845-wcd9340.dtsi"
20 compatible = "thundercomm,db845c", "qcom,sdm845";
[all …]
Dsdm845-cheza.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
10 #include "sdm845.dtsi"
25 stdout-path = "serial0:115200n8";
29 compatible = "pwm-backlight";
31 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
32 power-supply = <&ppvar_sys>;
33 pinctrl-names = "default";
34 pinctrl-0 = <&ap_edp_bklten>;
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_kms.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
13 #include <linux/dma-buf.h>
62 struct dpu_kms *kms = s->private; in _dpu_danger_signal_status()
65 if (!kms->hw_mdp) { in _dpu_danger_signal_status()
72 pm_runtime_get_sync(&kms->pdev->dev); in _dpu_danger_signal_status()
75 if (kms->hw_mdp->ops.get_danger_status) in _dpu_danger_signal_status()
76 kms->hw_mdp->ops.get_danger_status(kms->hw_mdp, in _dpu_danger_signal_status()
80 if (kms->hw_mdp->ops.get_safe_status) in _dpu_danger_signal_status()
81 kms->hw_mdp->ops.get_safe_status(kms->hw_mdp, in _dpu_danger_signal_status()
[all …]

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