| /third_party/node/deps/v8/src/wasm/ |
| D | wasm-value.h | 37 class Simd128 { in FOREACH_SIMD_TYPE()
39 Simd128() = default; in FOREACH_SIMD_TYPE()
42 explicit Simd128(sType val) { \ in FOREACH_SIMD_TYPE()
51 explicit Simd128(byte* bytes) { in FOREACH_SIMD_TYPE()
67 inline sType Simd128::to() const { \
89 V(s128, kWasmS128, Simd128)
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| D | value-type.h | 27 class Simd128; variable
40 V(S128, 4, S128, Simd128, 's', "s128") \
626 V(kS128, Simd128)
645 V(S128, , Simd128)
721 V(S128, , Simd128)
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| D | init-expr-interface.cc | 149 return WasmValue(Simd128()); in DefaultValueForType()
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| D | wasm-module-builder.h | 185 void EmitS128Const(Simd128 val);
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| D | wasm-debug.cc | 638 return WasmValue(Simd128(ReadUnalignedValue<int16>(spilled_addr))); in GetValue()
657 return WasmValue(Simd128(ReadUnalignedValue<int16>(stack_address))); in GetValue()
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| D | wasm-objects.cc | 1554 using wasm::Simd128; in GetGlobalValue()
1570 using wasm::Simd128; in GetFieldValue()
1599 using wasm::Simd128; in GetElement()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyTargetTransformInfo.cpp | 60 // SIMD128's shifts currently only accept a scalar shift count. For each in getArithmeticInstrCost()
79 // SIMD128's insert/extract currently only take constant indices. in getVectorInstrCost()
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| D | WebAssembly.td | 25 def FeatureSIMD128 : SubtargetFeature<"simd128", "SIMDLevel", "SIMD128",
29 SubtargetFeature<"unimplemented-simd128",
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| D | WebAssemblySubtarget.h | 38 SIMD128, enumerator
95 bool hasSIMD128() const { return SIMDLevel >= SIMD128; } in hasSIMD128()
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| D | WebAssemblyInstrInfo.td | 27 AssemblerPredicate<"FeatureSIMD128", "simd128">;
31 AssemblerPredicate<"FeatureUnimplementedSIMD128", "unimplemented-simd128">;
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| D | WebAssemblyInstrSIMD.td | 14 // Instructions requiring HasSIMD128 and the simd128 prefix byte
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| /third_party/node/deps/v8/src/codegen/ |
| D | machine-type.h | 66 ASSERT_CONSECUTIVE(Float64, Simd128)
201 constexpr static MachineType Simd128() { in Simd128() function
260 return MachineType::Simd128();
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| D | tnode.h | 126 static constexpr MachineType kMachineType = MachineType::Simd128();
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| /third_party/rust/crates/memchr/src/memmem/prefilter/ |
| D | wasm.rs | 12 #[target_feature(enable = "simd128")]
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| /third_party/node/deps/v8/src/codegen/ppc/ |
| D | register-ppc.h | 206 // Simd128 register.
233 // Simd128 zero and scratch regs must have the same numbers as Double zero and
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| /third_party/rust/crates/memchr/src/memmem/ |
| D | wasm.rs | 38 #[target_feature(enable = "simd128")]
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| /third_party/rust/crates/memchr/ |
| D | build.rs | 33 if !target_has_feature("simd128") { in enable_simd_optimizations()
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| /third_party/node/deps/v8/src/builtins/ |
| D | convert.tq | 407 Convert<I8X16, Simd128>(s: Simd128): I8X16 {
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| D | base.tq | 120 type Simd128 generates 'TNode<Simd128T>';
121 type I8X16 extends Simd128 generates 'TNode<I8x16T>';
1952 extern macro LoadSimd128(intptr): Simd128;
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| /third_party/rust/crates/memchr/.github/workflows/ |
| D | ci.yml | 94 echo "RUSTFLAGS=-Ctarget-feature=+simd128" >> $GITHUB_ENV
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| /third_party/node/deps/v8/src/compiler/ |
| D | wasm-compiler.cc | 4297 MachineType type = MachineType::Simd128(); in BuildF64x2Ceil()
4303 MachineType type = MachineType::Simd128(); in BuildF64x2Floor()
4309 MachineType type = MachineType::Simd128(); in BuildF64x2Trunc()
4315 MachineType type = MachineType::Simd128(); in BuildF64x2NearestInt()
4321 MachineType type = MachineType::Simd128(); in BuildF32x4Ceil()
4327 MachineType type = MachineType::Simd128(); in BuildF32x4Floor()
4333 MachineType type = MachineType::Simd128(); in BuildF32x4Trunc()
4339 MachineType type = MachineType::Simd128(); in BuildF32x4NearestInt()
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| /third_party/node/deps/v8/src/debug/ |
| D | debug-wasm-objects.cc | 762 Handle<String> WasmSimd128ToString(Isolate* isolate, wasm::Simd128 s128) { in WasmSimd128ToString()
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| /third_party/node/deps/v8/src/compiler/backend/arm64/ |
| D | instruction-selector-arm64.cc | 2081 // kSystemPointerSize, e.g. Simd128, will span across multiple arguments. in EmitPrepareArguments()
2110 // TODO(arm): Support consecutive Simd128 parameters. in EmitPrepareArguments()
2139 } else if (output.location.GetType() == MachineType::Simd128()) { in EmitPrepareResults()
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| /third_party/node/deps/v8/src/diagnostics/ppc/ |
| D | disasm-ppc.cc | 155 // Print the Simd128 register name according to the active name converter.
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| /third_party/node/deps/v8/src/common/ |
| D | globals.h | 1716 // SIMD128 Registers are independent of every other size (e.g Riscv)
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