Home
last modified time | relevance | path

Searched +full:speed +full:- +full:grade (Results 1 – 25 of 61) sorted by relevance

123

/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Dxlnx,clocking-wizard.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/xlnx,clocking-wizard.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
20 - xlnx,clocking-wizard
21 - xlnx,clocking-wizard-v5.2
22 - xlnx,clocking-wizard-v6.0
28 "#clock-cells":
33 - description: clock input
[all …]
Dsilabs,si544.txt7 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
9 https://www.silabs.com/documents/public/data-sheets/si544-datasheet.pdf
12 - compatible: One of "silabs,si514a", "silabs,si514b" "silabs,si514c" according
13 to the speed grade of the chip.
14 - reg: I2C device address.
15 - #clock-cells: From common clock bindings: Shall be 0.
18 - clock-output-names: From common clock bindings. Recommended to be "si544".
21 si544: clock-controller@55 {
23 #clock-cells = <0>;
Dsilabs,si5341.txt6 https://www.silabs.com/documents/public/data-sheets/Si5341-40-D-DataSheet.pdf
8 https://www.silabs.com/documents/public/reference-manuals/Si5341-40-D-RM.pdf
10 https://www.silabs.com/documents/public/reference-manuals/Si5345-44-42-D-RM.pdf
21 chip at boot, in case you have a (pre-)programmed device. If the PLL is not
25 The device type, speed grade and revision are determined runtime by probing.
33 - compatible: shall be one of the following:
34 "silabs,si5340" - Si5340 A/B/C/D
35 "silabs,si5341" - Si5341 A/B/C/D
36 "silabs,si5342" - Si5342 A/B/C/D
37 "silabs,si5344" - Si5344 A/B/C/D
[all …]
/kernel/linux/linux-5.10/drivers/staging/clocking-wizard/
Ddt-binding.txt6 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
8 https://www.xilinx.com/support/documentation/ip_documentation/clk_wiz/v5_1/pg065-clk-wiz.pdf
11 - compatible: Must be 'xlnx,clocking-wizard'
12 - reg: Base and size of the cores register space
13 - clocks: Handle to input clock
14 - clock-names: Tuple containing 'clk_in1' and 's_axi_aclk'
15 - clock-output-names: Names for the output clocks
18 - speed-grade: Speed grade of the device (valid values are 1..3)
21 clock-generator@40040000 {
23 compatible = "xlnx,clocking-wizard";
[all …]
Dclk-xlnx-clock-wizard.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013 - 2014 Xilinx
12 #include <linux/clk-provider.h>
49 * @speed_grade: Speed grade of the device
66 /* maximum frequencies for input/output clocks per speed grade */
80 if (clk_wzrd->suspended) in clk_wzrd_clk_notifier()
83 if (ndata->clk == clk_wzrd->clk_in1) in clk_wzrd_clk_notifier()
84 max = clk_wzrd_max_freq[clk_wzrd->speed_grade - 1]; in clk_wzrd_clk_notifier()
85 else if (ndata->clk == clk_wzrd->axi_clk) in clk_wzrd_clk_notifier()
92 if (ndata->new_rate > max) in clk_wzrd_clk_notifier()
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/cpufreq/
Dimx-cpufreq-dt.txt1 i.MX CPUFreq-DT OPP bindings
5 "speed grading" value which are written in fuses. These bits are combined with
6 the opp-supported-hw values for each OPP to check if the OPP is allowed.
9 --------------------
11 For each opp entry in 'operating-points-v2' table:
12 - opp-supported-hw: Two bitmaps indicating:
13 - Supported speed grade mask
14 - Supported market segment mask
21 --------
24 compatible = "operating-points-v2";
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/cpufreq/
Dimx-cpufreq-dt.txt1 i.MX CPUFreq-DT OPP bindings
5 "speed grading" value which are written in fuses. These bits are combined with
6 the opp-supported-hw values for each OPP to check if the OPP is allowed.
9 --------------------
11 For each opp entry in 'operating-points-v2' table:
12 - opp-supported-hw: Two bitmaps indicating:
13 - Supported speed grade mask
14 - Supported market segment mask
21 --------
24 compatible = "operating-points-v2";
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/nvmem/
Dimx-ocotp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/imx-ocotp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX On-Chip OTP Controller (OCOTP)
10 - Anson Huang <Anson.Huang@nxp.com>
13 This binding represents the on-chip eFuse OTP controller found on
18 - $ref: nvmem.yaml#
23 - items:
24 - enum:
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/nvmem/
Dimx-ocotp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/imx-ocotp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings
10 - Anson Huang <Anson.Huang@nxp.com>
13 This binding represents the on-chip eFuse OTP controller found on
18 - $ref: "nvmem.yaml#"
23 - items:
24 - enum:
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dsilabs,si544.txt7 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
9 https://www.silabs.com/documents/public/data-sheets/si544-datasheet.pdf
12 - compatible: One of "silabs,si514a", "silabs,si514b" "silabs,si514c" according
13 to the speed grade of the chip.
14 - reg: I2C device address.
15 - #clock-cells: From common clock bindings: Shall be 0.
18 - clock-output-names: From common clock bindings. Recommended to be "si544".
21 si544: clock-controller@55 {
23 #clock-cells = <0>;
Dsilabs,si5341.txt6 https://www.silabs.com/documents/public/data-sheets/Si5341-40-D-DataSheet.pdf
8 https://www.silabs.com/documents/public/reference-manuals/Si5341-40-D-RM.pdf
10 https://www.silabs.com/documents/public/reference-manuals/Si5345-44-42-D-RM.pdf
21 chip at boot, in case you have a (pre-)programmed device. If the PLL is not
25 The device type, speed grade and revision are determined runtime by probing.
34 - compatible: shall be one of the following:
35 "silabs,si5340" - Si5340 A/B/C/D
36 "silabs,si5341" - Si5341 A/B/C/D
37 "silabs,si5342" - Si5342 A/B/C/D
38 "silabs,si5344" - Si5344 A/B/C/D
[all …]
/kernel/linux/linux-6.6/drivers/cpufreq/
Dsun50i-cpufreq-nvmem.c1 // SPDX-License-Identifier: GPL-2.0
5 * The sun50i-cpufreq-nvmem driver reads the efuse value from the SoC to
15 #include <linux/nvmem-consumer.h>
29 * sun50i_cpufreq_get_efuse() - Determine speed grade from efuse value
45 return -ENODEV; in sun50i_cpufreq_get_efuse()
49 return -ENOENT; in sun50i_cpufreq_get_efuse()
52 "allwinner,sun50i-h6-operating-points"); in sun50i_cpufreq_get_efuse()
55 return -ENOENT; in sun50i_cpufreq_get_efuse()
73 * the slowest bin. Expected efuse values are 1-3, slowest in sun50i_cpufreq_get_efuse()
77 *versions = efuse_value - 1; in sun50i_cpufreq_get_efuse()
[all …]
Dimx-cpufreq-dt.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/nvmem-consumer.h>
20 #include "cpufreq-dt.h"
32 /* cpufreq-dt device registered by imx-cpufreq-dt */
64 unsigned int newfreq = policy->freq_table[index].frequency; in imx7ulp_target_intermediate()
92 if (!of_property_present(cpu_dev->of_node, "cpu-supply")) in imx_cpufreq_dt_probe()
93 return -ENODEV; in imx_cpufreq_dt_probe()
101 dt_pdev = platform_device_register_data(NULL, "cpufreq-dt", in imx_cpufreq_dt_probe()
102 -1, &imx7ulp_data, in imx_cpufreq_dt_probe()
107 dev_err(&pdev->dev, "Failed to register cpufreq-dt: %d\n", ret); in imx_cpufreq_dt_probe()
[all …]
Dti-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * TI CPUFreq/OPP hw-supported driver
5 * Copyright (C) 2016-2017 Texas Instruments, Inc.
6 * Dave Gerlach <d-gerlach@ti.com>
77 efuse = opp_data->soc_data->efuse_fallback; in amx3_efuse_xlate()
111 /* OPP enable bit ("Speed Binned") */ in omap3_efuse_xlate()
180 .efuse_offset = OMAP34xx_ProdID_SKUID - OMAP3_SYSCON_BASE,
183 .rev_offset = OMAP3_CONTROL_IDCODE - OMAP3_SYSCON_BASE,
193 * Speed Binned = Bit 9
207 .efuse_offset = OMAP3_CONTROL_DEVICE_STATUS - OMAP3_SYSCON_BASE,
[all …]
/kernel/linux/linux-5.10/drivers/cpufreq/
Dsun50i-cpufreq-nvmem.c1 // SPDX-License-Identifier: GPL-2.0
5 * The sun50i-cpufreq-nvmem driver reads the efuse value from the SoC to
14 #include <linux/nvmem-consumer.h>
28 * sun50i_cpufreq_get_efuse() - Determine speed grade from efuse value
44 return -ENODEV; in sun50i_cpufreq_get_efuse()
48 return -ENOENT; in sun50i_cpufreq_get_efuse()
51 "allwinner,sun50i-h6-operating-points"); in sun50i_cpufreq_get_efuse()
54 return -ENOENT; in sun50i_cpufreq_get_efuse()
60 if (PTR_ERR(speedbin_nvmem) != -EPROBE_DEFER) in sun50i_cpufreq_get_efuse()
75 * the slowest bin. Expected efuse values are 1-3, slowest in sun50i_cpufreq_get_efuse()
[all …]
Dimx-cpufreq-dt.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/nvmem-consumer.h>
20 #include "cpufreq-dt.h"
32 /* cpufreq-dt device registered by imx-cpufreq-dt */
64 unsigned int newfreq = policy->freq_table[index].frequency; in imx7ulp_target_intermediate()
92 if (!of_property_present(cpu_dev->of_node, "cpu-supply")) in imx_cpufreq_dt_probe()
93 return -ENODEV; in imx_cpufreq_dt_probe()
101 dt_pdev = platform_device_register_data(NULL, "cpufreq-dt", in imx_cpufreq_dt_probe()
102 -1, &imx7ulp_data, in imx_cpufreq_dt_probe()
107 dev_err(&pdev->dev, "Failed to register cpufreq-dt: %d\n", ret); in imx_cpufreq_dt_probe()
[all …]
Dti-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * TI CPUFreq/OPP hw-supported driver
5 * Copyright (C) 2016-2017 Texas Instruments, Inc.
6 * Dave Gerlach <d-gerlach@ti.com>
70 efuse = opp_data->soc_data->efuse_fallback; in amx3_efuse_xlate()
104 /* OPP enable bit ("Speed Binned") */ in omap3_efuse_xlate()
154 .efuse_offset = OMAP34xx_ProdID_SKUID - OMAP3_SYSCON_BASE,
157 .rev_offset = OMAP3_CONTROL_IDCODE - OMAP3_SYSCON_BASE,
167 * Speed Binned = Bit 9
181 .efuse_offset = OMAP3_CONTROL_DEVICE_STATUS - OMAP3_SYSCON_BASE,
[all …]
/kernel/linux/linux-6.6/drivers/clk/xilinx/
Dclk-xlnx-clock-wizard.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013 - 2021 Xilinx
14 #include <linux/clk-provider.h>
56 /* Divider limits, from UG572 Table 3-4 for Ultrascale+ */
72 #define div_mask(width) ((1 << (width)) - 1)
85 * struct clk_wzrd - Clock wizard private data structure
94 * @speed_grade: Speed grade of the device
110 * struct clk_wzrd_divider - clock divider specific to clk_wzrd
112 * @hw: handle between common and hardware-specific interfaces
140 /* maximum frequencies for input/output clocks per speed grade */
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-davinci/include/mach/
Dda8xx.h6 * 2007, 2009-2010 (c) MontaVista Software, Inc. This file is licensed under
14 #include <video/da8xx-fb.h>
27 #include <linux/platform_data/i2c-davinci.h>
28 #include <linux/platform_data/mmc-davinci.h>
29 #include <linux/platform_data/usb-davinci.h>
30 #include <linux/platform_data/spi-davinci.h>
39 * If the DA850/OMAP-L138/AM18x SoC on board is of a higher speed grade
41 * with the supported speed before calling da850_register_cpufreq().
54 #define DA8XX_CP_INTC_VIRT (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K)
/kernel/linux/linux-5.10/drivers/clk/
Dclk-si544.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
39 /* Max freq depends on speed grade */
45 /* VCO range is 10.8 .. 12.1 GHz, max depends on speed grade */
74 * struct clk_si544_muldiv - Multiplier/divider settings
79 * If ls_div_bits is non-zero, hs_div must be even
80 * @delta_m: Frequency shift for small -950..+950 ppm changes, 24 bit
93 return regmap_update_bits(data->regmap, SI544_REG_OE_STATE, in si544_enable_output()
117 err = regmap_read(data->regmap, SI544_REG_OE_STATE, &val); in si544_is_prepared()
131 err = regmap_bulk_read(data->regmap, SI544_REG_HS_DIV, reg, 2); in si544_get_muldiv()
[all …]
/kernel/linux/linux-6.6/drivers/clk/
Dclk-si544.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
39 /* Max freq depends on speed grade */
45 /* VCO range is 10.8 .. 12.1 GHz, max depends on speed grade */
74 * struct clk_si544_muldiv - Multiplier/divider settings
79 * If ls_div_bits is non-zero, hs_div must be even
80 * @delta_m: Frequency shift for small -950..+950 ppm changes, 24 bit
93 return regmap_update_bits(data->regmap, SI544_REG_OE_STATE, in si544_enable_output()
117 err = regmap_read(data->regmap, SI544_REG_OE_STATE, &val); in si544_is_prepared()
131 err = regmap_bulk_read(data->regmap, SI544_REG_HS_DIV, reg, 2); in si544_get_muldiv()
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/
Domap34xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/media/omap3-isp.h>
16 /* OMAP343x/OMAP35xx variants OPP1-6 */
17 operating-points-v2 = <&cpu0_opp_table>;
19 clock-latency = <300000>; /* From legacy driver */
20 #cooling-cells = <2>;
24 cpu0_opp_table: opp-table {
25 compatible = "operating-points-v2-ti-cpu";
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Domap34xx.dtsi4 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
11 #include <dt-bindings/bus/ti-sysc.h>
12 #include <dt-bindings/media/omap3-isp.h>
19 /* OMAP343x/OMAP35xx variants OPP1-6 */
20 operating-points-v2 = <&cpu0_opp_table>;
22 clock-latency = <300000>; /* From legacy driver */
23 #cooling-cells = <2>;
28 cpu0_opp_table: opp-table {
29 compatible = "operating-points-v2-ti-cpu";
32 opp1-125000000 {
[all …]
/kernel/linux/linux-5.10/drivers/staging/most/Documentation/
Ddriver_usage.txt5 access a MOST network: The Automotive Information Backbone and the de-facto
6 standard for high-bandwidth automotive multimedia networking.
9 for the efficient and low-cost transport of control, real-time and packet
12 also supports various speed grades up to 150 Mbps.
23 of Automotive Grade Linux to create open source software solutions for
128 - buffer_size
130 - subbuffer_size
131 configure the sub-buffer size for this channel (needed for
133 - num_buffers
135 - datatype
[all …]
/kernel/linux/linux-6.6/drivers/staging/most/Documentation/
Ddriver_usage.txt5 access a MOST network: The Automotive Information Backbone and the de-facto
6 standard for high-bandwidth automotive multimedia networking.
9 for the efficient and low-cost transport of control, real-time and packet
12 also supports various speed grades up to 150 Mbps.
23 of Automotive Grade Linux to create open source software solutions for
128 - buffer_size
130 - subbuffer_size
131 configure the sub-buffer size for this channel (needed for
133 - num_buffers
135 - datatype
[all …]

123