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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/
Dnvidia,tegra194-pinmux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra194-pinmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra194 Pinmux Controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra194-pinmux
17 - nvidia,tegra194-pinmux-aon
21 - description: pinmux registers
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dnvidia,tegra194-pinmux.txt1 NVIDIA Tegra194 pinmux controller
4 - compatible: "nvidia,tegra194-pinmux"
5 - reg: Should contain a list of base address and size pairs for:
6 - first entry: The APB_MISC_GP_*_PADCTRL registers (pad control)
7 - second entry: The PINMUX_AUX_* registers (pinmux)
9 Please refer to pinctrl-bindings.txt in this directory for details of the
17 parameters, such as pull-up, tristate, drive strength, etc.
21 include/dt-binding/pinctrl/pinctrl-tegra.h.
23 Required subnode-properties:
24 - nvidia,pins : An array of strings. Each string contains the name of a pin or
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/nvidia/
Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 #include <dt-bindings/power/tegra194-powergate.h>
9 #include <dt-bindings/reset/tegra194-reset.h>
10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
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Dtegra194-p2888.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "tegra194.dtsi"
4 #include <dt-bindings/mfd/max77620.h>
8 compatible = "nvidia,p2888", "nvidia,tegra194";
27 stdout-path = "serial0:115200n8";
34 phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(G, 5) GPIO_ACTIVE_LOW>;
35 phy-handle = <&phy>;
36 phy-mode = "rgmii-id";
39 #address-cells = <1>;
40 #size-cells = <0>;
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Dtegra194-p3668.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "tegra194.dtsi"
4 #include <dt-bindings/mfd/max77620.h>
24 stdout-path = "serial0:115200n8";
31 phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(R, 1) GPIO_ACTIVE_LOW>;
32 phy-handle = <&phy>;
33 phy-mode = "rgmii-id";
36 #address-cells = <1>;
37 #size-cells = <0>;
39 phy: ethernet-phy@0 {
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Dtegra234.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/gpio/tegra234-gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/mailbox/tegra186-hsp.h>
7 #include <dt-bindings/memory/tegra234-mc.h>
8 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
9 #include <dt-bindings/power/tegra234-powergate.h>
10 #include <dt-bindings/reset/tegra234-reset.h>
11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h>
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/nvidia/
Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
7 #include <dt-bindings/power/tegra194-powergate.h>
8 #include <dt-bindings/reset/tegra194-reset.h>
9 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
10 #include <dt-bindings/memory/tegra194-mc.h>
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Dtegra194-p3668-0000.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "tegra194.dtsi"
4 #include <dt-bindings/mfd/max77620.h>
8 compatible = "nvidia,p3668-0000", "nvidia,tegra194";
28 stdout-path = "serial0:115200n8";
35 phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(R, 1) GPIO_ACTIVE_LOW>;
36 phy-handle = <&phy>;
37 phy-mode = "rgmii-id";
40 #address-cells = <1>;
41 #size-cells = <0>;
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Dtegra194-p2888.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "tegra194.dtsi"
4 #include <dt-bindings/mfd/max77620.h>
8 compatible = "nvidia,p2888", "nvidia,tegra194";
27 stdout-path = "serial0:115200n8";
34 phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(G, 5) GPIO_ACTIVE_LOW>;
35 phy-handle = <&phy>;
36 phy-mode = "rgmii-id";
39 #address-cells = <1>;
40 #size-cells = <0>;
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/kernel/linux/linux-5.10/drivers/pinctrl/tegra/
Dpinctrl-tegra194.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Pinctrl data for the NVIDIA Tegra194 pinmux
21 #include <linux/pinctrl/pinmux.h>
23 #include "pinctrl-tegra.h"
85 .lpmd_bit = -1, \
86 .lock_bit = -1, \
87 .hsm_bit = -1, \
104 DRV_PINGROUP_ENTRY_Y(0x14004, 12, 5, 20, 5, -1, -1, -1, -1, 0)
106 DRV_PINGROUP_ENTRY_Y(0x1400c, 12, 5, 20, 5, -1, -1, -1, -1, 0)
128 Y, -1, 6, 8, 11, 12, N, "vddio_pex_ctl_2"),
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra124-dpaux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-dpaux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
24 pattern: "^dpaux@[0-9a-f]+$"
28 - enum:
29 - nvidia,tegra124-dpaux
30 - nvidia,tegra210-dpaux
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/kernel/linux/linux-5.10/drivers/gpio/
Dgpio-tegra186.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016-2017 NVIDIA Corporation
15 #include <dt-bindings/gpio/tegra186-gpio.h>
16 #include <dt-bindings/gpio/tegra194-gpio.h>
74 const char *pinmux; member
94 for (i = 0; i < gpio->soc->num_ports; i++) { in tegra186_gpio_get_port()
95 const struct tegra_gpio_port *port = &gpio->soc->ports[i]; in tegra186_gpio_get_port()
97 if (*pin >= start && *pin < start + port->pins) { in tegra186_gpio_get_port()
98 *pin -= start; in tegra186_gpio_get_port()
102 start += port->pins; in tegra186_gpio_get_port()
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/
Dnvidia,tegra20-sdhci.txt7 by mmc.txt and the properties used by the sdhci-tegra driver.
10 - compatible : should be one of:
11 - "nvidia,tegra20-sdhci": for Tegra20
12 - "nvidia,tegra30-sdhci": for Tegra30
13 - "nvidia,tegra114-sdhci": for Tegra114
14 - "nvidia,tegra124-sdhci": for Tegra124 and Tegra132
15 - "nvidia,tegra210-sdhci": for Tegra210
16 - "nvidia,tegra186-sdhci": for Tegra186
17 - "nvidia,tegra194-sdhci": for Tegra194
18 - clocks: For Tegra210, Tegra186 and Tegra194 must contain two entries.
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pwm/
Dnvidia,tegra20-pwm.txt4 - compatible: Must be:
5 - "nvidia,tegra20-pwm": for Tegra20
6 - "nvidia,tegra30-pwm", "nvidia,tegra20-pwm": for Tegra30
7 - "nvidia,tegra114-pwm", "nvidia,tegra20-pwm": for Tegra114
8 - "nvidia,tegra124-pwm", "nvidia,tegra20-pwm": for Tegra124
9 - "nvidia,tegra132-pwm", "nvidia,tegra20-pwm": for Tegra132
10 - "nvidia,tegra210-pwm", "nvidia,tegra20-pwm": for Tegra210
11 - "nvidia,tegra186-pwm": for Tegra186
12 - "nvidia,tegra194-pwm": for Tegra194
13 - reg: physical base address and length of the controller's registers
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/kernel/linux/linux-6.6/drivers/gpio/
Dgpio-tegra186.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016-2022 NVIDIA Corporation
18 #include <dt-bindings/gpio/tegra186-gpio.h>
19 #include <dt-bindings/gpio/tegra194-gpio.h>
20 #include <dt-bindings/gpio/tegra234-gpio.h>
21 #include <dt-bindings/gpio/tegra241-gpio.h>
98 const char *pinmux; member
121 for (i = 0; i < gpio->soc->num_ports; i++) { in tegra186_gpio_get_port()
122 const struct tegra_gpio_port *port = &gpio->soc->ports[i]; in tegra186_gpio_get_port()
124 if (*pin >= start && *pin < start + port->pins) { in tegra186_gpio_get_port()
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/kernel/linux/linux-6.6/drivers/gpu/drm/tegra/
Ddpaux.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/pinctrl/pinconf-generic.h>
14 #include <linux/pinctrl/pinmux.h>
79 u32 value = readl(dpaux->regs + (offset << 2)); in tegra_dpaux_readl()
81 trace_dpaux_readl(dpaux->dev, offset, value); in tegra_dpaux_readl()
89 trace_dpaux_writel(dpaux->dev, offset, value); in tegra_dpaux_writel()
90 writel(value, dpaux->regs + (offset << 2)); in tegra_dpaux_writel()
99 size_t num = min_t(size_t, size - i * 4, 4); in tegra_dpaux_write_fifo()
115 size_t num = min_t(size_t, size - i * 4, 4); in tegra_dpaux_read_fifo()
136 if (msg->size > 16) in tegra_dpaux_transfer()
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/kernel/linux/linux-5.10/drivers/gpu/drm/tegra/
Ddpaux.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/pinctrl/pinconf-generic.h>
14 #include <linux/pinctrl/pinmux.h>
78 u32 value = readl(dpaux->regs + (offset << 2)); in tegra_dpaux_readl()
80 trace_dpaux_readl(dpaux->dev, offset, value); in tegra_dpaux_readl()
88 trace_dpaux_writel(dpaux->dev, offset, value); in tegra_dpaux_writel()
89 writel(value, dpaux->regs + (offset << 2)); in tegra_dpaux_writel()
98 size_t num = min_t(size_t, size - i * 4, 4); in tegra_dpaux_write_fifo()
114 size_t num = min_t(size_t, size - i * 4, 4); in tegra_dpaux_read_fifo()
135 if (msg->size > 16) in tegra_dpaux_transfer()
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/kernel/linux/linux-6.6/drivers/pinctrl/tegra/
Dpinctrl-tegra194.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Pinctrl data for the NVIDIA Tegra194 pinmux
5 * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
21 #include <linux/pinctrl/pinmux.h>
23 #include "pinctrl-tegra.h"
1281 #define PINGROUP_REG_N(r) -1
1284 #define DRV_PINGROUP_N(r) -1
1287 .drv_reg = -1, \
1288 .drv_bank = -1, \
1289 .drvdn_bit = -1, \
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/kernel/linux/linux-5.10/drivers/soc/tegra/
Dpmc.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
12 #define pr_fmt(fmt) "tegra-pmc: " fmt
14 #include <linux/arm-smccc.h>
16 #include <linux/clk-provider.h>
18 #include <linux/clk/clk-conf.h>
36 #include <linux/pinctrl/pinconf-generic.h>
51 #include <dt-bindings/interrupt-controller/arm-gic.h>
52 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
53 #include <dt-bindings/gpio/tegra186-gpio.h>
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/kernel/linux/linux-6.6/drivers/soc/tegra/
Dpmc.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2018-2023, NVIDIA CORPORATION. All rights reserved.
12 #define pr_fmt(fmt) "tegra-pmc: " fmt
14 #include <linux/arm-smccc.h>
16 #include <linux/clk-provider.h>
18 #include <linux/clk/clk-conf.h>
37 #include <linux/pinctrl/pinconf-generic.h>
56 #include <dt-bindings/interrupt-controller/arm-gic.h>
57 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
58 #include <dt-bindings/gpio/tegra186-gpio.h>
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/kernel/linux/patches/linux-5.10/yangfan_patch/
Ddrivers.patch1 diff --git a/drivers/Makefile b/drivers/Makefile
3 --- a/drivers/Makefile
5 @@ -6,6 +6,8 @@
6 # Rewritten to use lists instead of if-statements.
11 obj-y += irqchip/
12 obj-y += bus/
14 diff --git a/drivers/block/nbd.c b/drivers/block/nbd.c
16 --- a/drivers/block/nbd.c
18 @@ -2398,12 +2398,6 @@ static int nbd_genl_status(struct sk_buff *skb, struct genl_info *info)
22 - if (!dev_list) {
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