Home
last modified time | relevance | path

Searched +full:tegra194 +full:- +full:tcu (Results 1 – 18 of 18) sorted by relevance

/kernel/linux/linux-6.6/Documentation/devicetree/bindings/serial/
Dnvidia,tegra194-tcu.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/serial/nvidia,tegra194-tcu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra Combined UART (TCU)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
14 The TCU is a system for sharing a hardware UART instance among multiple
15 systems within the Tegra SoC. It is implemented through a mailbox-
18 with the hardware implementing the TCU.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/serial/
Dnvidia,tegra194-tcu.txt1 NVIDIA Tegra Combined UART (TCU)
3 The TCU is a system for sharing a hardware UART instance among multiple
4 systems within the Tegra SoC. It is implemented through a mailbox-
7 with the hardware implementing the TCU.
10 - name : Should be tcu
11 - compatible
14 - "nvidia,tegra194-tcu"
15 - mbox-names:
16 "rx" - Mailbox for receiving data from hardware UART
17 "tx" - Mailbox for transmitting data to hardware UART
[all …]
/kernel/linux/linux-6.6/drivers/tty/serial/
Dtegra-tcu.c1 // SPDX-License-Identifier: GPL-2.0
51 static void tegra_tcu_write_one(struct tegra_tcu *tcu, u32 value, in tegra_tcu_write_one() argument
58 mbox_send_message(tcu->tx, msg); in tegra_tcu_write_one()
59 mbox_flush(tcu->tx, 1000); in tegra_tcu_write_one()
62 static void tegra_tcu_write(struct tegra_tcu *tcu, const char *s, in tegra_tcu_write() argument
82 tegra_tcu_write_one(tcu, value, 3); in tegra_tcu_write()
88 tegra_tcu_write_one(tcu, value, written); in tegra_tcu_write()
93 struct tegra_tcu *tcu = port->private_data; in tegra_tcu_uart_start_tx() local
94 struct circ_buf *xmit = &port->state->xmit; in tegra_tcu_uart_start_tx()
98 count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); in tegra_tcu_uart_start_tx()
[all …]
/kernel/linux/linux-5.10/drivers/tty/serial/
Dtegra-tcu.c1 // SPDX-License-Identifier: GPL-2.0
52 static void tegra_tcu_write_one(struct tegra_tcu *tcu, u32 value, in tegra_tcu_write_one() argument
59 mbox_send_message(tcu->tx, msg); in tegra_tcu_write_one()
60 mbox_flush(tcu->tx, 1000); in tegra_tcu_write_one()
63 static void tegra_tcu_write(struct tegra_tcu *tcu, const char *s, in tegra_tcu_write() argument
83 tegra_tcu_write_one(tcu, value, 3); in tegra_tcu_write()
89 tegra_tcu_write_one(tcu, value, written); in tegra_tcu_write()
94 struct tegra_tcu *tcu = port->private_data; in tegra_tcu_uart_start_tx() local
95 struct circ_buf *xmit = &port->state->xmit; in tegra_tcu_uart_start_tx()
99 count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); in tegra_tcu_uart_start_tx()
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/nvidia/
Dtegra234-p3768-0000+p3767-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
7 #include "tegra234-p3767-0000.dtsi"
8 #include "tegra234-p3768-0000.dtsi"
11 compatible = "nvidia,p3768-0000+p3767-0000", "nvidia,p3767-0000", "nvidia,tegra234";
15 serial0 = &tcu;
21 stdout-path = "serial0:115200n8";
26 compatible = "nvidia,tegra194-hsuart";
[all …]
Dtegra194-p2888.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "tegra194.dtsi"
4 #include <dt-bindings/mfd/max77620.h>
8 compatible = "nvidia,p2888", "nvidia,tegra194";
22 serial0 = &tcu;
27 stdout-path = "serial0:115200n8";
34 phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(G, 5) GPIO_ACTIVE_LOW>;
35 phy-handle = <&phy>;
36 phy-mode = "rgmii-id";
39 #address-cells = <1>;
[all …]
Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 #include <dt-bindings/power/tegra194-powergate.h>
9 #include <dt-bindings/reset/tegra194-reset.h>
10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
[all …]
Dtegra194-p3668.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "tegra194.dtsi"
4 #include <dt-bindings/mfd/max77620.h>
19 serial0 = &tcu;
24 stdout-path = "serial0:115200n8";
31 phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(R, 1) GPIO_ACTIVE_LOW>;
32 phy-handle = <&phy>;
33 phy-mode = "rgmii-id";
36 #address-cells = <1>;
37 #size-cells = <0>;
[all …]
Dtegra234-p3740-0002+p3701-0008.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include "tegra234-p3701-0008.dtsi"
7 #include "tegra234-p3740-0002.dtsi"
11 compatible = "nvidia,p3740-0002+p3701-0008", "nvidia,p3701-0008", "nvidia,tegra234";
14 serial0 = &tcu;
19 stdout-path = "serial0:115200n8";
24 compatible = "nvidia,tegra194-hsuart";
[all …]
Dtegra234-p3737-0000+p3701-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
7 #include "tegra234-p3701-0000.dtsi"
8 #include "tegra234-p3737-0000.dtsi"
12 compatible = "nvidia,p3737-0000+p3701-0000", "nvidia,p3701-0000", "nvidia,tegra234";
16 serial0 = &tcu;
22 stdout-path = "serial0:115200n8";
27 compatible = "nvidia,tegra194-hsuart";
[all …]
Dtegra234.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/gpio/tegra234-gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/mailbox/tegra186-hsp.h>
7 #include <dt-bindings/memory/tegra234-mc.h>
8 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
9 #include <dt-bindings/power/tegra234-powergate.h>
10 #include <dt-bindings/reset/tegra234-reset.h>
11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h>
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/iommu/
Darm,smmu.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Will Deacon <will@kernel.org>
11 - Robin Murphy <Robin.Murphy@arm.com>
23 pattern: "^iommu@[0-9a-f]*"
26 - description: Qcom SoCs implementing "arm,smmu-v2"
28 - enum:
29 - qcom,msm8996-smmu-v2
30 - qcom,msm8998-smmu-v2
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/nvidia/
Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
7 #include <dt-bindings/power/tegra194-powergate.h>
8 #include <dt-bindings/reset/tegra194-reset.h>
9 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
10 #include <dt-bindings/memory/tegra194-mc.h>
[all …]
Dtegra194-p3668-0000.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "tegra194.dtsi"
4 #include <dt-bindings/mfd/max77620.h>
8 compatible = "nvidia,p3668-0000", "nvidia,tegra194";
23 serial0 = &tcu;
28 stdout-path = "serial0:115200n8";
35 phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(R, 1) GPIO_ACTIVE_LOW>;
36 phy-handle = <&phy>;
37 phy-mode = "rgmii-id";
40 #address-cells = <1>;
[all …]
Dtegra194-p2888.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "tegra194.dtsi"
4 #include <dt-bindings/mfd/max77620.h>
8 compatible = "nvidia,p2888", "nvidia,tegra194";
22 serial0 = &tcu;
27 stdout-path = "serial0:115200n8";
34 phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(G, 5) GPIO_ACTIVE_LOW>;
35 phy-handle = <&phy>;
36 phy-mode = "rgmii-id";
39 #address-cells = <1>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/iommu/
Darm,smmu.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Will Deacon <will@kernel.org>
11 - Robin Murphy <Robin.Murphy@arm.com>
23 pattern: "^iommu@[0-9a-f]*"
26 - description: Qcom SoCs implementing "arm,smmu-v2"
28 - enum:
29 - qcom,msm8996-smmu-v2
30 - qcom,msm8998-smmu-v2
[all …]
/kernel/linux/linux-5.10/drivers/mailbox/
Dtegra-hsp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
18 #include <dt-bindings/mailbox/tegra186-hsp.h>
111 return readl(hsp->regs + offset); in tegra_hsp_readl()
117 writel(value, hsp->regs + offset); in tegra_hsp_writel()
123 return readl(channel->regs + offset); in tegra_hsp_channel_readl()
129 writel(value, channel->regs + offset); in tegra_hsp_channel_writel()
136 value = tegra_hsp_channel_readl(&db->channel, HSP_DB_ENABLE); in tegra_hsp_doorbell_can_ring()
146 list_for_each_entry(entry, &hsp->doorbells, list) in __tegra_hsp_doorbell_get()
147 if (entry->master == master) in __tegra_hsp_doorbell_get()
[all …]
/kernel/linux/linux-6.6/drivers/mailbox/
Dtegra-hsp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016-2023, NVIDIA CORPORATION. All rights reserved.
17 #include <dt-bindings/mailbox/tegra186-hsp.h>
128 return readl(hsp->regs + offset); in tegra_hsp_readl()
134 writel(value, hsp->regs + offset); in tegra_hsp_writel()
140 return readl(channel->regs + offset); in tegra_hsp_channel_readl()
146 writel(value, channel->regs + offset); in tegra_hsp_channel_writel()
153 value = tegra_hsp_channel_readl(&db->channel, HSP_DB_ENABLE); in tegra_hsp_doorbell_can_ring()
163 list_for_each_entry(entry, &hsp->doorbells, list) in __tegra_hsp_doorbell_get()
164 if (entry->master == master) in __tegra_hsp_doorbell_get()
[all …]