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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/i2c/
Dnvidia,tegra20-i2c.txt4 - compatible : For Tegra20, must be one of "nvidia,tegra20-i2c-dvc" or
5 "nvidia,tegra20-i2c". For Tegra30, must be "nvidia,tegra30-i2c".
6 For Tegra114, must be "nvidia,tegra114-i2c". Otherwise, must be
7 "nvidia,<chip>-i2c", plus at least one of the above, where <chip> is
8 tegra124, tegra132, or tegra210.
10 nvidia,tegra20-i2c-dvc: Tegra20 has specific I2C controller called as DVC I2C
14 "nvidia,tegra20-i2c-dvc".
15 nvidia,tegra20-i2c: Tegra20 has 4 generic I2C controller. This can support
16 master and slave mode of I2C communication. The i2c-tegra driver only
18 only compatible with "nvidia,tegra20-i2c".
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra20-vi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-vi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^vi@[0-9a-f]+$"
19 - const: nvidia,tegra20-vi
20 - const: nvidia,tegra30-vi
21 - const: nvidia,tegra114-vi
[all …]
Dnvidia,tegra20-host1x.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-host1x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
13 description: The host1x top-level node defines a number of children, each
19 - enum:
20 - nvidia,tegra20-host1x
21 - nvidia,tegra30-host1x
[all …]
Dnvidia,tegra210-csi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra210-csi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^csi@[0-9a-f]+$"
19 - nvidia,tegra210-csi
26 - description: module clock
27 - description: A/B lanes clock
[all …]
/kernel/linux/linux-5.10/drivers/staging/media/tegra-video/
Dtegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * This source file contains Tegra210 supported video formats,
8 * VI and CSI SoC specific data, operations and registers accessors.
18 #include "vi.h"
22 /* Tegra210 VI registers */
33 /* Tegra210 VI CSI registers */
57 /* Tegra210 CSI Pixel Parser registers: Starts from 0x838, offset 0x0 */
85 /* Tegra210 CSI PHY registers */
139 /* Tegra210 VI registers accessors */
143 writel_relaxed(val, chan->vi->iomem + addr); in tegra_vi_write()
[all …]
Dvideo.c1 // SPDX-License-Identifier: GPL-2.0-only
19 tegra_channels_cleanup(vid->vi); in tegra_v4l2_dev_release()
22 media_device_unregister(&vid->media_dev); in tegra_v4l2_dev_release()
23 media_device_cleanup(&vid->media_dev); in tegra_v4l2_dev_release()
34 return -ENOMEM; in host1x_video_probe()
36 dev_set_drvdata(&dev->dev, vid); in host1x_video_probe()
38 vid->media_dev.dev = &dev->dev; in host1x_video_probe()
39 strscpy(vid->media_dev.model, "NVIDIA Tegra Video Input Device", in host1x_video_probe()
40 sizeof(vid->media_dev.model)); in host1x_video_probe()
42 media_device_init(&vid->media_dev); in host1x_video_probe()
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 tegra-video-objs := \
4 vi.o \
7 tegra-video-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210.o
8 obj-$(CONFIG_VIDEO_TEGRA) += tegra-video.o
Dvi.c1 // SPDX-License-Identifier: GPL-2.0-only
21 #include <media/v4l2-event.h>
22 #include <media/v4l2-fh.h>
23 #include <media/v4l2-fwnode.h>
24 #include <media/v4l2-ioctl.h>
25 #include <media/videobuf2-dma-contig.h>
29 #include "vi.h"
62 static int tegra_get_format_idx_by_code(struct tegra_vi *vi, in tegra_get_format_idx_by_code() argument
68 for (i = offset; i < vi->soc->nformats; ++i) { in tegra_get_format_idx_by_code()
69 if (vi->soc->video_formats[i].code == code) in tegra_get_format_idx_by_code()
[all …]
/kernel/linux/linux-6.6/drivers/staging/media/tegra-video/
Dtegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * This source file contains Tegra210 supported video formats,
8 * VI and CSI SoC specific data, operations and registers accessors.
18 #include "vi.h"
29 /* Tegra210 VI registers */
40 /* Tegra210 VI CSI registers */
64 /* Tegra210 CSI Pixel Parser registers: Starts from 0x838, offset 0x0 */
92 /* Tegra210 CSI PHY registers */
146 /* Tegra210 VI registers accessors */
150 writel_relaxed(val, chan->vi->iomem + addr); in tegra_vi_write()
[all …]
Dvi.h1 /* SPDX-License-Identifier: GPL-2.0-only */
16 #include <media/media-entity.h>
17 #include <media/v4l2-async.h>
18 #include <media/v4l2-ctrls.h>
19 #include <media/v4l2-device.h>
20 #include <media/v4l2-dev.h>
21 #include <media/v4l2-subdev.h>
22 #include <media/videobuf2-v4l2.h>
44 * struct tegra_vi_ops - Tegra VI operations
45 * @vi_enable: soc-specific operations needed to enable/disable the VI peripheral
[all …]
Dvideo.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <media/v4l2-event.h>
21 tegra_channels_cleanup(vid->vi); in tegra_v4l2_dev_release()
24 media_device_unregister(&vid->media_dev); in tegra_v4l2_dev_release()
25 media_device_cleanup(&vid->media_dev); in tegra_v4l2_dev_release()
39 v4l2_event_queue(&chan->video, arg); in tegra_v4l2_dev_notify()
40 if (ev->type == V4L2_EVENT_SOURCE_CHANGE && vb2_is_streaming(&chan->queue)) in tegra_v4l2_dev_notify()
41 vb2_queue_error(&chan->queue); in tegra_v4l2_dev_notify()
51 return -ENOMEM; in host1x_video_probe()
53 dev_set_drvdata(&dev->dev, vid); in host1x_video_probe()
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 tegra-video-objs := \
4 vi.o \
8 tegra-video-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20.o
9 tegra-video-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210.o
10 obj-$(CONFIG_VIDEO_TEGRA) += tegra-video.o
Dvi.c1 // SPDX-License-Identifier: GPL-2.0-only
21 #include <media/v4l2-dv-timings.h>
22 #include <media/v4l2-event.h>
23 #include <media/v4l2-fh.h>
24 #include <media/v4l2-fwnode.h>
25 #include <media/v4l2-ioctl.h>
26 #include <media/videobuf2-dma-contig.h>
30 #include "vi.h"
36 * struct tegra_vi_graph_entity - Entity in the video graph
66 static int tegra_get_format_idx_by_code(struct tegra_vi *vi, in tegra_get_format_idx_by_code() argument
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/i2c/
Dnvidia,tegra20-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra20-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 - Thierry Reding <thierry.reding@gmail.com>
9 - Jon Hunter <jonathanh@nvidia.com>
16 - description: Tegra20 has 4 generic I2C controller. This can support
17 master and slave mode of I2C communication. The i2c-tegra driver
19 controller is only compatible with "nvidia,tegra20-i2c".
20 const: nvidia,tegra20-i2c
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra20-host1x.txt4 - compatible: "nvidia,tegra<chip>-host1x"
5 - reg: Physical base address and length of the controller's registers.
6 For pre-Tegra186, one entry describing the whole register area.
7 For Tegra186, one entry for each entry in reg-names:
8 "vm" - VM region assigned to Linux
9 "hypervisor" - Hypervisor region (only if Linux acts as hypervisor)
10 - interrupts: The interrupt outputs from the controller.
11 - #address-cells: The number of cells used to represent physical base addresses
13 - #size-cells: The number of cells used to represent the size of an address
15 - ranges: The mapping of the host1x address space to the CPU address space.
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/nvidia/
Dtegra210.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra210-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra210-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/reset/tegra210-car.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/tegra124-soctherm.h>
10 #include <dt-bindings/soc/tegra-pmc.h>
[all …]
Dtegra210-p3450-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/input/linux-event-codes.h>
6 #include <dt-bindings/mfd/max77620.h>
8 #include "tegra210.dtsi"
12 compatible = "nvidia,p3450-0000", "nvidia,tegra210";
22 stdout-path = "serial0:115200n8";
33 avdd-pll-uerefe-supply = <&vdd_pex_1v05>;
34 hvddio-pex-supply = <&vdd_1v8>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/nvidia/
Dtegra210.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra210-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra210-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/reset/tegra210-car.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/tegra124-soctherm.h>
10 #include <dt-bindings/soc/tegra-pmc.h>
[all …]
/kernel/linux/linux-5.10/drivers/i2c/busses/
Di2c-tegra.c1 // SPDX-License-Identifier: GPL-2.0
3 * drivers/i2c/busses/i2c-tegra.c
13 #include <linux/dma-mapping.h>
50 #define I2C_FIFO_CONTROL_TX_TRIG(x) (((x) - 1) << 5)
51 #define I2C_FIFO_CONTROL_RX_TRIG(x) (((x) - 1) << 2)
129 #define I2C_MST_FIFO_CONTROL_RX_TRIG(x) (((x) - 1) << 4)
130 #define I2C_MST_FIFO_CONTROL_TX_TRIG(x) (((x) - 1) << 16)
153 * @MSG_END_REPEAT_START: Send repeat-start.
154 * @MSG_END_CONTINUE: Don't send stop or repeat-start.
164 * @has_continue_xfer_support: continue-transfer supported
[all …]
/kernel/linux/linux-6.6/drivers/i2c/busses/
Di2c-tegra.c1 // SPDX-License-Identifier: GPL-2.0
3 * drivers/i2c/busses/i2c-tegra.c
14 #include <linux/dma-mapping.h>
51 #define I2C_FIFO_CONTROL_TX_TRIG(x) (((x) - 1) << 5)
52 #define I2C_FIFO_CONTROL_RX_TRIG(x) (((x) - 1) << 2)
130 #define I2C_MST_FIFO_CONTROL_RX_TRIG(x) (((x) - 1) << 4)
131 #define I2C_MST_FIFO_CONTROL_TX_TRIG(x) (((x) - 1) << 16)
154 * @MSG_END_REPEAT_START: Send repeat-start.
155 * @MSG_END_CONTINUE: Don't send stop or repeat-start.
165 * @has_continue_xfer_support: continue-transfer supported
[all …]
/kernel/linux/linux-6.6/include/dt-bindings/clock/
Dtegra210-car.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * This header provides constants for binding nvidia,tegra210-car.
40 /* 20 (register bit affects vi and vi_sensor) */
/kernel/linux/linux-5.10/include/dt-bindings/clock/
Dtegra210-car.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * This header provides constants for binding nvidia,tegra210-car.
40 /* 20 (register bit affects vi and vi_sensor) */
/kernel/linux/linux-5.10/drivers/clk/tegra/
Dclk-tegra-periph.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
16 #include "clk-id.h"
130 #define MASK(x) (BIT(x) - 1)
616 INT("vi", mux_pllm_pllc_pllp_plla, CLK_SOURCE_VI, 20, 0, tegra_clk_vi),
623 INT8("vi", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_VI, 20, 0, tegra_clk_vi_8),
624 INT8("vi", mux_pllm_pllc2_c_c3_pllp_plla_pllc4, CLK_SOURCE_VI, 20, 0, tegra_clk_vi_9),
625 INT8("vi", mux_pllc2_c_c3_pllp_clkm_plla1_pllc4, CLK_SOURCE_VI, 20, 0, tegra_clk_vi_10),
781 * Critical for RAM re-repair operation, which must occur on resume
791 GATE("mipi-cal", "clk72mhz", 56, 0, tegra_clk_mipi_cal, 0),
[all …]
/kernel/linux/linux-6.6/drivers/clk/tegra/
Dclk-tegra-periph.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
16 #include "clk-id.h"
130 #define MASK(x) (BIT(x) - 1)
616 INT("vi", mux_pllm_pllc_pllp_plla, CLK_SOURCE_VI, 20, 0, tegra_clk_vi),
623 INT8("vi", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_VI, 20, 0, tegra_clk_vi_8),
624 INT8("vi", mux_pllm_pllc2_c_c3_pllp_plla_pllc4, CLK_SOURCE_VI, 20, 0, tegra_clk_vi_9),
625 INT8("vi", mux_pllc2_c_c3_pllp_clkm_plla1_pllc4, CLK_SOURCE_VI, 20, 0, tegra_clk_vi_10),
787 GATE("mipi-cal", "clk72mhz", 56, 0, tegra_clk_mipi_cal, 0),
873 dt_clk = tegra_lookup_dt_id(data->clk_id, tegra_clks); in periph_clk_init()
[all …]
/kernel/linux/linux-5.10/drivers/memory/tegra/
Dtegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <dt-bindings/memory/tegra210-mc.h>
586 /* read-only */
601 /* read-only */
994 /* read-only */
1009 /* read-only */
1044 { .name = "vi", .swgroup = TEGRA_SWGROUP_VI, .reg = 0x280 },
1101 TEGRA210_MC_RESET(VI, 0x200, 0x204, 17),

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