| /kernel/linux/linux-6.6/arch/arm/mm/ |
| D | cache-tauros2.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/mm/cache-tauros2.c - Tauros2 L2 cache controller support
8 * - PJ1 CPU Core Datasheet,
9 * Document ID MV-S104837-01, Rev 0.7, January 24 2008.
10 * - PJ4 CPU Core Datasheet,
11 * Document ID MV-S105190-00, Rev 0.7, March 14 2008.
20 #include <asm/hardware/cache-tauros2.h>
29 * When Tauros2 is used on a CPU that supports the v7 hierarchical
30 * cache operations, the cache handling code in proc-v7.S takes care
34 * being used on a pre-v7 CPU, and we only need to build support for
[all …]
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| D | proc-v7.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/proc-v7.S
9 #include <linux/arm-smccc.h>
14 #include <asm/asm-offsets.h>
16 #include <asm/pgtable-hwdef.h>
19 #include "proc-macros.S"
22 #include "proc-v7-3level.S"
24 #include "proc-v7-2level.S"
27 .arch armv7-a
48 * - loc - location to jump to for soft reset
[all …]
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| /kernel/linux/linux-5.10/arch/arm/mm/ |
| D | cache-tauros2.c | 2 * arch/arm/mm/cache-tauros2.c - Tauros2 L2 cache controller support
11 * - PJ1 CPU Core Datasheet,
12 * Document ID MV-S104837-01, Rev 0.7, January 24 2008.
13 * - PJ4 CPU Core Datasheet,
14 * Document ID MV-S105190-00, Rev 0.7, March 14 2008.
23 #include <asm/hardware/cache-tauros2.h>
32 * When Tauros2 is used on a CPU that supports the v7 hierarchical
33 * cache operations, the cache handling code in proc-v7.S takes care
37 * being used on a pre-v7 CPU, and we only need to build support for
39 * configured to support a pre-v7 CPU.
[all …]
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| D | proc-v7.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/proc-v7.S
9 #include <linux/arm-smccc.h>
14 #include <asm/asm-offsets.h>
16 #include <asm/pgtable-hwdef.h>
19 #include "proc-macros.S"
22 #include "proc-v7-3level.S"
24 #include "proc-v7-2level.S"
46 * - loc - location to jump to for soft reset
47 * - hyp - indicate if restart occurs in HYP mode
[all …]
|
| /kernel/linux/linux-6.6/arch/s390/crypto/ |
| D | crc32le-vx.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Hardware-accelerated CRC-32 variants for Linux on z Systems
6 * computing of bitreflected CRC-32 checksums for IEEE 802.3 Ethernet
9 * This CRC-32 implementation algorithm is bitreflected and processes
10 * the least-significant bit first (Little-Endian).
17 #include <asm/nospec-insn.h>
18 #include <asm/vx-insn.h>
20 /* Vector register range containing CRC-32 constants */
32 * The CRC-32 constant block contains reduction constants to fold and
35 * For the CRC-32 variants, the constants are precomputed according to
[all …]
|
| D | crc32be-vx.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Hardware-accelerated CRC-32 variants for Linux on z Systems
6 * computing of CRC-32 checksums.
8 * This CRC-32 implementation algorithm processes the most-significant
16 #include <asm/nospec-insn.h>
17 #include <asm/vx-insn.h>
19 /* Vector register range containing CRC-32 constants */
31 * The CRC-32 constant block contains reduction constants to fold and
34 * For the CRC-32 variants, the constants are precomputed according to
55 * CRC-32 (IEEE 802.3 Ethernet, ...) polynomials:
[all …]
|
| /kernel/linux/linux-5.10/arch/s390/crypto/ |
| D | crc32le-vx.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Hardware-accelerated CRC-32 variants for Linux on z Systems
6 * computing of bitreflected CRC-32 checksums for IEEE 802.3 Ethernet
9 * This CRC-32 implementation algorithm is bitreflected and processes
10 * the least-significant bit first (Little-Endian).
17 #include <asm/nospec-insn.h>
18 #include <asm/vx-insn.h>
20 /* Vector register range containing CRC-32 constants */
32 * The CRC-32 constant block contains reduction constants to fold and
35 * For the CRC-32 variants, the constants are precomputed according to
[all …]
|
| D | crc32be-vx.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Hardware-accelerated CRC-32 variants for Linux on z Systems
6 * computing of CRC-32 checksums.
8 * This CRC-32 implementation algorithm processes the most-significant
16 #include <asm/nospec-insn.h>
17 #include <asm/vx-insn.h>
19 /* Vector register range containing CRC-32 constants */
31 * The CRC-32 constant block contains reduction constants to fold and
34 * For the CRC-32 variants, the constants are precomputed according to
55 * CRC-32 (IEEE 802.3 Ethernet, ...) polynomials:
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/ |
| D | s5p-mfc.txt | 10 - compatible : value should be either one among the following
11 (a) "samsung,mfc-v5" for MFC v5 present in Exynos4 SoCs
12 (b) "samsung,mfc-v6" for MFC v6 present in Exynos5 SoCs
13 (c) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC
14 (d) "samsung,mfc-v8" for MFC v8 present in Exynos5800 SoC
15 (e) "samsung,exynos5433-mfc" for MFC v8 present in Exynos5433 SoC
16 (f) "samsung,mfc-v10" for MFC v10 present in Exynos7880 SoC
18 - reg : Physical base address of the IP registers and length of memory
21 - interrupts : MFC interrupt number to the CPU.
22 - clocks : from common clock binding: handle to mfc clock.
[all …]
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| /kernel/linux/linux-5.10/Documentation/networking/device_drivers/ethernet/dlink/ |
| D | dl2k.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 D-Link DL2000-based Gigabit Ethernet Adapter Installation
11 - Compatibility List
12 - Quick Install
13 - Compiling the Driver
14 - Installing the Driver
15 - Option parameter
16 - Configuration Script Sample
17 - Troubleshooting
25 - D-Link DGE-550T Gigabit Ethernet Adapter.
[all …]
|
| /kernel/linux/linux-6.6/Documentation/networking/device_drivers/ethernet/dlink/ |
| D | dl2k.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 D-Link DL2000-based Gigabit Ethernet Adapter Installation
11 - Compatibility List
12 - Quick Install
13 - Compiling the Driver
14 - Installing the Driver
15 - Option parameter
16 - Configuration Script Sample
17 - Troubleshooting
25 - D-Link DGE-550T Gigabit Ethernet Adapter.
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/mach-realview/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
28 bool "Support RealView(R) Emulation Baseboard"
32 Include support for the ARM(R) RealView(R) Emulation Baseboard
34 the ARM926EJ-S core tile, while on an ARMv6/v7 kernel, at least
35 one of the ARM1136, ARM1176, ARM11MPCore or Cortex-A9MPCore
39 bool "Support ARM1136J(F)-S Tile"
44 Realview(R) Emulation Baseboard platform.
47 bool "Support ARM1176JZ(F)-S Tile"
51 Realview(R) Emulation Baseboard platform.
54 bool "Support Multicore Cortex-A9 Tile"
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/include/asm/ |
| D | percpu.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
11 * Same as asm-generic/percpu.h, except that we store the per cpu offset
12 * in the TPIDRPRW. TPIDRPRW only exists on V6K and V7
18 asm volatile("mcr p15, 0, %0, c13, c0, 4" : : "r" (off) : "memory"); in set_my_cpu_offset()
30 asm("mrc p15, 0, %0, c13, c0, 4" : "=r" (off) in __my_cpu_offset()
41 #include <asm-generic/percpu.h>
|
| D | cachetype.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
26 * - v6+ is never VIVT
27 * - v7+ VIPT never aliases on D-side
74 asm volatile("mcr p15, 2, %0, c0, c0, 0" : : "r" (cache_selector)); in set_csselr()
81 asm volatile("mrc p15, 1, %0, c0, c0, 0" : "=r" (val)); in read_ccsidr()
|
| D | cacheflush.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1999-2002 Russell King
12 #include <asm/glue-cache.h>
17 #define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT)
29 * The arch/arm/mm/cache-*.S and arch/arm/mm/proc-*.S files
35 * See Documentation/core-api/cachetlb.rst for more information.
37 * effects are cache-type (VIVT/VIPT/PIPT) specific.
42 * Currently only needed for cache-v6.S and cache-v7.S, see
52 * inner shareable and invalidate the I-cache.
53 * Only needed from v7 onwards, falls back to flush_cache_all()
[all …]
|
| /kernel/linux/linux-6.6/Documentation/dev-tools/kunit/ |
| D | kunit_suitememorydiagram.svg | 1 <?xml version="1.0" encoding="UTF-8"?>
3 <g transform="translate(-13.724 -17.943)">
4 <g fill="#dad4d4" fill-opacity=".91765" stroke="#1a1a1a">
12 …nt-family="sans-serif" font-size="16px" style="line-height:1.25" xml:space="preserve"><tspan x="32…
14 <g transform="translate(0 -258.6)">
16 …nt-family="sans-serif" font-size="16px" style="line-height:1.25" xml:space="preserve"><tspan x="32…
18 <g transform="translate(0 -217.27)">
20 …nt-family="sans-serif" font-size="16px" style="line-height:1.25" xml:space="preserve"><tspan x="32…
22 <g transform="translate(0 -175.94)">
24 …nt-family="sans-serif" font-size="16px" style="line-height:1.25" xml:space="preserve"><tspan x="32…
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/include/asm/ |
| D | percpu.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
13 * Same as asm-generic/percpu.h, except that we store the per cpu offset
14 * in the TPIDRPRW. TPIDRPRW only exists on V6K and V7
25 asm volatile("mcr p15, 0, %0, c13, c0, 4" : : "r" (off) : "memory"); in set_my_cpu_offset()
53 " .long 0b - . \n\t" in __my_cpu_offset()
54 " b . + (2b - 0b) \n\t" in __my_cpu_offset()
57 : "=r" (off) in __my_cpu_offset()
68 #include <asm-generic/percpu.h>
|
| D | cachetype.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
26 * - v6+ is never VIVT
27 * - v7+ VIPT never aliases on D-side
74 asm volatile("mcr p15, 2, %0, c0, c0, 0" : : "r" (cache_selector)); in set_csselr()
81 asm volatile("mrc p15, 1, %0, c0, c0, 0" : "=r" (val)); in read_ccsidr()
|
| D | cacheflush.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1999-2002 Russell King
12 #include <asm/glue-cache.h>
17 #define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT)
29 * The arch/arm/mm/cache-*.S and arch/arm/mm/proc-*.S files
35 * See Documentation/core-api/cachetlb.rst for more information.
37 * effects are cache-type (VIVT/VIPT/PIPT) specific.
42 * Currently only needed for cache-v6.S and cache-v7.S, see
52 * inner shareable and invalidate the I-cache.
53 * Only needed from v7 onwards, falls back to flush_cache_all()
[all …]
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| /kernel/linux/linux-5.10/arch/arm64/crypto/ |
| D | poly1305-core.S_shipped | 36 and x9,x9,#-4
38 mov w9,#-1
60 .size poly1305_init,.-poly1305_init
66 ands x2,x2,#-16
87 add x12,x12,x13,lsl#26 // base 2^26 -> base 2^64
137 and x10,x14,#-4 // final reduction
151 .size poly1305_blocks,.-poly1305_blocks
175 add x12,x12,x13,lsl#26 // base 2^26 -> base 2^64
193 tst x14,#-4 // see if it's carried/borrowed
211 .size poly1305_emit,.-poly1305_emit
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/mach-versatile/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
48 Include support for the ARM(R) Integrator/AP and
52 bool "Include support for Integrator/IM-PD1"
60 The IM-PD1 is an add-on logic module for the Integrator which
61 allows ARM(R) Ltd PrimeCells to be developed and evaluated.
62 The IM-PD1 can be found on the Integrator/PP2 platform.
77 bool "Integrator/CM922T-XA10 core module"
83 bool "Integrator/CM926EJ-S core module"
107 bool "Integrator/CM1026EJ-S core module"
113 bool "Integrator/CM1136JF-S core module"
[all …]
|
| /kernel/linux/linux-6.6/arch/powerpc/crypto/ |
| D | poly1305-p10le_64.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
10 # Poly1305 - this version mainly using vector/VSX/Scalar
11 # - 26 bits limbs
12 # - Handle multiple 64 byte blcok.
15 # key = (r, s)
16 # clamp r &= 0x0FFFFFFC0FFFFFFC 0x0FFFFFFC0FFFFFFF
17 # p = 2^130 - 5
19 # a = (r + a) % p
23 # h4 = m1 * r⁴ + m2 * r³ + m3 * r² + m4 * r
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/remoteproc/ |
| D | xlnx,zynqmp-r5fss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/xlnx,zynqmp-r5fss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ben Levinsky <ben.levinsky@amd.com>
11 - Tanmay Shah <tanmay.shah@amd.com>
14 The Xilinx platforms include a pair of Cortex-R5F processors (RPU) for
15 real-time processing based on the Cortex-R5F processor core from ARM.
16 The Cortex-R5F processor implements the Arm v7-R architecture and includes a
17 floating-point unit that implements the Arm VFPv3 instruction set.
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/allwinner/ |
| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
2 dtb-$(CONFIG_MACH_SUN4I) += \
3 sun4i-a10-a1000.dtb \
4 sun4i-a10-ba10-tvbox.dtb \
5 sun4i-a10-chuwi-v7-cw0825.dtb \
6 sun4i-a10-cubieboard.dtb \
7 sun4i-a10-dserve-dsrv9703c.dtb \
8 sun4i-a10-gemei-g9.dtb \
9 sun4i-a10-hackberry.dtb \
10 sun4i-a10-hyundai-a7hd.dtb \
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/aspeed/ |
| D | aspeed-bmc-inventec-starscream.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include "aspeed-g6-pinctrl.dtsi"
8 #include <dt-bindings/i2c/i2c.h>
9 #include <dt-bindings/gpio/aspeed-gpio.h>
13 compatible = "inventec,starscream-bmc", "aspeed,ast2600";
20 stdout-path = &uart5;
28 reserved-memory {
29 #address-cells = <1>;
[all …]
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![[all …]](/OpenHarmony-v5.0.1-Release/more/kernel/linux/linux-6.6/Documentation/dev-tools/kunit/kunit_suitememorydiagram.svg?full=v7%5C-R){kind=link}