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1 /*
2  * Copyright (C) 2021 HiSilicon (Shanghai) Technologies CO., LIMITED.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * as published by the Free Software Foundation; either version 2
7  * of the License, or (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
17  */
18 #ifndef __HI_COMM_HDMI_ADAPT_H__
19 #define __HI_COMM_HDMI_ADAPT_H__
20 
21 #include "hi_type.h"
22 #include "hi_comm_hdmi.h"
23 
24 #ifdef __cplusplus
25 #if __cplusplus
26 extern "C" {
27 #endif
28 #endif
29 
30 typedef HI_HDMI_ID_E                 hi_hdmi_id;
31 typedef HI_HDMI_INFOFRAME_TYPE_E     hi_hdmi_infoframe_type;
32 typedef HI_HDMI_FORCE_ACTION_E       hi_hdmi_force_active;
33 typedef HI_HDMI_TRACE_LEN_E          hi_hdmi_trace_len;
34 typedef HI_HDMI_VIDEO_FMT_E          hi_hdmi_video_fmt;
35 typedef HI_HDMI_AUDIO_FORMAT_CODE_E  hi_hdmi_audio_format_code;
36 typedef HI_HDMI_SAMPLE_RATE_E        hi_hdmi_sample_rate;
37 typedef HI_HDMI_BIT_DEPTH_E          hi_hdmi_bit_depth;
38 typedef HI_HDMI_VIDEO_MODE_E         hi_hdmi_video_mode;
39 typedef HI_HDMI_QUANTIZATION_E       hi_hdmi_quantization;
40 typedef HI_HDMI_DEEP_COLOR_E         hi_hdmi_deep_color;
41 typedef HI_HDMI_SND_INTERFACE_E      hi_hdmi_snd_inteface;
42 typedef HI_HDMI_AUDIO_CHANEL_CNT_E   hi_hdmi_audio_chanel_cnt;
43 typedef HI_HDMI_CODING_TYPE_E        hi_hdmi_coding_type;
44 typedef HI_HDMI_AUDIO_SAMPLE_SIZE_E  hi_hdmi_audio_sample_size;
45 typedef HI_HDMI_AUDIO_SAMPLE_FREQ_E  hi_hdmi_audio_sample_freq;
46 typedef HI_HDMI_LEVEL_SHIFT_VALUE_E  hi_hdmi_level_shift_value;
47 typedef HI_HDMI_LFE_PLAYBACK_LEVEL_E hi_hdmi_lfe_playback_level;
48 typedef HI_HDMI_COLOR_SPACE_E        hi_hdmi_color_space;
49 typedef HI_HDMI_BARINFO_E            hi_hdmi_bar_info;
50 typedef HI_HDMI_SCANINFO_E           hi_hdmi_scan_info;
51 typedef HI_HDMI_COLORIMETRY_E        hi_hdmi_colormetry;
52 typedef HI_HDMI_EXT_COLORIMETRY_E    hi_hdmi_ext_colormetry;
53 typedef HI_HDMI_PIC_ASPECT_RATIO_E   hi_pic_aspect_ratio;
54 typedef HI_HDMI_ACT_ASPECT_RATIO_E   hi_hdmi_act_aspect_ratio;
55 typedef HI_HDMI_PICTURE_SCALING_E    hi_hdmi_picture_scaline;
56 typedef HI_HDMI_RGB_QUAN_RAGE_E      hi_hdmi_rgb_quan_rage;
57 typedef HI_HDMI_PIXEL_REPETITION_E   hi_hdmi_pixel_repetition;
58 typedef HI_HDMI_CONTENT_TYPE_E       hi_hdmi_content_type;
59 typedef HI_HDMI_YCC_QUAN_RAGE_E      hi_hdmi_ycc_quan_rage;
60 typedef HI_CEC_LOGICALADD_E          hi_cec_logical_addr;
61 typedef HI_HDMI_EVENT_TYPE_E         hi_hdmi_event_type;
62 
63 typedef struct {
64     hi_u8 length;
65     hi_u8 data[15]; // 15 for max data length
66 } hi_cec_raw_data;
67 
68 typedef struct {
69     hi_cec_logical_addr src_addr;
70     hi_cec_logical_addr dst_addr;
71     hi_u8 opcode;
72     hi_cec_raw_data raw_data;
73 } hi_mpi_hdmi_cec_cmd;
74 
75 typedef void (*hi_hdmi_callback)(hi_hdmi_event_type event, hi_void *private_data);
76 typedef hi_void (*hi_hdmi_cec_callback)(hi_hdmi_id hdmi, hi_mpi_hdmi_cec_cmd *cec_cmd, hi_void *data);
77 
78 typedef struct {
79     /* Audio coding type */
80     hi_hdmi_audio_format_code aud_fmt_code;
81     /* Audio sample rate */
82     hi_hdmi_sample_rate support_sample_rate[HI_HDMI_MAX_SAMPLE_RATE_NUM];
83     /* Aud Channel of the coding type */
84     hi_u8 aud_channel;
85     /* sample bit depth,when audio format code is HI_UNF_EDID_AUDIO_FORMAT_CODE_PCM */
86     hi_hdmi_bit_depth support_bit_depth[HI_HDMI_MAX_BIT_DEPTH_NUM];
87     /* sample bit depth Num,when audio format code is HI_UNF_EDID_AUDIO_FORMAT_CODE_PCM */
88     hi_u32 support_bit_depth_num;
89     /*
90      * enter max bit rate, when audio format code is
91      * HI_UNF_EDID_AUDIO_FORMAT_CODE_AC3 - HI_UNF_EDID_AUDIO_FORMAT_CODE_ATRAC
92      */
93     hi_u32 max_bit_rate;
94 } hi_hdmi_audio_info;
95 
96 typedef struct {
97     hi_bool eotf_sdr;          /* Traditional gamma - SDR Luminance Range. */
98     hi_bool eotf_hdr;          /* Traditional gamma - HDR Luminance Range. */
99     hi_bool eotf_smpte_st2084; /* SMPTE ST 2084 */
100     hi_bool eotf_hlg;          /* Hybrid Log-Gamma(HLG) based on Recommendation ITU-R BT.2100-0 */
101     hi_bool eotf_future;       /* Future EOTF */
102 } hi_hdmi_eotf;
103 
104 typedef struct {
105     hi_bool descriptor_type1; /* Support Static Metadata Type 1 or not. */
106 } hi_hdmi_hdr_matadata_type;
107 
108 typedef struct {
109     /* EOTF support. */
110     hi_hdmi_eotf eotf;
111     /* static metadata descriptor type(ID) support. */
112     hi_hdmi_hdr_matadata_type metadata;
113     /* Desired Content Max Luminance Data. Real value(in 1cd/m^2) = 50.2^(CV/32) */
114     hi_u8 max_luminance_cv;
115     /* Desired Content Max Frame-average Luminance. Real value(in 1cd/m^2) = 50.2^(CV/32) */
116     hi_u8 average_lumin_cv;
117     /*
118      * Desired Content Min Luminance Data.
119      * Real value(in 1cd/m^2) = u8MaxLuminance_CV * (u8MinLuminance_CV/255)^2 / 100
120      */
121     hi_u8 min_luminance_cv;
122 } hi_hdmi_hdr_cap;
123 
124 typedef struct {
125     hi_u32  vfb;            /* vertical front blank */
126     hi_u32  vbb;            /* vertical back blank */
127     hi_u32  vact;           /* vertical active area */
128     hi_u32  hfb;            /* horizontal front blank */
129     hi_u32  hbb;            /* horizontal back blank */
130     hi_u32  hact;           /* horizontal active area */
131     hi_u32  vpw;            /* vertical sync pulse width */
132     hi_u32  hpw;            /* horizontal sync pulse width */
133     hi_bool idv;            /* flag of data valid signal is needed flip */
134     hi_bool ihs;            /* flag of horizontal sync pulse is needed flip */
135     hi_bool ivs;            /* flag of vertical sync pulse is needed flip */
136     hi_u32  image_width;    /* image width */
137     hi_u32  image_height;   /* image height */
138     hi_u32  aspect_ratio_w; /* aspect ratio width */
139     hi_u32  aspect_ratio_h; /* aspect ratio height */
140     hi_bool interlace;      /* flag of interlace */
141     hi_s32  pixel_clk;      /* pixelc clk for this timing, unit:KHz */
142 } hi_hdmi_timing_info;
143 
144 typedef struct {
145     hi_u32 det_timing_num;
146     hi_hdmi_timing_info det_timing[10];
147 } hi_hdmi_det_timing;
148 
149 typedef struct {
150     /* Whether the devices are connected. */
151     hi_bool connected;
152     /* Whether the HDMI is supported by the device. If the HDMI is not supported by the device, the device is DVI. */
153     hi_bool support_hdmi;
154     /* Whether the sink device is powered on. */
155     hi_bool is_sink_power_on;
156     /*
157      * Whether the EDID obtains the flag from the sink device.
158      * HI_TRUE: The EDID information is correctly read.
159      * HI_FALSE: default settings
160      */
161     hi_bool is_real_edid;
162     /* Physical resolution of the display device. */
163     hi_hdmi_video_fmt native_video_format;
164     /*
165      * Video capability set.
166      * HI_TRUE: This display format is supported.
167      * HI_FALSE: This display format is not supported.
168      */
169     hi_bool video_fmt_supported[HI_HDMI_VIDEO_FMT_BUTT];
170     /*
171      * Whether the YCBCR display is supported.
172      * HI_TRUE: The YCBCR display is supported.
173      * HI_FALSE: Only red-green-blue (RGB) is supported.
174      */
175     hi_bool support_ycbcr;
176     /* Whether the xvYCC601 color format is supported. */
177     hi_bool support_xvycc601;
178     /* Whether the xvYCC709 color format is supported. */
179     hi_bool support_xvycc709;
180     hi_bool support_bt2020_ycc;
181     /* Transfer profile supported by xvYCC601. 1: P0; 2: P1; 4: P2. */
182     hi_u8 md_bit;
183     /* Num of audio Info */
184     hi_u32 audio_info_num;
185     /* Audio Info.For details, see Table 37 in EIA-CEA-861-D. */
186     hi_hdmi_audio_info audio_info[HI_HDMI_MAX_AUDIO_CAP_COUNT];
187     /* Speaker position. For details, see the definition of SpeakerDATABlock in EIA-CEA-861-D. */
188     hi_bool speaker[HDMI_AUDIO_SPEAKER_BUTT];
189     /* Device vendor flag */
190     hi_u8 id_manufacture_name[4];
191     /* Device ID. */
192     hi_u32 id_product_code;
193     /* Device sequence number. */
194     hi_u32 id_serial_number;
195     /* Device production data (week). */
196     hi_u32 week_of_manufacture;
197     /* Set the production data (year). */
198     hi_u32 year_of_manufacture;
199     /* Device version number */
200     hi_u8 version;
201     /* Device sub version number */
202     hi_u8 revision;
203     /* EDID extended block number */
204     hi_u8 edid_extern_block_num;
205     /* Valid flag of the consumer electronics control (CEC) physical address */
206     hi_bool is_phy_addr_valid;
207     /* CEC physical address A */
208     hi_u8 phy_addr_a;
209     /* CEC physical address B */
210     hi_u8 phy_addr_b;
211     /* CEC physical address C */
212     hi_u8 phy_addr_c;
213     /* CEC physical address D */
214     hi_u8 phy_addr_d;
215     /* Whether to support the DVI dual-link operation. */
216     hi_bool support_dvi_dual;
217     /* Whether to support the YCBCR 4:4:4 deep-color mode. */
218     hi_bool support_deep_color_ycbcr444;
219     /* Whether to support the deep-color 30-bit mode. */
220     hi_bool support_deep_color_30bit;
221     /* Whether to support the deep-color 36-bit mode. */
222     hi_bool support_deep_color_36bit;
223     /* Whether to support the deep-color 48-bit mode. */
224     hi_bool support_deep_color_48bit;
225     /* Whether to support the Supports_AI mode. */
226     hi_bool support_ai;
227     /* Maximum TMDS clock. */
228     hi_u32 max_tmds_clock;
229     /* Delay flag bit. */
230     hi_bool i_latency_fields_present;
231     /* whether Video_Latency and Audio_Latency fields are present */
232     hi_bool latency_fields_present;
233     /* Special video format */
234     hi_bool hdmi_video_present;
235     /* Video delay */
236     hi_u8 video_latency;
237     /* Audio delay */
238     hi_u8 audio_latency;
239     /* Video delay in interlaced video mode */
240     hi_u8 interlaced_video_latency;
241     /* Audio delay in interlaced video mode */
242     hi_u8 interlaced_audio_latency;
243     /* Whether to support the YUV420 deep-color 30-bit mode. */
244     hi_bool support_y420_dc_30bit;
245     /* Whether to support the YUV420 deep-color 36-bit mode. */
246     hi_bool support_y420_dc_36bit;
247     /* Whether to support the YUV420 deep-color 48-bit mode. */
248     hi_bool support_y420_dc_48bit;
249     /* Whether to support HDMI2.0. */
250     hi_bool support_hdmi_20;
251     /* the format support YUV420 */
252     hi_bool support_y420_format[HI_HDMI_VIDEO_FMT_BUTT];
253     /* the format only support YUV420 */
254     hi_bool only_support_y420_format[HI_HDMI_VIDEO_FMT_BUTT];
255     /*
256      * flag of RGB Quantization Range selectable.
257      * when HI_TRUE,sink expect full/limited range is selectable;
258      * or sink expect default range.
259      */
260     hi_bool ycc_qrange_selectable;
261     /*
262      * flag of YCC Quantization Range selectable.
263      * when HI_TRUE,sink expect full/limited range is selectable;or sink expect default range.
264      */
265     hi_bool rgb_qrange_selectable;
266     /* HDR support flag.When HDR Static Metadata Data Block is indicated,flag HI_TRUE;or,HI_FALSE. */
267     hi_bool hdr_support;
268     /* HDR capability */
269     hi_hdmi_hdr_cap hdr;
270     /* Detailed timing information */
271     hi_hdmi_det_timing detailed_timing;
272 } hi_hdmi_sink_capability;
273 
274 typedef struct {
275     /* Whether to forcibly output the video over the HDMI. */
276     hi_bool enable_hdmi;
277     /*
278      * Whether to output video.
279      * The value must be HI_TRUE.If the value is HI_FALSE, the HDMI is forcibly set to HI_TRUE.
280      */
281     hi_bool enable_video;
282     /* Video norm. This value of the video norm must be consistent with the norm of the video output. */
283     hi_hdmi_video_fmt video_fmt;
284     /* HDMI input video input mode.VIDEO_MODE_YCBCR444,VIDEO_MODE_YCBCR422,VIDEO_MODE_YCBCR420,VIDEO_MODE_RGB444 */
285     hi_hdmi_video_mode vid_in_mode;
286     /* HDMI output video output mode.VIDEO_MODE_YCBCR444,VIDEO_MODE_YCBCR422,VIDEO_MODE_YCBCR420,VIDEO_MODE_RGB444 */
287     hi_hdmi_video_mode vid_out_mode;
288     /* CSC output quantization range HDMI_QUANTIZATION_RANGE_LIMITED, HDMI_QUANTIZATION_RANGE_FULL>**/
289     hi_hdmi_quantization out_csc_quantization;
290     /* DeepColor output mode.It is HI_HDMI_DEEP_COLOR_24BIT by default. */
291     hi_hdmi_deep_color deep_color_mode;
292     /* Whether to enable the xvYCC output mode.It is HI_FALSE by default. */
293     hi_bool xvycc_mode;
294     /* Whether to enable the audio. */
295     hi_bool enable_audio;
296     /* HDMI audio source.It is set to HI_HDMI_SND_INTERFACE_I2S, which needs to be consistent with the VO interface. */
297     hi_hdmi_snd_inteface sound_intf;
298     /* Multi-channel or stereo 0: stereo 1: eight-channel fixed for multi-channel */
299     hi_bool is_multi_channel;
300     /* Audio sampling rate. This parameter needs to be consistent with that of the VO. */
301     hi_hdmi_sample_rate sample_rate;
302     /* Audio down sampling rate parameter. It is 0 by default. */
303     hi_u8 down_sample_parm;
304     /* Audio bit width. It is 16 by default. This parameter needs to be consistent with that of the VO. */
305     hi_hdmi_bit_depth bit_depth;
306     /* Reserved. It is set to 0. I2S control (0x7A:0x1D) */
307     hi_u8 i2s_ctl_vbit;
308     /* Whether to enable AVI InfoFrame.It is recommended to enable this function. */
309     hi_bool enable_avi_infoframe;
310     /* Whether to enable AUDIO InfoFrame.It is recommended to enable this function. */
311     hi_bool enable_aud_infoframe;
312     /* Whether to enable SPD InfoFrame.It is recommended to disable this function. */
313     hi_bool enable_spd_infoframe;
314     /* Whether to enable MPEG InfoFrame.It is recommended to disable this function. */
315     hi_bool enable_mpeg_infoframe;
316     /* Whether to enable the debug information in the HDMI.It is recommended to disable this function. */
317     hi_bool debug_flag;
318     /* Whether to enable the HDCP.0: disabled 1: enabled */
319     hi_bool enable_hdcp;
320     /* Whether to enable 3D mode. 0: disabled 1: enabled */
321     hi_bool enable_3d;
322     /* 3D Parameter. The default value is 9. */
323     hi_u8 param_3d;
324     /* When get capability fail,HDMI forcibly(priority) judgments output video mode.Default is HI_HDMI_FORCE_HDMI. */
325     hi_hdmi_force_active default_mode;
326     /* Whether to enable auth mode. 0: disabled 1: enabled */
327     hi_bool auth_mode;
328     /*
329      * Enable flag of video mode & DVI adapting case of user setting incorrect,
330      * default:HI_TRUE.When user have no any adapting strategy,suggestion HI_TRUE
331      */
332     hi_bool enable_vid_mode_adapt;
333     /*
334      * Enable flag of deep color mode adapting case of user setting incorrect,
335      * default: HI_FALSE.When user have no any adapting strategy,suggestion HI_TRUE
336      */
337     hi_bool enable_deep_color_adapt;
338     /*
339      * Pixclk of enVideoFmt(unit is kHz).
340      * (This param is valid only when enVideoFmt is HI_HDMI_VIDEO_FMT_VESA_CUSTOMER_DEFINE)
341      */
342     hi_u32 pix_clk;
343 } hi_hdmi_attr;
344 
345 typedef struct {
346     hi_bool edid_valid;
347     hi_u32  edid_length;
348     hi_u8   edid[512];
349 } hi_hdmi_edid;
350 
351 typedef struct {
352     hi_hdmi_audio_chanel_cnt   channel_count;
353     hi_hdmi_coding_type        coding_type;
354     hi_hdmi_audio_sample_size  sample_size;
355     hi_hdmi_audio_sample_freq  sampling_frequency;
356     hi_u8                      channel_alloc; /* Channel/Speaker Allocation.Range [0,255] */
357     hi_hdmi_level_shift_value  level_shift;
358     hi_hdmi_lfe_playback_level lfe_playback_level;
359     hi_bool                    down_mix_inhibit;
360 } hi_hdmi_aud_infoframe_ver1;
361 
362 typedef struct {
363     hi_hdmi_video_fmt        timing_mode;
364     hi_hdmi_color_space      color_space;
365     hi_bool                  active_info_present;
366     hi_hdmi_bar_info         bar_info;
367     hi_hdmi_scan_info        scan_info;
368     hi_hdmi_colormetry       colorimetry;
369     hi_hdmi_ext_colormetry   ext_colorimetry;
370     hi_pic_aspect_ratio      aspect_ratio;
371     hi_hdmi_act_aspect_ratio active_aspect_ratio;
372     hi_hdmi_picture_scaline  picture_scaling;
373     hi_hdmi_rgb_quan_rage    rgb_quantization;
374     hi_bool                  is_it_content;
375     hi_hdmi_pixel_repetition pixel_repetition;
376     hi_hdmi_content_type     content_type;
377     hi_hdmi_ycc_quan_rage    ycc_quantization;
378     hi_u16                   line_n_end_of_top_bar;
379     hi_u16                   line_n_start_of_bot_bar;
380     hi_u16                   pixel_n_end_of_left_bar;
381     hi_u16                   pixel_n_start_of_right_bar;
382 } hi_hdmi_avi_infoframe_ver2;
383 
384 typedef struct {
385     hi_u8 vendor_name[HI_HDMI_VENDOR_NAME_SIZE];
386     hi_u8 product_description[HI_HDMI_VENDOR_DESC_SIZE];
387 } hi_hdmi_spd_infoframe;
388 
389 typedef struct {
390     hi_u32  mpeg_bit_rate;
391     hi_bool is_field_repeated;
392 } hi_hdmi_mpegsource_infoframe;
393 
394 typedef struct {
395     hi_u8 data_len;
396     hi_u8 user_data[HI_HDMI_VENDOR_USER_DATA_MAX_LEN];
397 } hi_hdmi_vendorspec_infoframe;
398 
399 typedef union {
400     hi_hdmi_avi_infoframe_ver2   avi_infoframe;
401     hi_hdmi_aud_infoframe_ver1   aud_infoframe;
402     hi_hdmi_spd_infoframe        spd_infoframe;
403     hi_hdmi_mpegsource_infoframe mpeg_source_infoframe;
404     hi_hdmi_vendorspec_infoframe vendor_spec_infoframe;
405 } hi_hdmi_infoframe_unit;
406 
407 typedef struct {
408     hi_hdmi_infoframe_type infoframe_type; /* InfoFrame type */
409     hi_hdmi_infoframe_unit infor_unit;     /* InfoFrame date */
410 } hi_hdmi_infoframe;
411 
412 typedef struct {
413     hi_hdmi_callback pfn_hdmi_event_callback; /* Event handling callback function */
414     hi_void *private_data;                    /* Private data of the callback functions and parameters */
415 } hi_hdmi_callback_func;
416 
417 typedef struct {
418     hi_hdmi_cec_callback pfn_cec_callback; /* Event handling callback function */
419     hi_void *private_data;                 /* Private data of the CEC callback functions and parameters */
420 } hi_hdmi_cec_callback_func;
421 
422 typedef struct {
423     hi_bool enable;
424     hi_u8 physical_addr[4];                 /* CEC physic addr */
425     hi_u8 logical_addr;                     /* CEC logic addr, default:0x03. */
426     hi_u8 net_work[HI_CEC_LOGICALADD_BUTT]; /* CEC's net work, 1:this device can answer cec command */
427 } hi_hdmi_cec_status;
428 
429 typedef struct {
430     hi_hdmi_trace_len trace_len; /* Phy parameters selection. */
431 } hi_hdmi_mod_param;
432 
433 typedef struct {
434     hi_hdmi_force_active default_mode;
435 } adapt_hdmi_open_para;
436 
437 typedef struct {
438     hi_bool connected;     /* The Device is connected or disconnected */
439     hi_bool sink_power_on; /* The sink is PowerOn or not */
440     hi_bool authed;        /* HDCP Authentication */
441     hi_u8   bksv[5];       /* Bksv of sink 40bits */
442 } hi_hdmi_status;
443 
444 #ifdef __cplusplus
445 #if __cplusplus
446 }
447 #endif
448 #endif
449 #endif
450 
451