Lines Matching +full:engine +full:- +full:specific

1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mtd/nand-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Miquel Raynal <miquel.raynal@bootlin.com>
11   - Richard Weinberger <richard@nod.at>
21   they request the ECC engine to correct {strength} bit errors per
24   The interpretation of these parameters is implementation-defined, so
31     pattern: "^nand-controller(@.*)?"
33   "#address-cells":
36   "#size-cells":
42   "^nand@[a-f0-9]$":
47           Contains the chip-select IDs.
49       nand-ecc-mode:
51           Desired ECC engine, either hardware (most of the time
54           and should be replaced by soft and nand-ecc-algo.
56         enum: [none, soft, hw, hw_syndrome, hw_oob_first, on-die]
58       nand-ecc-engine:
60           - $ref: /schemas/types.yaml#/definitions/phandle
62           A phandle on the hardware ECC engine if any. There are
64           1/ The ECC engine is part of the NAND controller, in this
66           2/ The ECC engine is part of the NAND part (on-die), in this
68           3/ The ECC engine is external, in this case the phandle should
69           reference the specific ECC engine node.
71       nand-use-soft-ecc-engine:
73         description: Use a software ECC engine.
75       nand-no-ecc-engine:
79       nand-ecc-placement:
81           - $ref: /schemas/types.yaml#/definitions/string
82           - enum: [ oob, interleaved ]
89       nand-ecc-algo:
95       nand-bus-width:
102       nand-on-flash-bbt:
108           it as the device ages. Otherwise, the out-of-band area of a
113       nand-ecc-strength:
119       nand-ecc-step-size:
125       nand-ecc-maximize:
130           dependent. The ECC engine has to select the ECC config
133           only the in-band area is used by the upper layers, and you
136       nand-is-boot-medium:
143       nand-rb:
144         $ref: /schemas/types.yaml#/definitions/uint32-array
148       rb-gpios:
156       - reg
159   - "#address-cells"
160   - "#size-cells"
165   - |
166     nand-controller {
167       #address-cells = <1>;
168       #size-cells = <0>;
170       /* controller specific properties */
174         nand-ecc-mode = "soft";
175         nand-ecc-algo = "bch";
177         /* NAND chip specific properties */