Lines Matching +full:1 +full:a000
19 #address-cells = <1>;
20 #size-cells = <1>;
56 #address-cells = <1>;
57 #size-cells = <1>;
69 hdq1w: 1w@480b2000 {
70 compatible = "ti,omap2420-1w";
76 intc: interrupt-controller@1 {
79 #interrupt-cells = <1>;
96 ti,syss-mask = <1>;
99 #address-cells = <1>;
100 #size-cells = <1>;
110 #dma-cells = <1>;
120 #address-cells = <1>;
131 #address-cells = <1>;
149 mcspi2: spi@4809a000 {
174 uart1: serial@4806a000 {
204 timer2_target: target-module@4802a000 {
218 ti,syss-mask = <1>;
221 #address-cells = <1>;
222 #size-cells = <1>;
239 timer4: timer@4807a000 {
302 timer12: timer@4808a000 {
315 #address-cells = <1>;
316 #size-cells = <1>;