1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/dma-mapping.h>
65 	ltq_dma_w32(ch->nr, LTQ_DMA_CS);  in ltq_dma_enable_irq()
66 	ltq_dma_w32_mask(0, 1 << ch->nr, LTQ_DMA_IRNEN);  in ltq_dma_enable_irq()
77 	ltq_dma_w32(ch->nr, LTQ_DMA_CS);  in ltq_dma_disable_irq()
78 	ltq_dma_w32_mask(1 << ch->nr, 0, LTQ_DMA_IRNEN);  in ltq_dma_disable_irq()
89 	ltq_dma_w32(ch->nr, LTQ_DMA_CS);  in ltq_dma_ack_irq()
101 	ltq_dma_w32(ch->nr, LTQ_DMA_CS);  in ltq_dma_open()
113 	ltq_dma_w32(ch->nr, LTQ_DMA_CS);  in ltq_dma_close()
115 	ltq_dma_w32_mask(1 << ch->nr, 0, LTQ_DMA_IRNEN);  in ltq_dma_close()
125 	ch->desc = 0;  in ltq_dma_alloc()
126 	ch->desc_base = dma_alloc_coherent(ch->dev,  in ltq_dma_alloc()
128 					   &ch->phys, GFP_ATOMIC);  in ltq_dma_alloc()
131 	ltq_dma_w32(ch->nr, LTQ_DMA_CS);  in ltq_dma_alloc()
132 	ltq_dma_w32(ch->phys, LTQ_DMA_CDBA);  in ltq_dma_alloc()
151 	ltq_dma_w32_mask(0, 1 << ch->nr, LTQ_DMA_IRNEN);  in ltq_dma_alloc_tx()
166 	ltq_dma_w32_mask(0, 1 << ch->nr, LTQ_DMA_IRNEN);  in ltq_dma_alloc_rx()
175 	if (!ch->desc_base)  in ltq_dma_free()
178 	dma_free_coherent(ch->dev, LTQ_DESC_NUM * LTQ_DESC_SIZE,  in ltq_dma_free()
179 		ch->desc_base, ch->phys);  in ltq_dma_free()
190 		 * Tell the DMA engine to swap the endianness of data frames and  in ltq_dma_init_port()
218 	ltq_dma_membase = devm_ioremap_resource(&pdev->dev, res);  in ltq_dma_init()
220 		panic("Failed to remap dma resource");  in ltq_dma_init()
222 	/* power up and reset the dma engine */  in ltq_dma_init()
223 	clk = clk_get(&pdev->dev, NULL);  in ltq_dma_init()
225 		panic("Failed to get dma clock");  in ltq_dma_init()
245 	dev_info(&pdev->dev,  in ltq_dma_init()
246 		"Init done - hw rev: %X, ports: %d, channels: %d\n",  in ltq_dma_init()
253 	{ .compatible = "lantiq,dma-xway" },
260 		.name = "dma-xway",