Lines Matching full:apic
3 * Local APIC handling, local APIC timers
13 * Mikael Pettersson : Power Management for UP-APIC.
49 #include <asm/apic.h>
75 * The highest APIC ID seen during enumeration.
98 * Map cpu index to physical APIC ID
111 * depending on apic in use. The following early percpu variable is
117 /* Local APIC was disabled by the BIOS and enabled by the kernel */
124 * local APIC. Before entering Symmetric I/O Mode, either
132 /* NMI and 8259 INTR go through APIC */ in imcr_pic_to_apic()
146 * Knob to control our willingness to enable the local APIC.
153 * APIC command line parameters
178 /* Disable local APIC timer from the kernel commandline or via dmi quirk */
180 /* Local APIC timer works in C2 */
195 .name = "Local APIC",
214 * Check, if the APIC is integrated or a separate chip
222 * Check, whether this is a modern or a first generation APIC
226 /* AMD systems use old APIC versions, so check the CPU */ in modern_apic()
231 /* Hygon systems use modern APIC */ in modern_apic()
239 * right after this call apic become NOOP driven
240 * so apic->write/read doesn't do anything
244 pr_info("APIC: switched to apic NOOP\n"); in apic_disable()
245 apic = &apic_noop; in apic_disable()
307 * - we always have APIC integrated on 64bit mode in lapic_get_maxlvt()
314 * Local APIC timer
322 * This function sets up the local APIC timer, with a timeout of
323 * 'clocks' APIC bus clock. During calibration we actually call
329 * P5 APIC double write bug.
352 * writing to the APIC LVTT and TSC_DEADLINE MSR isn't serialized. in __setup_APIC_LVTT()
439 pr_err(FW_BUG "cpu %d, try to use APIC%lX (LVT offset %d) for " in setup_APIC_eilvt()
447 pr_err(FW_BUG "cpu %d, try to use APIC%lX (LVT offset %d) for " in setup_APIC_eilvt()
520 * Local APIC timer broadcast function
525 apic->send_IPI_mask(mask, LOCAL_TIMER_VECTOR); in lapic_timer_broadcast()
531 * The local apic timer can be used for any function which is CPU local.
607 * Setup the local APIC timer for this CPU. Copy the initialized values
660 * In this functions we calibrate APIC bus clocks to the external timer.
663 * irqs syncron. CPUs connected by the same APIC bus have the very same bus
747 pr_warn("APIC calibration not consistent " in calibrate_by_pmtimer()
753 pr_info("APIC delta adjusted to PM-Timer: " in calibrate_by_pmtimer()
792 * and apic timer calibration. in apic_needs_pit()
797 /* Is there an APIC at all or is it disabled? */ in apic_needs_pit()
803 * configuration, the local APIC timer wont be set up. Make sure in apic_needs_pit()
818 /* APIC timer disabled? */ in apic_needs_pit()
822 * The APIC timer frequency is known already, no PIT calibration in apic_needs_pit()
850 * local APIC timer, no need for broadcast timer. in calibrate_APIC_clock()
856 apic_printk(APIC_VERBOSE, "Using local APIC timer interrupts.\n" in calibrate_APIC_clock()
857 "calibrating APIC timer ...\n"); in calibrate_APIC_clock()
867 * Setup the APIC counter to maximum. There is no way the lapic in calibrate_APIC_clock()
918 /* Build delta t1-t2 as apic timer counts down */ in calibrate_APIC_clock()
949 * Do a sanity check on the APIC calibration result in calibrate_APIC_clock()
953 pr_warn("APIC frequency too slow, disabling apic timer\n"); in calibrate_APIC_clock()
960 * PM timer calibration failed or not turned on so lets try APIC in calibrate_APIC_clock()
965 apic_printk(APIC_VERBOSE, "... verify APIC timer\n"); in calibrate_APIC_clock()
968 * Setup the apic timer manually in calibrate_APIC_clock()
997 pr_warn("APIC timer disabled due to verification failure\n"); in calibrate_APIC_clock()
1005 * Setup the boot APIC
1012 * The local apic timer can be disabled via the kernel in setup_boot_APIC_clock()
1018 pr_info("Disabling APIC timer\n"); in setup_boot_APIC_clock()
1053 * The guts of the apic timer interrupt
1087 * Local APIC timer interrupt. This is the most natural way for doing
1089 * broadcast interrupts too. [in case the hw doesn't support APIC timers]
1112 * Local APIC start and shutdown
1116 * clear_local_APIC - shutdown the local APIC
1119 * the local APIC has no dangling leftovers. Also used to cleanout any BIOS
1127 /* APIC hasn't been mapped yet */ in clear_local_APIC()
1133 * Masking an LVT entry can trigger a local APIC error in clear_local_APIC()
1171 * Clean APIC state for other OSs: in clear_local_APIC()
1181 /* Integrated APIC (!82489DX) ? */ in clear_local_APIC()
1191 * apic_soft_disable - Clears and software disables the local APIC on hotplug
1194 * MSR_IA32_APICBASE. Clearing that bit on systems based on the 3 wire APIC
1195 * bus would require a hardware reset as the APIC would lose track of bus
1197 * but it has to be guaranteed that no interrupt is sent to the APIC while
1207 /* Soft disable APIC (implies clearing of registers for 82489DX!). */ in apic_soft_disable()
1214 * disable_local_APIC - clear and disable the local APIC
1218 /* APIC hasn't been mapped yet */ in disable_local_APIC()
1266 * sync_Arb_IDs - synchronize APIC bus arbitration IDs
1293 pr_info("APIC disabled via kernel command line\n"); in __apic_intr_mode_select()
1299 /* On 64-bit, the APIC must be integrated, Check local APIC only */ in __apic_intr_mode_select()
1302 pr_info("APIC disabled by BIOS\n"); in __apic_intr_mode_select()
1306 /* On 32-bit, the APIC may be integrated APIC or 82489DX */ in __apic_intr_mode_select()
1308 /* Neither 82489DX nor integrated APIC ? */ in __apic_intr_mode_select()
1314 /* If the BIOS pretends there is an integrated APIC ? */ in __apic_intr_mode_select()
1318 pr_err(FW_BUG "Local APIC %d not detected, force emulation\n", in __apic_intr_mode_select()
1328 pr_info("APIC: ACPI MADT or MP tables are not detected\n"); in __apic_intr_mode_select()
1337 pr_info("APIC: SMP mode deactivated\n"); in __apic_intr_mode_select()
1342 panic("Boot APIC ID in local APIC unexpected (%d vs %d)", in __apic_intr_mode_select()
1366 * through-I/O-APIC virtual wire mode might be active. in init_bsp_APIC()
1372 * Do not trust the local APIC being empty at bootup. in init_bsp_APIC()
1377 * Enable APIC. in init_bsp_APIC()
1415 pr_info("APIC: Keep in PIC mode(8259)\n"); in apic_intr_mode_init()
1418 pr_info("APIC: Switch to virtual wire mode setup\n"); in apic_intr_mode_init()
1422 pr_info("APIC: Switch to virtual wire mode setup with no configuration\n"); in apic_intr_mode_init()
1427 pr_info("APIC: Switch to symmetric I/O mode setup\n"); in apic_intr_mode_init()
1431 pr_info("APIC: Switch to symmetric I/O mode setup in no SMP routine\n"); in apic_intr_mode_init()
1450 if (apic->disable_esr) { in lapic_setup_esr()
1504 * If the ISR map is not empty. ACK the APIC and run another round in apic_check_and_ack()
1541 /* 512 loops are way oversized and give the APIC a chance to obey. */ in apic_pending_intr_clear()
1547 pr_warn("APIC: Stale IRR: %256pb ISR: %256pb\n", irr.map, isr.map); in apic_pending_intr_clear()
1551 * setup_local_APIC - setup the local APIC
1553 * Used to setup local APIC while initializing BSP or bringing up APs.
1567 * If this comes from kexec/kcrash the APIC might be enabled in in setup_local_APIC()
1576 if (lapic_is_integrated() && apic->disable_esr) { in setup_local_APIC()
1584 * Double-check whether this APIC is really registered. in setup_local_APIC()
1585 * This is meaningless in clustered apic mode, so we skip it. in setup_local_APIC()
1587 BUG_ON(!apic->apic_id_registered()); in setup_local_APIC()
1591 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel in setup_local_APIC()
1594 apic->init_apic_ldr(); in setup_local_APIC()
1597 if (apic->dest_logical) { in setup_local_APIC()
1601 * APIC LDR is initialized. If logical_apicid mapping was in setup_local_APIC()
1615 * Set Task Priority to 'accept all except vectors 0-31'. An APIC in setup_local_APIC()
1629 * Now that we are all set up, enable the APIC in setup_local_APIC()
1634 * Enable APIC in setup_local_APIC()
1640 * Some unknown Intel IO/APIC (or APIC) errata is biting us with in setup_local_APIC()
1677 * set up through-local-APIC on the boot CPU's LINT0. This is not in setup_local_APIC()
1682 * TODO: set up through-local-APIC from through-I/O-APIC? --macro in setup_local_APIC()
1710 /* Recheck CMCI information after local APIC is up on CPU #0 */ in setup_local_APIC()
1723 /* Disable the local apic timer */ in end_local_APIC_setup()
1734 * APIC setup function for application processors. Called from smpboot.c
1859 * in physical mode, and CPUs with an APIC ID that cannnot in try_to_enable_x2apic()
1900 pr_info("Not enabling interrupt remapping due to skipped IO-APIC setup\n"); in enable_IR_x2apic()
1910 pr_info("Saving IO-APIC state failed: %d\n", ret); in enable_IR_x2apic()
1934 * On AMD64 we trust the BIOS - if it says no APIC it is likely
1935 * not correctly set up (usually the APIC timer won't work etc.)
1940 pr_info("No local APIC present\n"); in detect_init_APIC()
1954 * The APIC feature bit should now be enabled in apic_verify()
1959 pr_warn("Could not enable APIC!\n"); in apic_verify()
1965 /* The BIOS may have set up the APIC at some other address */ in apic_verify()
1972 pr_info("Found and enabled local APIC!\n"); in apic_verify()
1984 * Some BIOSes disable the local APIC in the APIC_BASE in apic_force_enable()
1991 pr_info("Local APIC disabled by BIOS -- reenabling.\n"); in apic_force_enable()
2002 * Detect and initialize APIC
2029 * Over-ride BIOS and try to enable the local APIC only if in detect_init_APIC()
2033 pr_info("Local APIC disabled by BIOS -- " in detect_init_APIC()
2049 pr_info("No local APIC present or hardware disabled\n"); in detect_init_APIC()
2055 * init_apic_mappings - initialize APIC mappings
2069 /* If no local APIC can be found return early */ in init_apic_mappings()
2071 /* lets NOP'ify apic operations */ in init_apic_mappings()
2072 pr_info("APIC: disable apic facility\n"); in init_apic_mappings()
2086 * Fetch the APIC ID of the BSP in case we have a in init_apic_mappings()
2094 * in case if apic was disabled via boot option in init_apic_mappings()
2109 apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n", in register_lapic_address()
2119 * Local APIC interrupts
2146 pr_info("Spurious APIC interrupt (vector 0xFF) on CPU#%d, should never happen.\n", in DEFINE_IDTENTRY_IRQ()
2174 * This interrupt should never happen with our APIC/SMP architecture
2179 "Send CS error", /* APIC Error Bit 0 */ in DEFINE_IDTENTRY_SYSVEC()
2180 "Receive CS error", /* APIC Error Bit 1 */ in DEFINE_IDTENTRY_SYSVEC()
2181 "Send accept error", /* APIC Error Bit 2 */ in DEFINE_IDTENTRY_SYSVEC()
2182 "Receive accept error", /* APIC Error Bit 3 */ in DEFINE_IDTENTRY_SYSVEC()
2183 "Redirectable IPI", /* APIC Error Bit 4 */ in DEFINE_IDTENTRY_SYSVEC()
2184 "Send illegal vector", /* APIC Error Bit 5 */ in DEFINE_IDTENTRY_SYSVEC()
2185 "Received illegal vector", /* APIC Error Bit 6 */ in DEFINE_IDTENTRY_SYSVEC()
2186 "Illegal register address", /* APIC Error Bit 7 */ in DEFINE_IDTENTRY_SYSVEC()
2199 apic_printk(APIC_DEBUG, KERN_DEBUG "APIC error on CPU%d: %02x", in DEFINE_IDTENTRY_SYSVEC()
2216 * connect_bsp_APIC - attach the APIC to the interrupt system
2223 * Do not trust the local APIC being empty at bootup. in connect_bsp_APIC()
2227 * PIC mode, enable APIC mode in the IMCR, i.e. connect BSP's in connect_bsp_APIC()
2228 * local APIC to INT and NMI lines. in connect_bsp_APIC()
2231 "enabling APIC mode.\n"); in connect_bsp_APIC()
2238 * disconnect_bsp_APIC - detach the APIC from the interrupt system
2242 * APIC is disabled.
2252 * certain older boards). Note that APIC interrupts, including in disconnect_bsp_APIC()
2256 apic_printk(APIC_VERBOSE, "disabling APIC mode, " in disconnect_bsp_APIC()
2313 * Used to store mapping between logical CPU IDs and APIC IDs.
2326 * apic_id_is_primary_thread - Check whether APIC ID belongs to a primary thread
2327 * @apicid: APIC ID to check
2360 WARN_ONCE(1, "APIC: NR_CPUS/possible_cpus limit of %u reached. " in allocate_logical_cpuid()
2400 pr_warn("APIC: Disabling requested cpu." in generic_processor_info()
2415 pr_warn("APIC: NR_CPUS/possible_cpus limit of %i almost" in generic_processor_info()
2426 pr_warn("APIC: NR_CPUS/possible_cpus limit of %i reached. " in generic_processor_info()
2457 pr_warn("BIOS bug: APIC version is 0 for CPU %d/0x%x, fixing up to 0x10\n", in generic_processor_info()
2463 pr_warn("BIOS bug: APIC version mismatch, boot CPU: %x, CPU %d: version %x\n", in generic_processor_info()
2476 apic->x86_32_early_logical_apicid(cpu); in generic_processor_info()
2494 * interrupts disabled, so we know this does not race with actual APIC driver
2499 struct apic **drv; in apic_set_eoi_write()
2502 /* Should happen once for each apic */ in apic_set_eoi_write()
2512 apic_write(APIC_ID, apic->set_apic_id(boot_cpu_physical_apicid)); in apic_bsp_up_setup()
2527 * apic_bsp_setup - Setup function for local apic and io-apic
2562 * 'active' is true if the local APIC was enabled by us and
2567 /* r/w apic fields */
2619 * Mask IOAPIC before disabling the local APIC to prevent stale IRR in lapic_suspend()
2644 * IO-APIC and PIC have their own resume routines. in lapic_resume()
2726 /* local apic needs to resume before other devices access its registers. */
2744 pr_info("APIC: %s detected, Multi Chassis\n", d->ident); in set_multi()
2786 * APIC command line parameters
2840 pr_warn("APIC Verbosity level %s not recognised" in apic_set_verbosity()
2841 " use apic=verbose or apic=debug\n", arg); in apic_set_verbosity()
2848 early_param("apic", apic_set_verbosity);
2855 /* Put local APIC into the resource map. */ in lapic_insert_resource()